TW201933366A - Method and device for adjusting a plurality of the threshold voltages of a non-volatile memory device - Google Patents

Abstract

The present invention discloses a method and device for adjusting a plurality of threshold voltages of a non-volatile memory, including: obtaining a plurality of access voltage adjustment values from a voltage adjustment lookup table according to a time interval between a present time and a last access time to at least one memory unit; and adding the plurality of access voltage adjustment values to the individual initial access threshold voltage values of the at least one memory unit to obtain a plurality of present access threshold voltage values of the at least one memory unit.

Description

Method and device for adjusting multiple threshold voltage values of a non-volatile memory device

The present invention is a method and apparatus for adjusting a read voltage of a non-volatile memory device, and more particularly to a method and apparatus for adjusting a read voltage based on a last access time to reduce the probability of digital read errors.

Compared with traditional hard disk devices, FLASH memory has the characteristics of fast read/write performance and low power consumption. Flash memory is a commonly used data storage device. The flash memory can set the read voltage according to the read voltage parameter of the read command issued by the controller.

The flash memory can also read the data voltage according to the address of the read command. The flash memory converts the data voltage into corresponding data according to the read voltage to the controller. In order to reduce costs, flash memory technology has evolved to smaller and smaller geometries and higher and higher densities, such as storing more than one bit of information voltage in each memory cell, so that memory cells are read. The error becomes a major problem in determining the reliability and reliability of flash memory.

For example, flash memory may cause the data voltage output from the memory cell to shift to a lower (or higher) level due to factors such as Data Retention, read disturb, or program disturb. In order to solve the above problem, the conventional technology provides a corresponding adjustment voltage and weight for each of the aforementioned reasons for the interference of the read voltage of each memory cell, and the corresponding adjustment voltage and weight are respectively provided. The value obtained by the algebraic operation is adjusted to compensate for the read voltage offset caused by the aforementioned interference to obtain the correct data for each memory cell.

A conventional technique is to first establish a corresponding voltage preset difference table corresponding to data retention characteristics, read interference or program interference according to the characteristics of the flash memory.

Next, in each of the voltage preset difference tables, the corresponding first characteristic voltage preset difference value is queried according to the number of times the block is read; and the corresponding time is queried according to the retention time of the block. The second characteristic voltage preset difference value is used to query the corresponding third characteristic voltage preset difference value according to the programmed process of the block; and querying a preset multiplier according to the number of times the block is erased. And then multiplying the sum of the preset difference values of the first, second, and third characteristic voltages by the preset multiplier, and adding the previous access threshold voltage value of the cell, The current access threshold voltage value is obtained to read the cell output.

In addition to the aforementioned problems of data reading errors, as the technology evolves, the structure of flash memory becomes more and more complex, and the memory cell capacity is also higher and higher, especially in the case of more 3D NAND layers. , another problem arises.

In the flash memory structure, the row decoder output includes a complex word line signal, and the word line signals are respectively connected to the control gates of a string of cells, as an address output control, and the cells are controlled by an access voltage. Yuan's information. As the number of cells in the flash memory is larger, the number of cells connected to each word line signal is also increasing, that is, the access voltage of each word line signal must drive more. The control gate of the cell reads and writes the data voltage, so that the output load of the row decoder driving the complex digital line signal is getting heavier and heavier.

The control gate voltage of the data voltage of the read and write cells depends on setting the correct threshold voltage. Unfortunately, the output load of the aforementioned row decoder is aggravated, which interferes with the cell control gate voltage, so that the cell control gate needs. The voltage value changes. If there is no actual condition that the gate voltage is disturbed according to the cell control, setting the word line signal for the read threshold voltage of the cell control gate and adjusting the corresponding read voltage of the cell control gate will cause the cell voltage to control the gate read voltage. If the value cannot fall within the appropriate level of the actual demand of the threshold voltage, the bit error of the corresponding data may be caused in the process of reading the cell data voltage and converting the cell data voltage into corresponding data.

The conventional technique is to obtain the correct corresponding data from each cell after trying to read and convert multiple times, so as to reduce the bit error rate, but cause the reading cell and conversion. The speed of the process slows down and the efficiency is reduced.

For the sake of the job, in consideration of the increasing number of word line signals outputted by the row decoder, the bit error rate and additional operation problems caused by data reading must be solved.

The present invention discloses a method of adjusting a plurality of threshold voltage values of a non-volatile memory device, wherein the non-volatile memory device includes at least one memory unit, the method comprising: storing at least one memory unit according to a first recording unit of the at least one memory unit a manufacturing parameter, obtaining at least one threshold voltage value of the at least one memory unit and an access voltage value corresponding to the at least one threshold voltage value; a current time provided by a real time clock and a previous access of the at least one memory unit a time interval, a plurality of access voltage adjustment values are obtained by an access voltage adjustment reference table corresponding to at least one memory unit; and each of the access voltage adjustment values is compared with an initial access threshold voltage value of the at least one memory unit Adding to obtain a plurality of current access threshold voltage values of the at least one memory unit.

According to still another main technical point of view, the present invention also discloses a method for adjusting a plurality of threshold voltage values of a non-volatile memory device, wherein the non-volatile memory device includes at least one memory unit, the method comprising updating the at least one memory The step of the previous access time of the unit includes: calculating a time interval between the current time and the previous access time; if the previous operation of the at least one memory unit is reading data, and the time interval is greater than one time The first time offset table corresponding to the time interval is obtained, a first time offset value is obtained, and the previous time is updated with a value added by the current time and the first time offset value. Taking time; and if the time interval is less than the time interval, the previous access time is retained without updating.

The present invention also discloses a system for adjusting a plurality of threshold voltage values of a non-volatile memory device, including: at least one memory unit having a first recording unit for storing the at least one memory unit At least one manufacturing parameter, the at least one memory unit having at least one threshold voltage value and at least one access voltage value corresponding to the at least one threshold voltage value to determine at least one output level of the at least one memory block; a control logic a bit address decoder coupled to the at least one memory unit; and a control host coupled to the control logic, wherein the control host includes a second recording unit to store the plurality of initial accesses of the at least one memory unit a threshold voltage value, a third recording unit stores an access voltage adjustment reference table corresponding to at least one memory unit, the control host is accessed by the current time interval from the previous access time of the at least one memory unit The voltage adjustment comparison table obtains a complex access voltage adjustment value, and each of the access voltage adjustment values and each of the initial access threshold voltages Added to obtain a plurality of the at least one memory cell threshold voltage value of the current access.

The present invention also discloses a method for adjusting a plurality of threshold voltage values of a non-volatile memory device, wherein the non-volatile memory device includes a plurality of memory cells, and each of the memory cells has a Initially and a current threshold voltage value, the method includes: recording a plurality of parameters that cause each of the current threshold voltage values to be different from each of the initial threshold voltage values; and recording a plurality of adjustment factors of how each of the parameters adjusts the current threshold voltage value; All relevant adjustment factors and each of the initial threshold voltage values determine the current threshold voltage value for each memory unit according to an algebraic relationship; and record how each of the parameters causes the current threshold voltage value to be different from the initial threshold voltage value The parameter value; and the complex adjustment factor corresponding to each of the parameter values.

The present disclosure also discloses an adjustment unit for adjusting a plurality of threshold voltage values for determining a non-volatile memory device, wherein the non-volatile memory device has a plurality of memory cells, and each of the memory cells has an initial access and a current access threshold. The voltage value includes: a memory having: a first memory sub-region for recording a plurality of parameters that cause the current threshold voltage value to be different from the initial threshold voltage value, wherein each of the parameters is a previous time of each of the memory cells a time interval of the current access; and a second memory sub-region for recording a complex adjustment factor of each of the plurality of parameters to adjust the current threshold voltage; and a control logic for using the relevant adjustment factors and the initial The threshold voltage value determines the current threshold voltage value for each unit according to an algebraic relationship.

Based on the characteristics of the flash memory structure, the number of cells connected to the word line signal as the address control output in the flash memory is increased, so that the actual demand voltage of the cell control gate access changes. The bit error that occurs when reading the cell data is related to the time interval between the cell and the current read and write data.

According to the present invention, according to the time interval of reading and writing data of the flash memory block, the corresponding read voltage adjustment value is obtained to set the read threshold voltage of each block, and the word line is adjusted. The method of reading the voltage on the signal to access the cell is not limited to flash memory, but can be generalized to be applicable to any other device or application that needs to be used with non-volatile memory.

In addition, the method for adjusting the read voltage on the word line signal to access the cell can be applied to a single-level cell (SLC) or a multi-level cell (Multi-Level). Cell, MLC) structure flash memory device.

Please refer to FIG. 1, which is a schematic diagram of a non-volatile memory device 10 of the present invention. Also shown in FIG. 1 is a control host 11 coupled to a non-volatile memory device 10. In FIG. 1, the non-volatile memory device 10 of the present invention includes a non-volatile memory unit integration 12 and control logic 100. The non-volatile memory unit integration 12 can be any flash memory known in the art, non-volatile. The memory unit integration 12 includes a plurality of memory units 120, each of which may be a block of flash memory. The control logic 100 further includes an input and output control unit 101, a first recording unit 103, a column decoding unit 105, and a data register 106.

The input/output control unit 101 accepts an instruction from the control host 11 to cause the column decoding unit 105 to generate a word line signal and other related signals of each of the memory units 120 to control access of each of the memory units 120, and to enable the data register 106. The accessed data is transferred between the control host 11 and each of the memory units 120. In addition, the first recording unit 103 stores the identification code of the non-volatile memory unit integration 12, and the information stored by the first recording unit 103 still exists after the power supply of the non-volatile memory unit integration 12 disappears.

The control host 11 includes a second recording unit 111, a third recording unit 112, a fourth recording unit 113, a fifth recording unit 114, and a real time clock (RTC) 115; the second recording unit 111 stores corresponding non-volatile memory unit integrations 12 The process parameters of the memory unit 120, the process parameters include initial access operation parameters, and the initial access operation parameters include an initial access voltage threshold, an initial access voltage value, and an information of an access threshold voltage adjustment reference table. The third recording unit 112 stores the access voltage adjustment reference comparison table corresponding to each of the plurality of memory units 120; the fourth recording unit 113 stores the access dynamic parameters of the various non-volatile memory unit integrations 12, including each of the complex memories. The time of the previous access operation of the unit 120, the access operation pattern, and the access voltage threshold and the access voltage value. It is worth noting that the previous access threshold voltage value and the access voltage value have biased the memory cell access voltage threshold value and the access voltage value due to factors such as data retention characteristics, read interference or program interference. The shifted compensation voltage is taken into account; the fifth recording unit 114 records the time of each memory cell 120's current access operation; the real time clock 115 is the time reference of each memory cell 120's current access operation.

The information stored in the second recording unit 111, the third recording unit 112, and the fourth recording unit 113 is a part of the parameter database of the control host 11 when accessing the non-volatile memory unit integration 12. The parameter database may be The control host 11 accesses a part of the control software or the body of the non-volatile memory unit integrated 12, and may also be parameter data stored in the non-volatile memory of the control host 11, so that the parameter data is supplied to the control host 11. It still exists after disappearing.

When accessing the non-volatile memory unit integration 12, the control host 11 retrieves corresponding non-volatiles stored in the second recording unit 111 of the control host 11 according to the identification code of the non-volatile memory unit integration 12 in the first recording unit 103. The initial access voltage threshold value, the initial access voltage value, and the information of the access threshold voltage adjustment reference table of each memory unit 120 stored in the third recording unit 112 in the memory unit 12 . The control host 11 calculates the current time of the real time clock 115 and the time interval between the previous and current access operations, queries the access threshold voltage value adjustment reference table according to the time interval, and sets the current access voltage threshold of each of the memory units 120. And adjusting an appropriate access voltage value according to the range of the current access voltage threshold, instructing the input/output control unit 101 to control the column decoding unit 105 to adjust the access voltage of each of the memory units 120, and updating the fourth recording unit 113. Time information of the previous access operation, adjusted access voltage threshold, and access voltage value.

For non-volatile memory cells with different capacities and different structures, integrated 12 or flash memory, which is subject to more and more interference by the number of word line signal connecting cells, and thus required for each memory cell 120 cell control gate The change in the effective access voltage is also different. However, the present invention is still applicable to various non-volatile methods based on the method of accessing the adjustment voltage reference table and the time interval between the previous and current access operations to calculate the current access voltage threshold and the current access voltage value. The memory unit integrates 12 or flash memory to get the correct reading data.

Please refer to FIG. 2 , which is a schematic diagram of an example memory cell 120 with respect to an access threshold voltage adjustment value of each time interval between the previous and current access operations, wherein the preferred unit of A is milliseconds, B. The preferred unit is minutes. According to FIG. 2, (1) when the time interval between the previous time and the current access is less than A, the memory cell 120 access threshold voltage adjustment value becomes smaller as the time interval becomes larger; (2) before When the time interval between the current access operation and the current access operation is between A and B, the memory cell 120 access threshold voltage adjustment value remains unchanged; (3) and the time interval between the previous and current access operations is greater than B. In the case of the memory unit 120, the threshold voltage adjustment value of the access threshold becomes larger as the time interval becomes larger. For example, when the time interval between a memory unit 120 and the current access operation is X, the corresponding relative access threshold voltage adjustment value is Y millivolts (mV). It should be noted that the memory cells 120 of the non-volatile memory unit integration 12 may have different curve changes from the access threshold voltage adjustment values of the previous time interval with the current access operation, and therefore, different The aforementioned A, B, X, and Y of the memory unit 120 may be different.

In order to obtain the correct reading data, the present invention digitizes the data in the memory threshold of the access threshold voltage adjustment value of the time interval between the previous time and the current access operation to obtain the memory unit. The access threshold voltage adjustment value of 120 is referred to the comparison table. The following table shows an example content of the reference comparison table of the i-th memory sub-region of the memory unit 120. It is to be noted that the values of the reference comparison tables exemplified in the table below vary with the design and process of the non-volatile memory cells, and thus the numerical values of the present invention are not limited to the examples in the following table.

The access threshold voltage adjustment values of the different access time intervals corresponding to the memory cells 120 in the non-volatile memory unit integration 12 are stored in the third recording unit 112 of the control host 11 with reference to the reference table. The structure of the third recording unit 112 is as shown in FIG. In Fig. 3, the third recording unit 112 is divided into a plurality of memory sub-zones. The access threshold voltage adjustment value reference table of each of the memory units 120 includes a first memory unit access time interval 211 and a second memory unit access time interval 221 to the first memory sub-area (not shown). m memory unit access time interval 2m1 and so on. In order to make the current threshold voltage value different from the initial threshold voltage value, the first memory unit access threshold voltage adjustment value 212 corresponding to the access time interval of each memory unit 120, and the second memory unit access threshold The complex adjustment factors such as the voltage adjustment value 222 to the mth memory cell access threshold voltage adjustment value 2m2 are stored in the second memory sub-region (not shown).

The access threshold voltage adjustment value reference value comparison table set by factors such as data retention characteristics, read interference or program interference is stored in other memory sub-areas of the third recording unit 112, and is used by the control host 11 to compensate for the aforementioned interference. The memory cell access voltage threshold is offset from the access voltage value.

Please refer to FIG. 4 , which is a problem for solving the problem that the actual demand voltage of the cell control gate access changes due to the increasing number of cells connected to the word line signal in the flash memory. Schematic diagram of the method for adjusting the threshold value of the access threshold of the unit. In FIG. 4, the control host 11 sequentially performs the following steps each time the current data is read by the memory unit 120: (step S100) storing the non-volatile according to the first recording unit 103 of the non-volatile memory device 10. The memory unit integrates the identification code of 12 to retrieve the initial access voltage threshold and initial access in the initial access operation parameter of the non-volatile memory unit integration 12 stored in the second recording unit 111 of the control host 11. a voltage value; (step S101) obtaining a current reading time according to the real time clock 115, calculating a current reading time and a time interval of the previous access acquired by the fourth recording unit 113; (step S102) and then calculating the time interval based on the foregoing Querying the access threshold voltage adjustment value of the third recording unit 112 to refer to the comparison table to obtain a corresponding access threshold voltage adjustment value; (step S103) adding the access threshold voltage adjustment value and the initial access threshold voltage value to obtain Current access threshold voltage value; (step S104) instructing the input/output control unit 101 in the control logic 100 to cause column decoding based on the current threshold voltage value The unit 105 sets an appropriate voltage output of the word line signal to read the data of the memory unit 120; (step S105), the previous access operation time is updated according to the current read time.

Please refer to FIG. 5, which is a schematic diagram of a method for updating the previous access operation time according to the present invention. After setting the access voltage output to the word line signal to read the memory unit 120, the control host 11 updates the previous access operation time stored in the fourth recording unit 113 corresponding to each of the memory units 120 in accordance with the following steps.

First, the current time and the previous access time interval obtained by the real time clock are calculated; the previous access operation pattern is read (step S200); the access operation pattern is determined (step S201); and the access operation pattern is determined (step S202). In a scenario, if the access operation of the previous memory unit 120 is to read data, and the time interval is not less than the time interval of 3 minutes, the control host 11 queries a first time corresponding to the time interval. Offsetting the table to obtain a first time offset value (step S206), and adding the value of the current time to the first time offset value, updating the previous storage stored in the record of the second recording unit 111 Taking the operation time (step S208); and in another scenario, if the time interval between the current reading and the previous reading is less than 3 minutes, the control host 11 will not update the second recording unit 111 to store the record. The previous access operation time (step S204). It should be noted that the aforementioned time interval value varies with the design and process of the non-volatile memory unit, and therefore the time interval value is not limited to the aforementioned 3-minute time interval.

If the access operation of the previous memory unit 120 is not reading data (step S202), it is determined whether the previous access operation pattern is written data (step S203); in a scenario, if the previous memory unit 120 is saved The fetch operation is to write data, and the control host 11 adds the previous access operation time stored in the record of the second recording unit 111 to the fixed time offset of 200 milliseconds to update its previous access operation time (step S207). In another scenario, if the access operation of the previous memory unit 120 is not a write data, the control host 11 will not update the previous access operation time stored by the second recording unit 111 (step S205). It should be noted that the aforementioned fixed time offset value varies with the design and process of the non-volatile memory unit. Therefore, the fixed time offset value is not limited to the aforementioned fixed time offset of 200 milliseconds.

Embodiment 1. A method of adjusting a plurality of threshold voltage values of a non-volatile memory device, wherein the non-volatile memory device comprises at least one memory unit, the method comprising: storing according to a first recording unit of the at least one memory unit And at least one manufacturing parameter, obtaining at least one threshold voltage value of the at least one memory unit and an access voltage value corresponding to the at least one threshold voltage value; a current time provided according to a real-time clock and a previous storage of the at least one memory unit Taking a time interval, obtaining a complex access voltage adjustment value by an access voltage adjustment reference table corresponding to at least one memory unit; and setting each of the access voltage adjustment values and an initial access threshold voltage value of the at least one memory unit Adding to obtain a plurality of current access threshold voltage values of the at least one memory unit. 2. The method of embodiment 1, wherein the method further comprises controlling the address decoder according to each of the current access threshold voltage values to generate the access voltage value of the at least one memory unit to read the at least The data voltage of a memory unit. 3. A method of adjusting a plurality of threshold voltage values of a non-volatile memory device, wherein the non-volatile memory device comprises at least one memory unit, the method comprising the step of updating a previous access time of the at least one memory unit, including Calculating a time interval between a current time and the previous access time; if the previous operation of the at least one memory unit is reading data, and the time interval is greater than a time interval, the query corresponds to a time interval of the time interval a time offset table, obtaining a first time offset value, and updating the previous access time by a value added by the current time and the first time offset value; and if the time interval is less than the time interval , then retain the previous access time without updating. 4. The method of embodiment 3, wherein the step of updating the previous access time of the at least one memory unit further comprises: adding the previous access time after writing the data to the at least one memory unit The last fixed time offset to update the previous access time. 5. The method of any one of embodiments 3 to 4, wherein the step of updating the previous access time of the at least one memory unit further comprises: if the previous access operation of the at least one memory unit is not When one of the data is read and written, the previous access time is retained without updating. 6. A system for adjusting a plurality of threshold voltage values of a non-volatile memory device, comprising: at least one memory unit having a first recording unit storing at least one manufacturing parameter of the at least one memory unit, the at least one memory unit Having at least one threshold voltage value and at least one access voltage value corresponding to at least one threshold voltage value to determine at least one output level of the at least one memory block; a control logic comprising coupled to the at least one memory unit a single address decoder; and a control host coupled to the control logic, wherein the control host includes a second recording unit to store a plurality of initial access threshold voltage values of the at least one memory unit, and a third recording unit storage pair At least one access voltage adjustment reference table of the memory unit should be used, and the control host obtains the complex access voltage adjustment value from the access voltage adjustment comparison table according to the interval between a current time and the previous access time of the at least one memory unit. Adding each of the access voltage adjustment values to each of the initial access threshold voltage values to obtain a complex of the at least one memory unit Current access threshold voltage. 7. The system of embodiment 6, wherein the control logic controls the address decoder according to each of the current access threshold voltage values to generate an access voltage value of the at least one memory unit to read the at least one memory. The data voltage of the unit. 8. The system of any one of embodiments 6-7, wherein the control host further comprises a real time clock to indicate the current time. 9. A method of determining a plurality of threshold voltage values for determining a non-volatile memory device, wherein the non-volatile memory device comprises a plurality of memory cells, and each of the memory cells has an initial and a current threshold voltage value, the method comprising Recording a complex parameter that causes each of the current threshold voltage values to be different from each of the initial threshold voltage values; and recording how each of the parameters adjusts a plurality of adjustment factors of each of the current threshold voltage values; and according to all relevant adjustment factors and each of the initial thresholds The voltage value determines the current threshold voltage value for each memory unit according to an algebraic relationship; records how each parameter makes the current threshold voltage value different from the initial threshold voltage value; and records each parameter value separately Corresponding plural adjustment factor. 10. An adjustment unit for adjusting a plurality of threshold voltage values for determining a non-volatile memory device, wherein the non-volatile memory device has a plurality of memory cells, and each of the memory cells has an initial access and a current access threshold voltage The value includes: a memory having: a first memory sub-region for recording a plurality of parameters that cause the current threshold voltage value to be different from the initial threshold voltage value, wherein each of the parameters is a previous time and a current of each of the memory cells a time interval for accessing; and a second memory sub-region for recording a plurality of adjustment factors of how the plurality of parameters adjust the current threshold voltage; and a control logic for determining the adjustment factor and the initial threshold according to all relevant The voltage value determines the current threshold voltage for each unit in an algebraic relationship.

In summary, the present invention can be used in a new design to obtain a complex access voltage adjustment value by using a current time interval from the previous access time of at least one memory unit to solve the problem due to non-volatile memory. The number of cells connected to each word line signal in the device is increasing, which causes an error in reading the data of the memory cell. Therefore, anyone who is familiar with this skill can be modified by all kinds of ideas, but they are not protected by the scope of the patent application.

10‧‧‧Non-volatile memory device

100‧‧‧Control logic

101‧‧‧Input and output control unit

103‧‧‧First Recording Unit

105‧‧‧ column decoding unit

106‧‧‧ and data register

11‧‧‧Control host

111‧‧‧Second recording unit

112‧‧‧ Third Recording Unit

113‧‧‧fourth recording unit

114‧‧‧ fifth record unit

115‧‧‧Real Time Clock

12‧‧‧ Non-volatile memory unit integration

120‧‧‧ memory unit

211‧‧‧First memory unit access time interval

221‧‧‧Second memory unit access time interval

2m1‧‧‧m memory unit access time interval

212‧‧‧First memory unit access threshold voltage adjustment value

222‧‧‧Second memory unit access threshold voltage adjustment value

2m2‧‧‧m memory unit access threshold voltage adjustment value

Steps S100, S101, S102, S103, S104, S105, S200, S201, S202, S203, S204, S205, S206, S207, S208‧‧

This case can be further understood by the following detailed description of the drawings: Figure 1: Schematic diagram of the non-volatile memory device of the present invention; Figure 2: Memory unit of the present invention relative to the previous and current access operations Schematic diagram of the access voltage variation curve of the time interval; FIG. 3: The memory sub-area access threshold voltage value adjustment reference table of the memory cell of the present invention is in the structure of the recording unit; FIG. 4: the access threshold voltage of the present invention Schematic diagram of the value adjustment method; Figure 5: Schematic diagram of the method for updating the previous access operation time of the present invention.

no

Claims (8)

A method of adjusting a plurality of threshold voltage values of a non-volatile memory device, wherein the non-volatile memory device includes at least one memory unit, the method comprising: at least one manufacturing parameter stored according to a first recording unit of the at least one memory unit Obtaining at least one threshold voltage value of the at least one memory unit and an access voltage value corresponding to the at least one threshold voltage value; spacing between a current time provided by a real-time clock and a previous access time of the at least one memory unit And obtaining, by an access voltage adjustment reference table corresponding to the at least one memory unit, a complex access voltage adjustment value; and adding each of the access voltage adjustment values to an initial access threshold voltage value of the at least one memory unit to Obtaining a plurality of current access threshold voltage values of the at least one memory unit. The method of claim 1, wherein the method further comprises: controlling the address decoder according to each of the current access threshold voltage values to generate the access voltage value of the at least one memory unit to read the at least one The data voltage of the memory unit. A method of adjusting a plurality of threshold voltage values of a non-volatile memory device, wherein the non-volatile memory device includes at least one memory unit, the method comprising the step of updating a previous access time of the at least one memory unit, comprising: calculating a time interval between the current time and the previous access time; if the previous operation of the at least one memory unit is to read the data, and the time interval is greater than a time interval, the query corresponds to a first time of the time interval Offset table, obtaining a first time offset value, and updating the previous access time by a value added by the current time and the first time offset value; and if the time interval is less than the time interval, The previous access time is retained without updating. The method of claim 3, wherein the step of updating the previous access time of the at least one memory unit further comprises: adding the previous access time after writing the data to the at least one memory unit A fixed time offset value to update the previous access time. The method of claim 3, wherein the step of updating the previous access time of the at least one memory unit further comprises: if the previous access operation of the at least one memory unit is not reading and writing data One of them retains the previous access time without updating. A system for adjusting a plurality of threshold voltage values of a non-volatile memory device, comprising: at least one memory unit having a first recording unit storing at least one manufacturing parameter of the at least one memory unit, the at least one memory unit having at least one a threshold voltage value and at least one access voltage value corresponding to at least one threshold voltage value to determine at least one output level of the at least one memory block; a control logic including a bit coupled to the at least one memory unit An address decoder; and a control host coupled to the control logic, wherein the control host includes a second recording unit storing a plurality of initial access threshold voltage values of the at least one memory unit, and a third recording unit storing at least An access voltage adjustment reference table of a memory unit, wherein the control host obtains a plurality of access voltage adjustment values from the access voltage adjustment reference table according to a current time interval from a previous access time of the at least one memory unit, Each of the access voltage adjustment values is added to each of the initial access threshold voltage values to obtain a complex of the at least one memory unit Current access threshold voltage. The system of claim 6, wherein the control logic controls the address decoder according to each of the current access threshold voltage values, and generates an access voltage value of the at least one memory unit to read the at least one memory unit. Information voltage. The system of claim 6, wherein the control host further includes a real time clock to indicate the current time.