TW201438413A - Isolation communication technology using coupled oscillators/antennas - Google Patents

Isolation communication technology using coupled oscillators/antennas Download PDF

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Publication number
TW201438413A
TW201438413A TW103105699A TW103105699A TW201438413A TW 201438413 A TW201438413 A TW 201438413A TW 103105699 A TW103105699 A TW 103105699A TW 103105699 A TW103105699 A TW 103105699A TW 201438413 A TW201438413 A TW 201438413A
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Taiwan
Prior art keywords
antenna
circuit
transmission
transmit
signal
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TW103105699A
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Chinese (zh)
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Philip J Crawley
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Fairchild Semiconductor
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Publication of TW201438413A publication Critical patent/TW201438413A/en

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/38Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
    • H04B1/40Circuits
    • H04B5/72

Abstract

The present subject matter discusses, among other things, electrical isolation, and more particularly wireless electrical isolation methods and apparatus. IN an example, an electrical isolator can include a transmit circuit including a transmit antenna, and a receive circuit including a receive antenna. The transmit circuit can be configured to receive digital data and to modulate a transmit signal with the digital data, and to transmit the transit signal using the transmit antenna. The receive antenna can be configured to receive the transmit signal and to demodulate and provide the digital data from the transmit signal using a demodulation clock signal.

Description

使用耦合之振盪器/天線之分離通訊技術 Separate communication technology using coupled oscillator/antenna 優先權主張及相關申請案Priority claims and related applications

本申請案主張Philip J.Crawley於2013年2月20日申請之標題為「ISOLATION COMMUNICATION TECHNOLOGY USING COUPLED OSCILLATORS/ANTENNAS」之第61/767,074號美國臨時申請案之優先權權益,該美國臨時申請案特此以引用之方式整體併入本文中。 The present application claims priority to U.S. Provisional Application No. 61/767,074, entitled "ISOLATION COMMUNICATION TECHNOLOGY USING COUPLED OSCILLATORS/ANTENNAS", filed on February 20, 2013 by Philip J. Crawley. This is incorporated herein by reference in its entirety.

本發明標的物尤其論述電分離,且更特定而言,論述無線電分離方法及設備。 In particular, the subject matter of the present invention addresses electrical separation and, more particularly, discusses radio separation methods and apparatus.

跨越一分離障壁通訊之現有技術包含光耦合器及數位分離技術。光學耦合器運作良好且滿足組件層級之分離測試的要求,但並不特別可靠或快速。此外,光學耦合器缺乏由CMOS技術提供的成本及大小藉以隨每一代技術而改良之益處。現有數位分離器可提供優於光學耦合器之經改良速度及可靠性,但不能夠針對組件層級分離標準之順從性進行測試。此外,與下文所闡述之低功率數位分離器相比,採用變壓器之現有分離器在分離組件之間轉移顯著能量。 Prior art across a split barrier communication includes optocouplers and digital separation techniques. Optical couplers work well and meet the requirements of separation testing at the component level, but are not particularly reliable or fast. In addition, optical couplers lack the cost and size provided by CMOS technology to improve with each generation of technology. Existing digital separators provide improved speed and reliability over optical couplers, but are not capable of testing compliance with component level separation standards. In addition, existing separators employing transformers transfer significant energy between the separation components as compared to the low power digital separators described below.

本發明標的物尤其論述電分離,且更特定而言,論述無線電分離方法及設備。在一實例中,一種電分離器可包含:一傳輸電路,其 包含一傳輸天線;及一接收電路,其包含一接收天線。該傳輸電路可經組態以接收數位資料並用該數位資料調變一傳輸信號,且使用該傳輸天線傳輸該傳輸信號。該接收天線可經組態以接收該傳輸信號且使用一解調變時脈信號自該傳輸信號解調變出該數位資料並提供該數位資料。 In particular, the subject matter of the present invention addresses electrical separation and, more particularly, discusses radio separation methods and apparatus. In an example, an electrical splitter can include: a transmission circuit, A transmission antenna is included; and a receiving circuit includes a receiving antenna. The transmission circuit is configurable to receive digital data and to modulate a transmission signal with the digital data, and to transmit the transmission signal using the transmission antenna. The receive antenna can be configured to receive the transmit signal and demodulate the digital data from the transmit signal using a demodulated variable clock signal and provide the digital data.

此概述意欲提供本專利申請案之標的物之一非排他性概要。其並不意欲提供對本發明之一排他性或窮盡性闡釋。包含詳細說明以提供關於本專利申請案之進一步資訊。 This summary is intended to provide a non-exclusive summary of one of the subject matter of this patent application. It is not intended to provide an exclusive or exhaustive interpretation of the invention. A detailed description is included to provide further information regarding this patent application.

100‧‧‧實例性數位分離器/數位分離器/實例性多通道雙向數位分離器 100‧‧‧Instance Digital Separator/Digital Separator/Instance Multichannel Bidirectional Digital Separator

101‧‧‧第一積體電路或晶片/第一積體電路晶片/晶片 101‧‧‧First integrated circuit or wafer/first integrated circuit wafer/wafer

102‧‧‧第二積體電路或晶片/第二積體電路晶片/晶片 102‧‧‧Second integrated circuit or wafer/second integrated circuit wafer/wafer

103‧‧‧單迴路傳輸電感器 103‧‧‧Single loop transmission inductor

104‧‧‧單迴路接收電感器 104‧‧‧Single loop receiving inductor

200‧‧‧實例性數位分離器/數位分離器 200‧‧‧Instance Digital Separator/Digital Separator

201‧‧‧第一積體電路 201‧‧‧First integrated circuit

202‧‧‧第二積體電路晶片 202‧‧‧Second integrated circuit chip

203‧‧‧傳輸器單迴路電感器 203‧‧‧Transmitter single loop inductor

204‧‧‧接收器單迴路電感器 204‧‧‧Receiver single loop inductor

300‧‧‧實例性數位分離器/數位分離器 300‧‧‧Instance Digital Separator/Digital Separator

301‧‧‧第一積體電路晶片 301‧‧‧First integrated circuit chip

302‧‧‧第二積體電路晶片 302‧‧‧Second integrated circuit chip

303‧‧‧迴路天線/傳輸器單迴路電感器 303‧‧‧Circuit Antenna/Transmitter Single Loop Inductor

304‧‧‧迴路天線/接收器單迴路電感器 304‧‧‧Circuit Antenna/Receiver Single Loop Inductor

400‧‧‧實例性調幅數位分離器 400‧‧‧Example amplitude modulation digital separator

401‧‧‧傳輸器電路/傳輸器 401‧‧‧Transmitter circuit/transmitter

402‧‧‧接收器電路/接收器 402‧‧‧Receiver Circuit/Receiver

403‧‧‧天線 403‧‧‧Antenna

404‧‧‧天線 404‧‧‧Antenna

420‧‧‧傳輸振盪器 420‧‧‧Transmission Oscillator

421‧‧‧調變開關 421‧‧‧Transmutation switch

422‧‧‧功率放大器 422‧‧‧Power Amplifier

423‧‧‧低雜訊放大器 423‧‧‧Low noise amplifier

424‧‧‧非線性濾波器 424‧‧‧Nonlinear filter

425‧‧‧功率偵測器 425‧‧‧Power Detector

500‧‧‧分離電路 500‧‧‧Separation circuit

501‧‧‧傳輸器 501‧‧‧Transporter

502‧‧‧接收器 502‧‧‧ Receiver

503‧‧‧天線 503‧‧‧Antenna

530‧‧‧負阻抗 530‧‧‧negative impedance

531‧‧‧阻抗變換電路 531‧‧‧ impedance conversion circuit

651‧‧‧積體電路封裝 651‧‧‧Integrated circuit package

652‧‧‧波導結構 652‧‧‧Wave structure

653‧‧‧波導跡線 653‧‧‧Wave Trace

654‧‧‧第一埠 654‧‧‧ first

655‧‧‧第二埠 655‧‧‧Second

751‧‧‧積體電路封裝 751‧‧‧Integrated circuit package

752‧‧‧實例性曲折電感器/天線結構 752‧‧‧Example tortuous inductor/antenna structure

753‧‧‧曲折跡線 753‧‧‧Zigzag Trace

754‧‧‧第一埠 754‧‧‧ first

755‧‧‧第二埠 755‧‧‧Second

800‧‧‧實例性數位分離器/數位分離器 800‧‧‧Instance Digital Separator/Digital Separator

801‧‧‧第一積體電路 801‧‧‧First integrated circuit

802‧‧‧第二積體電路 802‧‧‧Second integrated circuit

803‧‧‧偶極天線 803‧‧‧ dipole antenna

804‧‧‧偶極天線 804‧‧‧ Dipole antenna

810‧‧‧絕緣基板 810‧‧‧Insert substrate

900‧‧‧實例性數位分離器/數位分離器 900‧‧‧Instance Digital Separator/Digital Separator

901‧‧‧第一積體電路 901‧‧‧First integrated circuit

902‧‧‧第二積體電路 902‧‧‧Second integrated circuit

903‧‧‧端部負載偶極天線 903‧‧‧End load dipole antenna

904‧‧‧端部負載偶極天線 904‧‧‧End load dipole antenna

910‧‧‧基板 910‧‧‧Substrate

D0IN‧‧‧傳入數位信號/所接收資料 D0 IN ‧‧‧Incoming digital signal/received data

D0OUT‧‧‧輸出資料 D0 OUT ‧‧‧Output data

D1IN‧‧‧傳入數位信號 D1 IN ‧‧‧Incoming digital signal

DIN‧‧‧輸入數位資料 D IN ‧‧‧Input digital data

DOUT‧‧‧數位輸出資訊 D OUT ‧‧‧Digital output information

f0‧‧‧頻率 f 0 ‧‧‧frequency

f1‧‧‧頻率 f 1 ‧‧‧frequency

L‧‧‧長度 L‧‧‧ length

M‧‧‧距離 M‧‧‧ distance

RX0‧‧‧無線接收器電路/接收器電路 RX0‧‧‧Wireless Receiver Circuit/Receiver Circuit

RX1‧‧‧無線接收器電路/接收器電路 RX1‧‧‧Wireless Receiver Circuit/Receiver Circuit

TX0‧‧‧傳輸器電路/無線傳輸器電路 TX0‧‧‧transmitter circuit/wireless transmitter circuit

TX1‧‧‧無線傳輸器電路/傳輸器電路 TX1‧‧‧Wire Transmitter Circuit/Transmitter Circuit

WEL‧‧‧迴路端部寬度 W EL ‧‧‧loop end width

在圖式(其未必按比例繪製)中,相同編號可在不同視圖中描述類似組件。具有不同字母後綴之相同編號可表示類似組件之不同例項。 該等圖式大體以實例方式而非限制方式圖解說明本文件中所論述之各種實施例。 In the drawings (which are not necessarily drawn to scale), the same number may describe similar components in different views. The same number with different letter suffixes may indicate different instances of similar components. The drawings illustrate the various embodiments discussed in this document, by way of example and not limitation.

圖1A大體圖解說明一實例性數位分離器。 Figure 1A generally illustrates an exemplary digital separator.

圖1B大體圖解說明一實例性多通道雙向數位分離器。 FIG. 1B generally illustrates an exemplary multi-channel bidirectional digital separator.

圖2圖解說明一實例性數位分離器之一俯視圖。 Figure 2 illustrates a top view of an exemplary digital separator.

圖3A圖解說明具有面對彼此之迴路天線之一實例性數位分離器之一俯視圖。 3A illustrates a top view of one exemplary digital separator having loop antennas facing each other.

圖3B大體圖解說明圖3A中所圖解說明之一迴路天線之一剖面。 Figure 3B generally illustrates a cross section of one of the loop antennas illustrated in Figure 3A.

圖4大體圖解說明一實例性調幅(AM)數位分離器。 Figure 4 illustrates generally an exemplary amplitude modulation (AM) digital bit splitter.

圖5圖解說明允許傳輸器在無一單獨振盪器之情況下操作之一實例性AM數位分離器。 Figure 5 illustrates an exemplary AM digital bit splitter that allows the transmitter to operate without a single oscillator.

圖6大體圖解說明包含用於耦合一實例性數位分離器之經分離組件之一波導結構的一積體電路封裝。 Figure 6 generally illustrates an integrated circuit package including a waveguide structure for coupling a discrete component of an exemplary digital separator.

圖7大體圖解說明包含一實例性曲折電感器/天線結構之一積體電路封裝。 Figure 7 generally illustrates an integrated circuit package including an exemplary meandering inductor/antenna structure.

圖8大體圖解說明包含偶極天線之一實例性數位分離器。 Figure 8 generally illustrates an exemplary digital separator including one of the dipole antennas.

圖9大體圖解說明包含端部負載偶極天線之一實例性數位分離器。 Figure 9 generally illustrates an exemplary digital separator including an end load dipole antenna.

本申請案尤其論述用於跨越一分離障壁通訊之方法及設備,且更特定而言,論述跨越允許在分離組件之間無顯著能量轉移之情況下測試組件層級之分離順從性的一分離障壁通訊之方法及設備。現有光耦合器技術允許組件層級之分離測試,但不特別可靠或快速。此外,光耦合器技術不提供成本及大小可藉以隨每一代技術而改良的CMOS技術之益處。依賴介電分離之現有數位分離器可提供速度及可靠性,但不提供針對對分離標準之完全組件層級順從性進行測試的能力。 In particular, the present application discusses methods and apparatus for communicating across a split barrier, and more particularly, a split barrier communication that spans the separation compliance of test component levels without significant energy transfer between separate components. Method and equipment. Existing optocoupler technology allows for separation testing of component levels, but is not particularly reliable or fast. In addition, optocoupler technology does not provide the benefits of cost and size CMOS technology that can be improved with each generation of technology. Existing digital splitters that rely on dielectric separation provide speed and reliability, but do not provide the ability to test full component level compliance for separation standards.

本發明者已經意識到,可去除對一介電分離裝置(例如,電容器或變壓器)之需要的一電分離技術可提供速度及可靠性,且可提供針對完全組件層級之分離順從性進行測試之能力。在特定實例中,該技術可用於在一系統之高壓部分與低壓部分之間傳遞數位資料。例如,該技術可用於在除該分離技術之外為彼此電分離的兩個積體電路之間傳遞資料。該技術可包含經由耦合之振盪器之一無線實施方案。可經由注入鎖定耦合之振盪器完成資料傳輸,其中一傳輸側(TX)可經由數位輸入控制被驅動至一已知頻率且接收側(RX)可鎖定至已知頻率並可解調變資料。在特定實例中,注入鎖定耦合之振盪器可利用CMOS技術之益處並仍能夠滿足組件層級之分離標準。該技術可用於諸多應用中,包括(但不限於)功率轉換、分離閘驅動器、高速數位分離器及電流感測器。 The inventors have appreciated that an electrical separation technique that removes the need for a dielectric separation device (e.g., a capacitor or transformer) can provide speed and reliability, and can provide for separation compliance testing at the full component level. ability. In a particular example, the technique can be used to transfer digital data between a high voltage portion and a low voltage portion of a system. For example, the technique can be used to transfer data between two integrated circuits that are electrically separated from one another in addition to the separation technique. The technique can include a wireless implementation via one of the coupled oscillators. Data transfer can be accomplished via an injection-locked coupled oscillator, where a transmit side (TX) can be driven to a known frequency via digital input control and the receive side (RX) can be locked to a known frequency and can demodulate the variable data. In a particular example, an oscillator that injects a lock-couple can take advantage of the benefits of CMOS technology and still be able to meet the separation criteria of the component hierarchy. This technology can be used in a variety of applications including, but not limited to, power conversion, split gate drivers, high speed digital separators, and current sensors.

圖1A大體圖解說明一實例性數位分離器100。數位分離器100可包含分開一距離(M)之第一積體電路或晶片101及第二積體電路或晶片102。在特定實例中,第一積體電路晶片101可包含一傳輸器電路 (TX0)且第二積體電路晶片102可包含一無線接收器電路(RX0)。可使用一鎖相迴路(未展示)在一第一載波頻率下調變傳入數位信號(D0IN)。在特定實例中,該頻率可在吉赫範圍內,但其他範圍係可能的且可取決於應用及所使用技術。在特定實例中,一傳輸天線(諸如,一單迴路傳輸電感器103、104)可耦合至傳輸器電路(TX0)且一接收天線(諸如,一單迴路接收電感器104)可耦合至接收器電路(RX0)。在特定實例中,接收器電路可包含一注入鎖定振盪器(ILO)。 FIG. 1A generally illustrates an example digital separator 100. The digital separator 100 can include a first integrated circuit or wafer 101 and a second integrated circuit or wafer 102 separated by a distance (M). In a particular example, first integrated circuit die 101 can include a transmitter circuit (TX0) and second integrated circuit die 102 can include a wireless receiver circuit (RX0). An in-phase digital signal (D0 IN ) can be modulated at a first carrier frequency using a phase locked loop (not shown). In a particular example, the frequency may be in the GHz range, but other ranges are possible and may depend on the application and the technology used. In a particular example, a transmit antenna (such as a single loop transmit inductor 103, 104) can be coupled to the transmitter circuit (TX0) and a receive antenna (such as a single loop receive inductor 104) can be coupled to the receiver Circuit (RX0). In a particular example, the receiver circuit can include an injection locked oscillator (ILO).

在特定實例中,數位分離器100可用於將資訊自一第一積體電路傳遞至一第二積體電路。數位分離器100之分離功能可在(例如)一第一高電壓積體電路與一第二低電壓積體電路之間的電分離中係非常有用的。可經由注入鎖定耦合之振盪器執行所接收資料(D0IN)之傳輸,其中傳輸器電路(TX0)經由數位輸入控制被驅動至一預定頻率且接收器電路(RX0)可鎖定至該預定頻率上並解調變輸出資料(D0OUT)。 In a particular example, the digital separator 100 can be used to transfer information from a first integrated circuit to a second integrated circuit. The separation function of the digital separator 100 can be very useful, for example, in the electrical separation between a first high voltage integrated circuit and a second low voltage integrated circuit. Transmission of the received data (D0 IN ) may be performed via an oscillator coupled to the lock-coupled coupling, wherein the transmitter circuit (TX0) is driven to a predetermined frequency via digital input control and the receiver circuit (RX0) is lockable to the predetermined frequency And demodulate the variable output data (D0 OUT ).

圖1B大體圖解說明一實例性多通道雙向數位分離器100。數位分離器100可包含分開一距離(M)之第一積體電路晶片101及第二積體電路晶片102。在特定實例中,每一晶片101、102可包含一無線傳輸器電路(TX0、TX1)及一無線接收器電路(RX0、RX1)。可使用每一傳輸器電路(TX0、TX1)之一鎖相迴路在多個頻率(f0、f1)下調變傳入數位信號(D0IN、D1IN)。在特定實例中,該等頻率可在吉赫範圍內,但其他範圍係可能的且可取決於應用及所使用技術。每一接收器電路(RX0、RX1)及傳輸器電路(TX0、TX1)可包含一天線,諸如一單迴路電感器。一傳輸器電感器與一接收器電感器之間的耦合可允許接收器振盪器鎖定至傳輸器電路頻率上並解調變數位資料。在特定實例中,代替使用磁耦合之單迴路天線,一數位分離器可使用諧振天線產生並維持數位分離器之兩側之間的一通訊連結。在特定實例中,使用諧振天線可簡化傳輸或接收器電路,從而消除一或多個放大器或濾波器。 在特定實例中,諧振傳輸及接收器電路之複數阻抗可彼此匹配而非匹配至一任意標準(諸如,一50ohm終端標準),以提供電路之更有效通訊耦合。尤其係若使用一注入鎖定振盪器方案,則此耦合可顯著減少電路之功率消耗,此乃因此等方案不傳輸與現有變壓器分離方案一樣多的能量。下文論述某些諧振天線之實例。 FIG. 1B generally illustrates an exemplary multi-channel bidirectional digital separator 100. The digital separator 100 may include a first integrated circuit chip 101 and a second integrated circuit wafer 102 separated by a distance (M). In a particular example, each of the wafers 101, 102 can include a wireless transmitter circuit (TX0, TX1) and a wireless receiver circuit (RX0, RX1). The phase-locked loop can be used to modulate the incoming digital signals (D0 IN , D1 IN ) at multiple frequencies (f 0 , f 1 ) using one of each of the transmitter circuits (TX0, TX1). In a particular example, the frequencies may be in the GHz range, but other ranges are possible and may depend on the application and the technology used. Each receiver circuit (RX0, RX1) and transmitter circuit (TX0, TX1) may comprise an antenna, such as a single loop inductor. The coupling between a transmitter inductor and a receiver inductor allows the receiver oscillator to lock to the transmitter circuit frequency and demodulate the variable bit data. In a particular example, instead of using a magnetically coupled single loop antenna, a digital splitter can use a resonant antenna to generate and maintain a communication link between the two sides of the digital separator. In a particular example, the use of a resonant antenna simplifies the transmission or receiver circuitry, thereby eliminating one or more amplifiers or filters. In a particular example, the complex impedances of the resonant transmission and receiver circuits can be matched to one another rather than to an arbitrary standard (such as a 50 ohm termination standard) to provide a more efficient communication coupling of the circuit. In particular, if an injection-locked oscillator scheme is used, this coupling can significantly reduce the power consumption of the circuit, so that the scheme does not transmit as much energy as the existing transformer separation scheme. Examples of certain resonant antennas are discussed below.

圖2圖解說明一實例性數位分離器200之一俯視圖。數位分離器200可包含在第一積體電路201之一頂表面上之一傳輸器單迴路電感器203及在第二積體電路晶片202之一頂表面上之一接收器單迴路電感器204。圖3A圖解說明具有面對彼此之迴路天線303、304之一實例性數位分離器300之一俯視圖。在特定實例中,數位分離器300可包含一第一積體電路晶片301及一第二積體電路晶片302。迴路天線303、304可製作成每一各別晶片之若干層使得該等迴路面對彼此以更直接耦合。圖3B大體圖解說明於圖3A中圖解說明之一迴路天線304之一剖面。在特定實例中,數位分離器300可包含在第一積體電路晶片301之一側表面上之一傳輸器單迴路電感器303及在第二積體電路晶片302之一側表面上之一接收器單迴路電感器304。在特定實例中,一單迴路電感器可提供高自諧振頻率。在某些實例中,一窄單迴路可提供相對於互感之較低自電感。在特定實例中,單迴路與積體電路晶片之整合製作可利用用於製作積體電路晶片之標準CMOS製作程序。 FIG. 2 illustrates a top view of an exemplary digital separator 200. The digital separator 200 may include one of the transmitter single loop inductor 203 on one of the top surfaces of the first integrated circuit 201 and one of the receiver single loop inductors 204 on one of the top surfaces of the second integrated circuit wafer 202. . FIG. 3A illustrates a top view of one exemplary digital separator 300 having loop antennas 303, 304 facing each other. In a particular example, the digital separator 300 can include a first integrated circuit die 301 and a second integrated circuit die 302. Loop antennas 303, 304 can be fabricated as layers of each individual wafer such that the loops are more directly coupled to each other. FIG. 3B generally illustrates a cross section of one of the loop antennas 304 illustrated in FIG. 3A. In a specific example, the digital separator 300 may include one of the transmitter single-loop inductor 303 on one side surface of the first integrated circuit wafer 301 and one of the side surfaces on one side of the second integrated circuit wafer 302. Single-loop inductor 304. In a particular example, a single loop inductor can provide a high self resonant frequency. In some instances, a narrow single loop can provide a lower self inductance relative to the mutual inductance. In a particular example, the integrated fabrication of single-loop and integrated circuit chips can utilize standard CMOS fabrication processes for fabricating integrated circuit chips.

在特定實例中,數位分離器之每一側可包含耦合至一天線/電感器用於調變在分離器之不同半體之間傳遞之數位資料的一電壓控制振盪器(VCO)。在特定實例中,可限制一數位分離器之注入鎖定範圍。在某些實例中,可基於以下公式限制注入鎖定範圍: In a particular example, each side of the digital separator can include a voltage controlled oscillator (VCO) coupled to an antenna/inductor for modulating digital data transferred between different halves of the splitter. In a particular example, the injection locking range of a digital separator can be limited. In some instances, the injection locking range can be limited based on the following formula:

其中E可為自振盪接收器迴路之電壓,且E 1 可為來自傳輸天線/電 感器/線圈之所感應電壓。在特定實例中,耦合係數可為極低的(例如,1%至4%)。若對於一15千兆赫(GHz)載波而言Q=7,則鎖定範圍可在約10兆赫(MHz)與約40MHz之間。在特定實例中,可拒斥直流(DC)組件且由一相位鎖定迴路(PLL)濾波器大大衰減其他諧波,因此在鎖定範圍內產生一極窄頻帶系統。在特定實例中,該系統可使用調幅(AM)來交換資料。在某些實例中,具有與上文闡述之FM數位分離器相同的頻率選擇性之一AM數位分離器可包含具有大於500之一Q的一低雜訊放大器。 Where E can be the voltage of the self-oscillating receiver loop and E 1 can be the induced voltage from the transmitting antenna/inductor/coil. In a particular example, the coupling coefficient can be extremely low (eg, 1% to 4%). If Q = 7 for a 15 gigahertz (GHz) carrier, the lock range can be between about 10 megahertz (MHz) and about 40 MHz. In a particular example, a direct current (DC) component can be rejected and the other harmonics are greatly attenuated by a phase locked loop (PLL) filter, thus creating a very narrow band system within the locked range. In a particular example, the system can use amplitude modulation (AM) to exchange data. In some examples, an AM digital bit splitter having the same frequency selectivity as the FM digital bit splitter set forth above can include a low noise amplifier having a Q greater than 500.

圖4大體圖解說明包含一傳輸器電路401及一接收器電路402之一實例性AM數位分離器400。在特定實例中,傳輸器電路401可包含一傳輸振盪器420、一調變開關421(諸如,一電晶體)、一功率放大器422及一天線403或電感器。在特定實例中,調變開關可受輸入數位資料DIN控制。在特定實例中,接收器電路402可包含一天線404或電感器、一低雜訊放大器423、一非線性濾波器424及一功率偵測器425。 在特定實例中,低雜訊放大器423可調諧為關於傳輸頻率之一帶通濾波器。非線性濾波器424可提供一直流位準信號,功率偵測器425可使用該直流位準信號來提供數位輸出資訊(DOUT)。傳輸器401及接收器402(包含天線403、404)可彼此實體分開以提供耦合至傳輸器電路401及接收器電路402之對應電路之間的電分離。所圖解說明之1mm分開係一分開距離之一項實例。在特定實例中,在不偏離本發明標的物之範疇之情況下分開距離可大於或小於1mm。在特定實例中,數位分離器包含將傳輸器電路401及接收器電路402囊封在一起之囊封材料。 FIG. 4 generally illustrates an exemplary AM digital bit separator 400 including a transmitter circuit 401 and a receiver circuit 402. In a particular example, transmitter circuit 401 can include a transmit oscillator 420, a modulation switch 421 (such as a transistor), a power amplifier 422, and an antenna 403 or inductor. In a particular example, the modulation switch can be controlled by the input digital data D IN . In a particular example, receiver circuit 402 can include an antenna 404 or inductor, a low noise amplifier 423, a nonlinear filter 424, and a power detector 425. In a particular example, the low noise amplifier 423 can be tuned to one of the bandpass filters for the transmission frequency. The nonlinear filter 424 can provide a DC output level signal that the power detector 425 can use to provide digital output information (D OUT ). Transmitter 401 and receiver 402 (including antennas 403, 404) may be physically separate from each other to provide electrical separation between the corresponding circuits coupled to transmitter circuit 401 and receiver circuit 402. The illustrated 1 mm separation is an example of a separate distance. In a particular example, the separation distance may be greater than or less than 1 mm without departing from the scope of the subject matter of the invention. In a particular example, the digital separator includes an encapsulating material that encloses the transmitter circuit 401 and the receiver circuit 402 together.

圖5圖解說明允許傳輸器在無一單獨振盪器之情況下操作且允許接收器502在無一低雜訊放大器之情況下操作之一實例性AM數位分離器。傳輸器501可包含藉助一負阻抗530驅動之一阻抗變換電路531及天線503以維持自振盪。自振盪之頻率可經設計以在分離器500之最大 耦合頻率處或附近。可藉助數位資料(DIN)啟用/停用負阻抗530。在特定實例中,可藉助經減少數目個組件實施實例性分離電路500。 Figure 5 illustrates an exemplary AM digital bit splitter that allows the transmitter to operate without a single oscillator and allows the receiver 502 to operate without a low noise amplifier. Transmitter 501 can include one of impedance conversion circuit 531 and antenna 503 driven by a negative impedance 530 to maintain self-oscillation. The frequency of the self-oscillation can be designed to be at or near the maximum coupling frequency of the splitter 500. Negative impedance 530 can be enabled/disabled by means of digital data (D IN ). In a particular example, the example separation circuit 500 can be implemented with a reduced number of components.

圖6大體圖解說明包含用於耦合一實例性數位分離器之經分離組件之一波導結構652的一積體電路封裝651。波導結構652可製作在數位分離器之傳輸器積體電路或接收器積體電路中之一或多者之一側或頂部上。在特定實例中,波導結構652可包含用於將波導結構652耦合至傳輸器電路或接收器電路之波導跡線653以及第一埠654及第二埠655。當每一匝之長度相對於信號波長係顯著的時,波導結構之多匝組件可改善可在圖2、圖3A及圖3B中圖解說明之迴路結構中普遍存在之場相消效應。地面回波平面可確保場保持在線圈與平面之間,其中介電常數係較高的且因此波傳播時間較長。在特定實例中,波導跡線之長度可小於1mm。在某些實例中,波導跡線之長度可為大約無線信號波長之1/16。在某些實例中,迴路端部寬度(WEL)尺寸可為波導跡線之長度(L)之二十分之一至四分之一。 Figure 6 generally illustrates an integrated circuit package 651 comprising a waveguide structure 652 for coupling a discrete component of an exemplary digital separator. The waveguide structure 652 can be fabricated on one or more of one or more of the transmitter integrated circuit or the receiver integrated circuit of the digital separator. In a particular example, waveguide structure 652 can include waveguide traces 653 for coupling waveguide structure 652 to a transmitter circuit or a receiver circuit, as well as first and second turns 654, 655. When the length of each turn is significant relative to the signal wavelength, the multi-turn assembly of the waveguide structure can improve the field cancellation effects that are ubiquitous in the loop structures illustrated in Figures 2, 3A, and 3B. The ground echo plane ensures that the field remains between the coil and the plane, where the dielectric constant is higher and therefore the wave propagation time is longer. In a particular example, the length of the waveguide trace can be less than 1 mm. In some examples, the length of the waveguide trace can be approximately 1/16 of the wavelength of the wireless signal. In some examples, the loop end width (W EL ) may be one-twentieth to one-quarter the length of the waveguide trace (L).

圖7大體圖解說明包含用於耦合一實例性數位分離器(諸如,圖1A、圖1B、圖4及圖5之實例性數位分離器)之經分離組件之一實例性曲折電感器/天線結構752的一積體電路封裝751。曲折電感器/天線結構752可製作在數位分離器之傳輸器積體電路或接收器積體電路中之一或多者之一側或頂部上。在特定實例中,曲折電感器/天線結構752可包含用於將曲折電感器/天線結構耦合至傳輸器電路或接收器電路之曲折跡線753以及第一埠754及第二埠755。在特定實例中,一曲折電感器/天線結構可經延伸以在傳輸波及接收波到達每一列之端部時啟用該波中之較大相移。在特定實例中,一列中之每一來回之自電感可被抵消。在特定實例中,可由長度L設定第一階自電感。在某些實例中,較大相移可啟用較大互感耦合。在特定實例中,一曲折電感器/天線結構732可保持一波沿著金屬跡線下方(接地平面上方)行進以改 良耦合。 FIG. 7 generally illustrates an exemplary meandering inductor/antenna structure including a separate component for coupling an exemplary digital separator, such as the exemplary digital separator of FIGS. 1A, 1B, 4, and 5. An integrated circuit package 751 of 752. The meandering inductor/antenna structure 752 can be fabricated on one or more of one or more of the transmitter integrated circuit or the receiver integrated circuit of the digital separator. In a particular example, the meandering inductor/antenna structure 752 can include meandering traces 753 for coupling the meandering inductor/antenna structure to the transmitter circuit or receiver circuit, and first and second turns 754, 755. In a particular example, a meandering inductor/antenna structure can be extended to enable a larger phase shift in the wave as it travels and the received wave reaches the end of each column. In a particular example, the self-inductance of each of the back and forth in a column can be cancelled. In a particular example, the first order self inductance can be set by the length L. In some instances, a larger phase shift can enable greater mutual inductance coupling. In a particular example, a meandering inductor/antenna structure 732 can maintain a wave traveling below the metal trace (above the ground plane) to change Good coupling.

圖8大體圖解說明包含偶極天線803、804之一實例性數位分離器800。在特定實例中,數位分離器800可包含一絕緣基板810、一第一積體電路801及一第二積體電路802。在特定實例中,第一積體電路801可包含一傳輸器且第二積體電路802可包含一接收器。一般而言,根據本發明標的物之一數位分離器可用於一電子裝置中以在該電子裝置之兩個電路或部分之間傳遞資訊同時維持該兩個電路或部分之間的電分離。在特定實例中,一偶極天線可與圖1A、圖1B、圖4及圖5之實例性電路一起使用。在某些實例中,偶極天線或諧振偶極天線可形成其所形成之對應通訊組件(諸如,圖1A、圖1B、圖4及圖5之實例性電路之傳輸器或接收器)之振盪器之部分。在此一組態中,偶極天線可去除與一非諧振天線相關聯之某些通訊組件且可節省相當大的晶粒空間。在特定實例中,偶極天線803、804可具有小於1mm之一長度。在某些實例中,偶極天線之長度可約為0.25mm或更短。 FIG. 8 generally illustrates an example digital separator 800 that includes one of dipole antennas 803, 804. In a specific example, the digital separator 800 can include an insulating substrate 810, a first integrated circuit 801, and a second integrated circuit 802. In a particular example, first integrated circuit 801 can include a transmitter and second integrated circuit 802 can include a receiver. In general, a digital separator in accordance with the subject matter of the present invention can be used in an electronic device to transfer information between two circuits or portions of the electronic device while maintaining electrical separation between the two circuits or portions. In a particular example, a dipole antenna can be used with the example circuits of Figures 1A, 1B, 4, and 5. In some instances, a dipole antenna or a resonant dipole antenna can form an oscillation of a corresponding communication component (such as a transmitter or receiver of the exemplary circuit of FIGS. 1A, 1B, 4, and 5) formed thereby. Part of the device. In this configuration, the dipole antenna removes certain communication components associated with a non-resonant antenna and can save considerable die space. In a particular example, the dipole antennas 803, 804 can have a length of less than 1 mm. In some examples, the dipole antenna can be about 0.25 mm or less in length.

圖9大體圖解說明包含端部負載偶極天線903、904之一實例性數位分離器900。在特定實例中,數位分離器900可包含一基板910、一第一積體電路901及一第二積體電路902。在特定實例中,第一積體電路801可包含一傳輸器且第二積體電路802可包含一接收器。一般而言,根據本發明標的物之一數位分離器可用於一電子裝置中以在該電子裝置之兩個電路或部分之間傳遞資訊同時維持該兩個電路或部分之間的電分離。另外,在特定實例中,在圖1A、圖1B、圖4、圖5、圖8及圖9中展示之數位分離器之組件可包含一囊封材料以囊封並保護數位分離器之組件且提供連接端子至外部電路。在特定實例中,一端部負載偶極天線903、904可與圖1A、圖1B、圖4及圖5中之實例性電路一起使用。在某些實例中,端部負載偶極天線或諧振端部負載偶極天線可形成其所形成之對應通訊組件(諸如,圖1A、圖1B、圖4及圖5之 實例性電路之傳輸器或接收器)之振盪器之部分。在此一組態中,端部負載偶極天線可去除與一非諧振天線相關聯之某些通訊組件且可節省相當大的晶粒空間。在特定實例中,偶極天線803、804可具有小於1mm之一長度。在某些實例中,偶極天線之長度可約為0.25mm或更短。 FIG. 9 generally illustrates an example digital separator 900 including one of end load dipole antennas 903, 904. In a specific example, the digital separator 900 can include a substrate 910, a first integrated circuit 901, and a second integrated circuit 902. In a particular example, first integrated circuit 801 can include a transmitter and second integrated circuit 802 can include a receiver. In general, a digital separator in accordance with the subject matter of the present invention can be used in an electronic device to transfer information between two circuits or portions of the electronic device while maintaining electrical separation between the two circuits or portions. Additionally, in a particular example, the components of the digital separator shown in Figures 1A, 1B, 4, 5, 8, and 9 can include an encapsulating material to encapsulate and protect the components of the digital separator. Provide connection terminals to external circuits. In a particular example, one end load dipole antennas 903, 904 can be used with the example circuits of Figures 1A, 1 B, 4, and 5. In some examples, an end-loaded dipole antenna or a resonant-end-loaded dipole antenna can form a corresponding communication component formed thereby (such as Figures 1A, 1B, 4, and 5) Part of the oscillator of the transmitter or receiver of an exemplary circuit. In this configuration, the end load dipole antenna removes certain communication components associated with a non-resonant antenna and can save considerable die space. In a particular example, the dipole antennas 803, 804 can have a length of less than 1 mm. In some examples, the dipole antenna can be about 0.25 mm or less in length.

一般而言,實例性數位分離器可製作為一系統且可包含一或多個傳輸器及一或多個對應接收器以形成一自含無線通訊系統。例如,此一系統之一益處係一設計師能夠使每一接收器電路阻抗匹配至對應傳輸器電路,或反之亦然,而非使一傳輸器或接收器之阻抗匹配至一業界標準,諸如50ohm。因而,該通訊系統可經設計以最小化空間同時維持速度及可靠性。藉由不將一數位分離器之組件之阻抗限制於一特定終端阻抗,天線可為相當小的且仍提供通訊以及使實體間隔適應維持電分離所需的效能。 In general, an exemplary digital separator can be fabricated as a system and can include one or more transmitters and one or more corresponding receivers to form a self-contained wireless communication system. For example, one benefit of such a system is that a designer can match each receiver circuit impedance to a corresponding transmitter circuit, or vice versa, rather than matching the impedance of a transmitter or receiver to an industry standard, such as 50 ohms. Thus, the communication system can be designed to minimize space while maintaining speed and reliability. By not limiting the impedance of the components of a digital separator to a particular termination impedance, the antenna can be relatively small and still provide communication and adapt the physical spacing to the performance required to maintain electrical separation.

不同於可對極端溫度敏感的光耦合器,實例性數位分離器可在一大溫度範圍內提供穩健分離及資料通訊。在特定實例中,一第一及第二積體電路可形成一實例性數位分離器。每一積體電路可包含一晶粒,該晶粒包含電路及使用一絕緣材料(諸如,聚醯胺)與該電路分開之一天線。替代將晶粒空間用於天線,此一結構可藉由堆疊天線及分離器電路來節省晶粒空間。 Unlike optocouplers that are sensitive to extreme temperatures, the example digital separator provides robust separation and data communication over a wide temperature range. In a particular example, a first and second integrated circuit can form an exemplary digital separator. Each of the integrated circuits may include a die comprising circuitry and an antenna separated from the circuit using an insulating material such as polyimide. Instead of using the die space for the antenna, this structure can save die space by stacking antenna and splitter circuits.

額外註釋Additional notes

在實例1中,一種電分離器可包含:一傳輸電路,其包含一傳輸天線,該傳輸電路經組態以接收數位資料並用該數位資料調變一傳輸信號,且使用該傳輸天線傳輸該傳輸信號,該傳輸信號具有一第一標稱頻率;及一接收電路,其機械耦合至該傳輸電路,該接收電路包含經組態以接收該傳輸信號之一接收天線,該接收電路經組態以使用一解調變時脈信號自該傳輸信號解調變出該數位資料並提供該數位資 料。 In Example 1, an electrical splitter can include: a transmit circuit including a transmit antenna configured to receive digital data and modulate a transmit signal with the digital data, and transmit the transmission using the transmit antenna a signal having a first nominal frequency; and a receiving circuit mechanically coupled to the transmitting circuit, the receiving circuit including a receiving antenna configured to receive the transmitted signal, the receiving circuit configured to Demodulating the digital data from the transmitted signal using a demodulated variable clock signal and providing the digital data material.

在實例2中,實例1之該接收電路視情況包含一注入鎖定振盪器,該注入鎖定振盪器經組態以接收該傳輸信號並鎖定至該第一標稱頻率上以提供該解調變時脈信號。 In Example 2, the receiving circuit of Example 1 optionally includes an injection-locked oscillator configured to receive the transmission signal and lock to the first nominal frequency to provide the demodulation time Pulse signal.

在實例3中,實例1至2中之任何一或多者之該注入鎖定振盪器視情況包含該接收天線。 In Example 3, the injection-locked oscillator of any one or more of Examples 1 to 2 includes the receiving antenna as appropriate.

在實例4中,實例1至3中之任何一或多者之該傳輸天線視情況與該接收天線分開約1毫米或更小。 In Example 4, the transmission antenna of any one or more of Examples 1 to 3 is optionally separated from the receiving antenna by about 1 mm or less.

在實例5中,一第一積體電路晶粒視情況包含實例1至4中之任何一或多者之該傳輸電路,一第二積體電路晶粒視情況包含實例1至4中之任何一或多者之該接收電路,且 實例1至4中之任何一或多者之該電分離器視情況包含一單個囊封件,該囊封件包含該第一積體電路晶粒及該第二積體電路晶粒。 In Example 5, a first integrated circuit die includes the transmission circuit of any one or more of Examples 1 to 4 as appropriate, and a second integrated circuit die includes any of Examples 1 to 4 as appropriate. One or more of the receiving circuits, and The electrical separator of any one or more of Examples 1 to 4 optionally includes a single encapsulant comprising the first integrated circuit die and the second integrated circuit die.

在實例6中,實例1至5中之任何一或多者之該傳輸天線視情況包含一單迴路電感器天線。 In Example 6, the transmission antenna of any one or more of Examples 1 to 5 optionally includes a single loop inductor antenna.

在實例7中,實例1至6中之任何一或多者之該傳輸天線視情況包含一偶極天線。 In Example 7, the transmission antenna of any one or more of Examples 1 to 6 optionally includes a dipole antenna.

在實例8中,實例1至7中之任何一或多者之該傳輸天線視情況包含一端部負載偶極天線。 In Example 8, the transmission antenna of any one or more of Examples 1 to 7 optionally includes an end-load dipole antenna.

在實例9中,實例1至8中之任何一或多者之該傳輸電路視情況包含一傳輸振盪器,且該傳輸振盪器視情況包含該傳輸天線。 In Example 9, the transmission circuit of any one or more of Examples 1 to 8 optionally includes a transmission oscillator, and the transmission oscillator optionally includes the transmission antenna.

在實例10中,實例1至9中之任何一或多者之該接收天線視情況包含一單迴路電感器天線。 In Example 10, the receiving antenna of any one or more of Examples 1 through 9 optionally includes a single loop inductor antenna.

在實例11中,實例1至10中之任何一或多者之該接收天線視情況包含一偶極天線。 In Example 11, the receiving antenna of any one or more of Examples 1 to 10 optionally includes a dipole antenna.

在實例12中,實例1至11中之任何一或多者之該接收天線視情況 包含一端部負載偶極天線。 In Example 12, the receiving antenna of any one or more of Examples 1 to 11 is as appropriate. Includes one end load dipole antenna.

在實例13中,實例1至12中之任何一或多者之該第一標稱頻率視情況高於8吉赫(GHz)。 In Example 13, the first nominal frequency of any one or more of Examples 1 through 12 is optionally higher than 8 Gigahertz (GHz).

在實例14中,實例1至13中之任何一或多者之該第一標稱頻率視情況在約8吉赫(GHz)與約40GHz之間。 In Example 14, the first nominal frequency of any one or more of Examples 1 through 13 is optionally between about 8 GHz and about 40 GHz.

在實例15中,一種系統可包含:一第一電路;一第二電路,其毗鄰並機械耦合至該第一電路;及一電分離器,其經組態以在該第一電路與該第二電路之間提供一通訊路徑並維持該第一電路與該第二電路之間的電分離;其中該電分離器可包含:一第一傳輸電路,其包含一第一傳輸天線,該傳輸電路經組態以自該第一電路接收第一數位資料並用該第一數位資料調變一第一傳輸信號,且使用該第一傳輸天線傳輸該第一傳輸信號,該第一傳輸信號具有一第一標稱頻率;及一第一接收電路,其包含:一第一接收天線,其經組態以接收該第一傳輸信號且使用一第一解調變時脈信號解調變該第一數位資料並提供該第一數位資料至該第二電路;及一第一注入鎖定振盪器,其經組態以接收該第一傳輸信號並鎖定至該第一標稱頻率上以提供該第一解調變時脈信號。 In Example 15, a system can include: a first circuit; a second circuit adjacent and mechanically coupled to the first circuit; and an electrical splitter configured to be in the first circuit and the first Providing a communication path between the two circuits and maintaining electrical separation between the first circuit and the second circuit; wherein the electrical separator may include: a first transmission circuit including a first transmission antenna, the transmission circuit Configuring to receive a first digital data from the first circuit and modulate a first transmission signal with the first digital data, and transmit the first transmission signal using the first transmission antenna, the first transmission signal having a first a first receiving circuit, comprising: a first receiving antenna configured to receive the first transmitted signal and demodulate the first digit using a first demodulated time-varying signal And providing the first digital data to the second circuit; and a first injection-locked oscillator configured to receive the first transmission signal and lock to the first nominal frequency to provide the first solution Modulate the clock signal.

在實例16中,實例1至15中之任何一或多者之該電分離器視情況包含:一第二傳輸電路,其包含一第二傳輸天線,該傳輸電路經組態以自該第二電路接收第二數位資料並用該第二數位資料調變一第二傳輸信號,且使用該第二傳輸天線傳輸該第二傳輸信號,該第二傳輸信號具有一第二標稱頻率;及一第二接收電路,其包含:一第二接收天線,該第二接收天線經組態以接收該第二傳輸信號且使用一第二解調變時脈信號解調變該第二數位資料並提供該第二數位資料至該第一電路;及一第二注入鎖定振盪器,其經組態以接收該第二傳輸信號且鎖定至該第二標稱頻率上以提供該第二解調變時脈信號。 In Example 16, the electrical separator of any one or more of Examples 1 to 15 optionally includes: a second transmission circuit including a second transmission antenna, the transmission circuit being configured to be from the second The circuit receives the second digit data and modulates a second transmission signal with the second digit data, and transmits the second transmission signal by using the second transmission antenna, the second transmission signal having a second nominal frequency; a receiving circuit comprising: a second receiving antenna configured to receive the second transmission signal and demodulate the second digital data using a second demodulated clock signal and provide the a second digital data to the first circuit; and a second injection-locked oscillator configured to receive the second transmission signal and lock to the second nominal frequency to provide the second demodulation time-varying signal.

在實例17中,一第一積體電路晶粒可包含該第一傳輸電路及該第二接收電路,一第二積體電路晶粒可包含該第二傳輸電路及該第一接收電路,且實例1至16中之任何一或多者之該電分離器視情況包含一單個囊封件,該囊封件包含該第一積體電路晶粒及該第二積體電路晶粒。 In the example 17, the first integrated circuit die may include the first transmission circuit and the second receiving circuit, and the second integrated circuit die may include the second transmission circuit and the first receiving circuit, and The electrical separator of any one or more of Examples 1 to 16 optionally includes a single encapsulant comprising the first integrated circuit die and the second integrated circuit die.

在實例18中,實例1至17中之任何一或多者之該第一傳輸天線及該第二傳輸天線中之至少一者視情況包含一端部負載偶極天線。 In Example 18, at least one of the first transmit antenna and the second transmit antenna of any one or more of Examples 1-17 optionally includes an end load dipole antenna.

在實例19中,實例1至18中之任何一或多者之該第一接收天線及該第二接收天線中之至少一者視情況包含一端部負載偶極天線。 In Example 19, at least one of the first receive antenna and the second receive antenna of any one or more of Examples 1-18 optionally includes an end load dipole antenna.

在實例20中,一種電分離器可包含:一傳輸電路,其包含一傳輸天線,該傳輸電路經組態以接收數位資料並用該數位資料調變一傳輸信號,且使用該傳輸天線傳輸該傳輸信號,該傳輸信號具有一第一標稱頻率;及一接收電路,其包含一接收天線,該接收天線經組態以接收該傳輸信號並使用一解調變時脈信號自該傳輸信號解調變出該數位資料並提供該數位資料,且其中該傳輸天線或該接收天線中之至少一者包含一諧振偶極天線。 In Example 20, an electrical splitter can include: a transmit circuit including a transmit antenna configured to receive digital data and modulate a transmit signal with the digital data, and transmit the transmission using the transmit antenna a signal having a first nominal frequency; and a receiving circuit including a receiving antenna configured to receive the transmitted signal and demodulate from the transmitted signal using a demodulated time-varying signal The digital data is derived and provided, and wherein at least one of the transmitting antenna or the receiving antenna comprises a resonant dipole antenna.

在實例21中,實例1至20中之任何一或多者之該諧振偶極天線視情況包含一端部負載偶極天線。 In Example 21, the resonant dipole antenna of any one or more of Examples 1 to 20 optionally includes an end-load dipole antenna.

在實例22中,實例1至21中之任何一或多者之該傳輸電路視情況包含一調幅(AM)傳輸電路。 In Example 22, the transmission circuit of any one or more of Examples 1 through 21 optionally includes an amplitude modulation (AM) transmission circuit.

以上詳細說明包含對隨附圖式之參考,該等隨附圖式形成詳細說明的一部分。該等圖式以圖解說明方式展示其中可實踐本發明之具體實施例。此等實施例在本文中亦稱作「實例」。此文件中所參考之所有公開案、專利及專利文件以全文引用方式併入本文中,好像個別地以引用方式併入。在此文件與以引用方式併入之彼等文件之間存在使用不一致的情況下,應將所併入之參考文獻之使用視為對此文件之 使用的補充;對於不可調和之不一致性,以此文件之使用為準。 The above detailed description contains a part of the accompanying drawings, which are incorporated in the drawings. The drawings illustrate the specific embodiments in which the invention may be practiced. These embodiments are also referred to herein as "examples." All publications, patents, and patent documents referred to in this document are hereby incorporated by reference in their entirety in their entirety in their entirety herein In the event of inconsistencies between the use of this document and its documents incorporated by reference, the use of the incorporated references shall be deemed to be Supplements used; for irreconcilable inconsistencies, the use of this document shall prevail.

在此文件中,如在專利文件中常見,使用術語「一(a)」或「一(an)」來包含一個或一個以上,獨立於任何其他例項或「至少一個」或「一或多個」之使用。在此文件中,使用術語「或」來係指一非排他性,或使得「A或B」包含「A但非B」、「B但非A」及「A及B」,除非另有指示。在隨附申請專利範圍中,將術語「包含(including)」及 「其中(in which)」用作各別術語「包括(comprising)」及「其中(wherein)」的普通英語等效形式。同樣,在以下申請專利範圍中,術語「包含(including)」及「包括(comprising)」為開放式的,亦即,包含除列於一請求項中之此一術語之後的彼等元件以外的元件之一系統、裝置、項目或程序仍被視為歸屬於彼請求項之範疇內。此外,在以下申請專利範圍中,術語「第一」、「第二」及「第三」等僅用作標籤,且不意欲對其目標施加數字要求。 In this document, as commonly found in patent documents, the terms "a" or "an" are used to include one or more, independent of any other item or "at least one" or "one or more. Use of. In this document, the term "or" is used to mean a non-exclusive or "A or B" includes "A but not B", "B but not A" and "A and B" unless otherwise indicated. In the scope of the accompanying patent application, the term "including" and "in which" is used as the ordinary English equivalent of the respective terms "comprising" and "wherein". Also, in the scope of the following claims, the terms "including" and "comprising" are open-ended, that is, include elements other than those listed after the term in a claim. A system, device, project or program of a component is still considered to be within the scope of the claims. Further, in the following claims, the terms "first", "second", "third" and the like are used merely as labels, and are not intended to impose numerical requirements on their objects.

以上說明意欲係說明性而非限制性。例如,上文所闡述之實例(或其一或多個態樣)可以彼此組合方式使用。例如,熟習此項技術者可在審閱以上說明後使用其他實施例。同樣,在以上實施方式中,各種特徵可分組在一起以組織本發明。此不應解釋為意指一未主張之所揭示特徵對任一請求項為必要的。而是,發明性標的物可在於少於一特定所揭示實施例之所有特徵。因此,特此將以下申請專利範圍併入至實施方案中,其中每一請求項獨立地作為一單獨實施例。本發明之範疇應參考隨附申請專利範圍連同授權於此等請求項之等效物之整個範疇一起來判定。 The above description is intended to be illustrative, and not restrictive. For example, the examples set forth above (or one or more aspects thereof) can be used in combination with one another. For example, those skilled in the art can use other embodiments after reviewing the above description. Also, in the above embodiments, various features may be grouped together to organize the present invention. This should not be construed as meaning that an unclaimed feature is essential to any claim. Instead, the inventive subject matter may be in less than all of the features of a particular disclosed embodiment. Accordingly, the scope of the following claims is hereby incorporated by reference in its entirety in its entirety in its entirety herein The scope of the invention should be determined with reference to the scope of the appended claims, together with the entire scope of the equivalents of the claims.

400‧‧‧實例性調幅數位分離器 400‧‧‧Example amplitude modulation digital separator

401‧‧‧傳輸器電路/傳輸器 401‧‧‧Transmitter circuit/transmitter

402‧‧‧接收器電路/接收器 402‧‧‧Receiver Circuit/Receiver

403‧‧‧天線 403‧‧‧Antenna

404‧‧‧天線 404‧‧‧Antenna

420‧‧‧傳輸振盪器 420‧‧‧Transmission Oscillator

421‧‧‧調變開關 421‧‧‧Transmutation switch

422‧‧‧功率放大器 422‧‧‧Power Amplifier

423‧‧‧低雜訊放大器 423‧‧‧Low noise amplifier

424‧‧‧非線性濾波器 424‧‧‧Nonlinear filter

425‧‧‧功率偵測器 425‧‧‧Power Detector

DIN‧‧‧輸入數位資料 D IN ‧‧‧Input digital data

DOUT‧‧‧數位輸出資訊 D OUT ‧‧‧Digital output information

Claims (22)

一種電分離器,其包括:一傳輸電路,其包含一傳輸天線,該傳輸電路經組態以接收數位資料並用該數位資料調變一傳輸信號,且使用該傳輸天線傳輸該傳輸信號,該傳輸信號具有一第一標稱頻率;一接收電路,其機械耦合至該傳輸電路,該接收電路包含經組態以接收該傳輸信號之一接收天線,該接收電路經組態以使用一解調變時脈信號自該傳輸信號解調變出數位資料並提供該數位資料。 An electrical splitter comprising: a transmit circuit comprising a transmit antenna configured to receive digital data and modulate a transmit signal with the digital data, and transmit the transmit signal using the transmit antenna, the transmit The signal has a first nominal frequency; a receiving circuit mechanically coupled to the transmitting circuit, the receiving circuit including a receiving antenna configured to receive the transmitted signal, the receiving circuit configured to use a demodulation The clock signal demodulates the digital data from the transmission signal and provides the digital data. 如請求項1之電分離器,其中該接收電路包含一注入鎖定振盪器,該注入鎖定振盪器經組態以接收該傳輸信號並鎖定至該第一標稱頻率上以提供該解調變時脈信號。 An electrical splitter as claimed in claim 1, wherein the receiving circuit comprises an injection-locked oscillator configured to receive the transmission signal and lock to the first nominal frequency to provide the demodulation time Pulse signal. 如請求項2之電分離器,其中該注入鎖定振盪器包含該接收天線。 The electrical splitter of claim 2, wherein the injection-locked oscillator comprises the receive antenna. 如請求項1之電分離器,其中該傳輸天線與該接收天線分開至少1毫米。 The electrical splitter of claim 1 wherein the transmit antenna is separated from the receive antenna by at least 1 millimeter. 如請求項1之電分離器,其中一第一積體電路晶粒包含該傳輸電路;其中一第二積體電路晶粒包含該接收電路;且其中該電分離器包含一單個囊封件,該囊封件包含該第一積體電路晶粒及該第二積體電路晶粒。 The electrical separator of claim 1, wherein a first integrated circuit die comprises the transmission circuit; wherein a second integrated circuit die comprises the receiving circuit; and wherein the electrical separator comprises a single encapsulation, The encapsulant includes the first integrated circuit die and the second integrated circuit die. 如請求項1之電分離器,其中該傳輸天線包含一單迴路電感器天線。 The electrical splitter of claim 1, wherein the transmit antenna comprises a single loop inductor antenna. 如請求項1之電分離器,其中該傳輸天線包含一偶極天線。 The electrical splitter of claim 1, wherein the transmit antenna comprises a dipole antenna. 如請求項1之電分離器,其中該傳輸天線包含一端部負載偶極天 線。 An electrical separator as claimed in claim 1, wherein the transmission antenna comprises a one-end load dipole day line. 如請求項1之電分離器,其中該傳輸電路包含一傳輸振盪器;且其中該傳輸振盪器包含該傳輸天線。 An electrical splitter as claimed in claim 1, wherein the transmission circuit comprises a transmission oscillator; and wherein the transmission oscillator comprises the transmission antenna. 如請求項1之電分離器,其中該接收天線包含一單迴路電感器天線。 The electrical splitter of claim 1 wherein the receive antenna comprises a single loop inductor antenna. 如請求項1之電分離器,其中該接收天線包含一偶極天線。 The electrical splitter of claim 1, wherein the receive antenna comprises a dipole antenna. 如請求項1之電分離器,其中該接收天線包含一端部負載偶極天線。 The electrical splitter of claim 1, wherein the receive antenna comprises a one-end load dipole antenna. 如請求項1之電分離器,其中該第一標稱頻率高於8吉赫(GHz)。 The electrical splitter of claim 1 wherein the first nominal frequency is above 8 GHz. 如請求項1之電分離器,其中該第一標稱頻率在約8吉赫(GHz)與約40GHz之間。 The electrical splitter of claim 1 wherein the first nominal frequency is between about 8 GHz and about 40 GHz. 一種系統,其包括:一第一電路;一第二電路,其毗鄰並機械耦合至該第一電路;及一電分離器,其經組態以在該第一電路與該第二電路之間提供一通訊路徑並維持該第一電路與該第二電路之間的電分離;其中該電分離器包含:一第一傳輸電路,其包含一第一傳輸天線,該傳輸電路經組態以自該第一電路接收第一數位資料並用該第一數位資料調變一第一傳輸信號,且使用該第一傳輸天線傳輸該第一傳輸信號,該第一傳輸信號具有一第一標稱頻率;及一第一接收電路,其包含:一第一接收天線,其經組態以接收該第一傳輸信號並使用一第一解調變時脈信號解調變該第一數位資料並提供該第一數位資料至該第二電路;及一第一注入鎖定振盪器,其經組態以接收該第一傳輸信 號並鎖定至該第一標稱頻率上以提供該第一解調變時脈信號。 A system comprising: a first circuit; a second circuit adjacent and mechanically coupled to the first circuit; and an electrical splitter configured to be between the first circuit and the second circuit Providing a communication path and maintaining electrical separation between the first circuit and the second circuit; wherein the electrical separator includes: a first transmission circuit including a first transmission antenna configured to The first circuit receives the first digital data and modulates a first transmission signal with the first digital data, and transmits the first transmission signal by using the first transmission antenna, the first transmission signal having a first nominal frequency; And a first receiving circuit, comprising: a first receiving antenna configured to receive the first transmission signal and demodulate the first digital data using a first demodulated time-varying signal and provide the first a digital data to the second circuit; and a first injection-locked oscillator configured to receive the first transmission signal And latching to the first nominal frequency to provide the first demodulated time-varying signal. 如請求項15之系統,其中該電分離器包含:一第二傳輸電路,其包含一第二傳輸天線,該傳輸電路經組態以自該第二電路接收第二數位資料並用該第二數位資料調變一第二傳輸信號,且使用該第二傳輸天線傳輸該第二傳輸信號,該第二傳輸信號具有一第二標稱頻率;及一第二接收電路,其包含:一第二接收天線,該第二接收天線經組態以接收該第二傳輸信號且使用一第二解調變時脈信號解調變該第二數位資料並提供該第二數位資料至該第一電路;及一第二注入鎖定振盪器,其經組態以接收該第二傳輸信號且鎖定至該第二標稱頻率上以提供該第二解調變時脈信號。 The system of claim 15, wherein the electrical splitter comprises: a second transmit circuit comprising a second transmit antenna, the transmit circuit configured to receive the second digital data from the second circuit and use the second digital Transmitting a second transmission signal, and transmitting the second transmission signal by using the second transmission antenna, the second transmission signal having a second nominal frequency; and a second receiving circuit comprising: a second receiving An antenna, the second receiving antenna configured to receive the second transmission signal and demodulate the second digital data using a second demodulated time-varying signal and provide the second digital data to the first circuit; A second injection-locked oscillator configured to receive the second transmission signal and to lock to the second nominal frequency to provide the second demodulated clock signal. 如請求項16之系統,其中一第一積體電路晶粒包含該第一傳輸電路及該第二接收電路;其中一第二積體電路晶粒包含該第二傳輸電路及該第一接收電路;且其中該電分離器包含一單個囊封件,該囊封件包含該第一積體電路晶粒及該第二積體電路晶粒。 The system of claim 16, wherein a first integrated circuit die includes the first transmission circuit and the second receiving circuit; wherein a second integrated circuit die includes the second transmission circuit and the first receiving circuit And wherein the electrical separator comprises a single encapsulation comprising the first integrated circuit die and the second integrated circuit die. 如請求項16之系統,其中該第一傳輸天線及該第二傳輸天線中之至少一者包含一端部負載偶極天線。 The system of claim 16, wherein at least one of the first transmit antenna and the second transmit antenna comprises an end load dipole antenna. 如請求項16之系統,其中該第一接收天線及該第二接收天線中之至少一者包含一端部負載偶極天線。 The system of claim 16, wherein at least one of the first receive antenna and the second receive antenna comprises an end load dipole antenna. 一種電分離器,其包括:一傳輸電路,其包含一傳輸天線,該傳輸電路經組態以接收數位資料並用該數位資料調變一傳輸信號,且使用該傳輸天線 傳輸該傳輸信號,該傳輸信號具有一第一標稱頻率;及一接收電路,其包含一接收天線,該接收天線經組態以接收該傳輸信號並使用一解調變時脈信號自該傳輸信號解調變出該數位資料並提供該數位資料;且其中該傳輸天線或該接收天線中之至少一者包含一諧振偶極天線。 An electrical splitter comprising: a transmit circuit comprising a transmit antenna configured to receive digital data and to modulate a transmit signal with the digital data, and to use the transmit antenna Transmitting the transmission signal, the transmission signal having a first nominal frequency; and a receiving circuit comprising a receiving antenna configured to receive the transmission signal and using a demodulated variable clock signal from the transmission The signal demodulates the digital data and provides the digital data; and wherein at least one of the transmitting antenna or the receiving antenna comprises a resonant dipole antenna. 如請求項20之電分離器,其中該諧振偶極天線包含一端部負載偶極天線。 The electrical splitter of claim 20, wherein the resonant dipole antenna comprises a one-end load dipole antenna. 如請求項20之電分離器,其中該傳輸電路包含一調幅(AM)傳輸電路。 The electrical splitter of claim 20, wherein the transmission circuit comprises an amplitude modulation (AM) transmission circuit.
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