TW201040642A - Electronic devices having plastic substrates - Google Patents

Electronic devices having plastic substrates Download PDF

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Publication number
TW201040642A
TW201040642A TW098141460A TW98141460A TW201040642A TW 201040642 A TW201040642 A TW 201040642A TW 098141460 A TW098141460 A TW 098141460A TW 98141460 A TW98141460 A TW 98141460A TW 201040642 A TW201040642 A TW 201040642A
Authority
TW
Taiwan
Prior art keywords
plastic
layer
substrate
thin film
plastic coating
Prior art date
Application number
TW098141460A
Other languages
Chinese (zh)
Other versions
TWI525375B (en
Inventor
Ian French
Original Assignee
Koninkl Philips Electronics Nv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninkl Philips Electronics Nv filed Critical Koninkl Philips Electronics Nv
Publication of TW201040642A publication Critical patent/TW201040642A/en
Application granted granted Critical
Publication of TWI525375B publication Critical patent/TWI525375B/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259Multistep manufacturing methods
    • H01L27/1262Multistep manufacturing methods with a particular formation, treatment or coating of the substrate
    • H01L27/1266Multistep manufacturing methods with a particular formation, treatment or coating of the substrate the substrate on which the devices are formed not being the final device substrate, e.g. using a temporary substrate
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136209Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1218Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or structure of the substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1248Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or shape of the interlayer dielectric specially adapted to the circuit arrangement
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78603Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the insulating substrate or support

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Nonlinear Science (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Ceramic Engineering (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Optics & Photonics (AREA)
  • Liquid Crystal (AREA)
  • Thin Film Transistor (AREA)

Abstract

A method of manufacturing a thin film electronic device comprises applying a first plastic coating (PI-1) directly to a rigid carrier substrate (40) and forming thin film electronic elements (44) over the first plastic coating. A second plastic coating (46) is applied over the thin film electronic elements with electrodes (47) on top, with a portion lying directly over the associated electronic element, spaced by the second plastic coating. The rigid carrier substrate (40) is released from the first plastic coating, by a laser release process. This method enables traditional materials to be used as the base for the electronic element manufacture, for example thin film transistors. The second plastic coating can form part of the known field shielded pixel (FSP) technology.

Description

201040642 六、發明說明: 【發明所屬之技術領域】 ㈣a婉上之電子裝置(如主動矩陣_ + 本發明係關於塑膠基板 予顯不 裝置)之製造。 【先前技術】 主動矩陣顯示器之最普通形式為一主動矩陣液晶顯示器 (AMLCD)。AMLCD通常製作在〇·7毫米厚的大玻螭基板 上。一單元需要兩瑰板’使得完成之顯示器僅超過1.4毫 米厚。行動電話製造商及一些膝上型電腦製造商需要更薄 及更輕的顯示器,立完成之單元可在一HF(氫氟酸)溶液中 變薄(通常)至約為0.8毫米厚。行動電話製造商理想上希望 該等顯示器甚至更薄’但已發現由此方法所製造之不足 0.8毫米厚之單元極易碎。 HF變薄法並不令人滿意’因為其為使用了難以安全及 經濟地處理掉之有害化學物質的一浪費處理。歸因於使玻 璃產生凹痕,在蝕刻處理期間亦存在某些成品率損失。許 多行動電話應用希望使用儘可能最薄及最輕的玻璃或塑膠 基材顯示器。 (吾人)已認識到輕、剛硬及薄的塑膠AMLCD作為一替代 物有利可圖。最近’對塑膠顯示器之興趣有增無減,部分 歸因於在行動電話及PDA中越來越多使用彩色AMLCD。 最近已有大量研究投向在塑膠基板上之AMLCD及有機發 光二極體(OLED)顯米态。儘管有此興趣,仍需要用於塑 膠顯不器之大批量生產的一合理製造途徑(manufacturing 144577.doc 201040642 route) ° 已報導用於在塑膠基板上製造薄膜電晶體(tft)或顯示 杰的許多不同方式。 在W0 05/050754中描述一種技術,其中製造包括一剛性 載體基板及在該剛性載體基板上方之一塑膠基板的一基板 配置。在該塑膠基板上方形成像素電路及顯示單元後自該 塑膠基板釋放該剛性載體基板。此能採用大體上習知的基 ▲ 板處置、處理及單元製作。 〇 為自一玻璃載體釋放該塑膠基板’通常使用一加熱法。 藉由加熱該玻璃及該塑膠基板,而自該玻璃載體釋放在該 塑勝基板及該基板上所形成之電子组件。 存在可使該塑膠基板與該玻璃載體分開的各種方法。在 W0 05/050754中所建議之-釋放方法為—雷射剝離⑽打 lift-off)處理。使用紫外線波長之雷射光以導致自該下伏 載體剝離該塑膠基板。建議該釋放方法為歸因於多光子處 〇 理(包含局部化加熱)所致的一光燒蝕處理。用於此處理之 一建議材料為聚醯亞胺,選擇聚醯亞胺之原因為聚醯亞胺 之高溫穩定性及uv能量之高吸收性。 使用一加熱效應來自該玻璃剝離該塑膠基板存在若干潛 在問題。需要足够能量來使剝離發生,但不損傷該塑膠基 板或在該塑膠基板上所形成之組件,此可引起熱膨脹效 應。 在使用一雷射剝離處理時,在UV光譜範圍内之較長波 長為宜’因為較短波長更多被該玻璃基板吸收,使該雷射 144577.doc 201040642 釋放不太有政。例如,在3〇8奈米或351奈米下操作的商業 上可購得之雷射為宜。 在此專較長波長下’塑膠層内所吸收之能量被統計地分 佈而不需塑膠聚合物分子内之完全熱化。此導致局部發熱 效應,繼而該等局部發熱效應可導致該塑膠基板或安褒在 八上之汶等'、且件的損傷。此亦可導致自該載體之部分剝離 或不良剝離。 EPLaR(雷射釋放塑基電子)處理原則上可連同各種不同 材料-起使用,但用於該EpLaR處理之理想基板被視為是 聚醯亞胺,但此並不適於連同大多數咖顯示效果一起使 用。EPLaR處理之—實例使用以下步驟: -以將聚醯亞胺旋轉塗覆至一玻璃基板上為開始。重要 的疋使用具有李父低熱膨脹係數的正確聚醯亞胺。通常施加 1〇微米的聚醯亞胺,但可使用3微米至25微米範圍内或更 大的層。此% St亞胺將最終形纟&性顯示|| U子產品之 塑膠基板。 將一層氮化矽鈍化層沈積在該聚醯亞胺上。 標準的非晶矽薄膜電晶體(a_Si TFT)製造。 將一電泳箔層積至TFT陣 上獲得一完全工作的電泳顯示器,且-薄聚醯亞胺, 介於該玻璃基板與該TFT陣列之間。 -將該聚醯亞胺之背部曝露於可穿過該破璃但在該聚居 亞胺内被強烈吸收的一雷射。此實際上意謂著該雷射必》 在300奈米至41〇奈米的光譜範圍内發射。—準分子雷射7 144577.doc 201040642 連同351奈米之波長—起使用,但可使用其他波長,如如 奈米。該雷射在經燒姓的一薄(可能為幾埃)聚酿亞胺層内 被強烈吸收。此在該玻璃上留下一極薄的聚醯亞胺層(通 常小於15奈米)且釋放該聚醯亞胺層之大部分。實際上該 雷射釋放之聚醯亞胺層整體將為丨〇微米厚。 -肖於EPLaR處理的該等聚醯亞胺在機械強度、最大處理 溫度、穩定性及處理化學物質之耐性方面具有極佳屬性。 〇 該裝置可用於反射顯示器及發射顯示器,但其具有黃顏 料。此對透射顯示器(其中光穿過該基板)並不理想。甚至 更中肯而tr,該等聚醯亞胺具有由該旋轉塗覆處理所誘發 的任意光學雙折射。此意謂著該等聚醯亞胺基板並不適於 連同包含大多數LCD效果的任一顯示效果(其使用偏振光) 一起使用。 申請人已執行將透明塑膠層(矽酮樹脂、bcb及聚對二 甲苯)用作為基板及一下伏吸收層(如非晶石夕)的實驗。此等 〇 透明塑膠被發現具有較低的強度且在雷射釋放時分解。另 外,剩下的困難為妥善處理非晶矽或以以TFT之標準處理 溫度及妥善處理可能的某些處理化學物質。 【發明内容】 根據本發明,提供一種製造一薄膜電子裝置之方法,該 方法包括: 將一第一塑膠塗層直接施加至一剛性載體基板; 在該第一塑膠塗層上方形成薄膜電子元件; 將一第二塑膠塗層施加在該等薄膜電子元件上方; 144577.doc 201040642 ’各電極連同至少—相 且該電極包含直接位於 ’該電極與該相關聯之 及 在該第二塑膠塗層上方形成電極 關聯之電子元件一起形成一電路, 該相關聯之電子元件上方的一部分 電子元件被該第二塑膠塗層隔開; 塑膠塗層釋放該剛性載 藉由一雷射釋放處理而自該第— 體基板。 此方法使得能夠使用習知之材料作為該電子元件(例如 薄膜電晶體)製造之基材。該第二塑膠塗層可形成已知場 屏蔽像素(FSP)技術之部分。 /電子元件製造之高溫處理步驟在該第一塑膠塗層上進 行,且該第-塑膠塗層在釋放處理期間提供強度。本發明 可用以形成僅具有塑膠基板的裂置,或裝置可具有一個玻 璃側及一個塑膠側。 施加該第一塑膠塗層可包括: 施加一第一塑膠層; 在該第一塑耀·層上方形成一 有對準於隨後形成該等薄膜電 及 金屬圖案,該第一塑膠層具 子元件之位置的圖案部分; 在該金屬圖案上方形成一第二塑膠層。 立此提供嵌於塑膠層之間的一金屬結構。藉由使該等金屬 B對準於該等電子元件,該等金屬部分可提供對準於該 等^子元件的—遮罩功能區。例如,可使用該金屬圖案作 為一遮罩來蝕刻該第一塑膠層,藉此形成對準於該等薄膜 電子元件的第一塑膠層部分。 144577.doc 201040642 如果使用本發明以丑;5 + τ 开ν成一 LCD顯不态’則以此方式自像 素區^移除塑膠。此意謂著可使用雙折射塑谬,如聚酿亞 胺。該聚醯亞胺作為一網格被留在顯示區域的下方,但其 亦可作為-連續層被留在邊緣互連區域的下方,以提供機 械支撐α為在電漿敍刻期間不施加機械力,所以該第二 塑膠塗層之強度為足夠。 Ο 在钱刻該第塑踢塗層後,偏振器可被層積至陣列上以 完成單元製造。 /亥方法可包括在該第一塑膠層之部分之間的空間内提供 彩色遽光器部分。士卜:留_ + & > ,. 此在早一主動板上提供彩色濾光器對 準。可在該等彩色遽光器部分上方提供一密封層。 取代形成塑膠部分,可在釋放該剛性载體基板後完全移 除該第一塑膠塗層。 該第:塑膠塗層可包括聚醯亞胺。可在形成該等薄膜電 子兀件前在該第一塑膠塗層上方形成一鈍化層。此 電子元件製造步驟提供-適合的表面。該鈍化層可包=氮 化矽。 /該第二塑膠塗層宜為不具有雙折射的一透明塑膠且具有 1微米至ίο微米的一厚度。此可起到在_Fsp像素内之場屏 蔽層的作用,在此情況下該等薄膜電子元件包括場屏蔽像 素薄膜電晶體。 忒方法可為一種用於製造一主動矩陣顯示裝置之方法, 其中: / 形成薄膜電子元件包括在該塑膠基板上方形成一像素電 H4577.doc 201040642 路陣列, 且其中該方法進—+ ^ 灾包括在自該第一塑膠塗層釋放該剛 性載體基板前在該傻去+ ^像素電路陣列上方形成一顯示層。 該方法可進一步 /匕括製造一第二基板配置,且其令在該 像素電路陣列上方形士 々 万浴成一顯示層包括安裝第一基板配置及 弟—基板配置且亦兩4J· ,、丨 先电材科夾於該等基板配置之間,該主動 矩陣顯示裝置藉此包括 弟基板及第一基板且該光電材料 央於该等基板之間。 此提供-種用於製造—顯示器之方法。製造該第二基板 ^括將-塑膠塗層施加至一剛性載體基板且在安裝該第 …土板配置及該第二基板配置後藉由—雷射釋放處理而自 該塑膠塗層釋放該剛性載體基板。 本發明亦提供—種薄膜電子裝置,其包括: -支撐結構’其包括若干塑膠部分,各塑膠部分在下方 具有-金屬塗層部分且該等塑膠部分之間具有填充空間; 一鈍化層,其在該支撐結構的上方; 工曰, 薄膜電子元件,該等薄膜電子元 午在D玄鈍化層上方且對 準於該等塑膠部分; 丁 一塑膠塗層’其在該等薄膜電子元件的上方·,及 電極,該等電極在該塑膠塗層的上 J上万’各電極連同至少 一相關聯之薄膜電子元件一起形成一雨 古社 吃路’且該電極包含 直接位於該相關聯之電子元件上 相Μ萨+ + π 3 —邛刀,該電極與該 相關知之電子元件被該塑膠塗層隔開。 【實施方式】 144577.doc •10- 201040642 現將參考附圖詳細地描述本發明之實例。 其中在巾請專利範圍中使用元件符號,此等元件符號僅 助於本發明之理解,且其等並非意欲限制。在處理序列圖 中,僅給出與處理流程之該部分有關的結構之零件的元件 符唬。將立即明白其他特徵仍相同於先前處理流程圖中之 - 特徵。 - 本發明提供—種製造方法,其能使用基於-場屏蔽像素 ❹ AM-LCD處理的—雷射釋放(EpLaR)處理以允許在標準πτ 工廠中衣&撓性彩色LCD顯示器。在詳細解釋本發明前, 首先將描述該場屏蔽像素技術。 可在超過90%的當前TFT LCD顯示器模組(膝上型電 腦、LC-TV、行動電話等)中使用的標準τρτ結構具有在該 TFT上方的-較薄氮化石夕鈍化層,展示為圖^⑷之橫截面 中之SiN2。 圖1(a)展示具有一 SiN鈍化層的一標準TFT結構之一橫截201040642 VI. Description of the invention: [Technical field to which the invention pertains] (4) The manufacture of an electronic device (e.g., an active matrix _ + the present invention relates to a plastic substrate). [Prior Art] The most common form of active matrix display is an active matrix liquid crystal display (AMLCD). AMLCDs are typically fabricated on large 7 mm thick large glass substrates. A unit requires two slabs' so that the finished display is only over 1.4 mm thick. Mobile phone manufacturers and some laptop manufacturers need thinner and lighter displays, and the finished unit can be thinned (usually) to about 0.8 mm thick in an HF (hydrofluoric acid) solution. Mobile phone manufacturers ideally expect these displays to be even thinner, but it has been found that units of less than 0.8 mm thick manufactured by this method are extremely fragile. The HF thinning method is not satisfactory because it is a wasteful treatment using hazardous chemicals that are difficult to handle safely and economically. Due to the indentation of the glass, there is also some yield loss during the etching process. Many mobile phone applications want to use the thinnest and lightest glass or plastic substrate display possible. (Our) has recognized that light, rigid and thin plastic AMLCDs are profitable as an alternative. Recently, interest in plastic displays has increased, in part due to the increasing use of color AMLCDs in mobile phones and PDAs. Recently, a large number of researches have been conducted on AMLCDs and organic light-emitting diodes (OLEDs) on a plastic substrate. Despite this interest, there is still a need for a rational manufacturing approach for mass production of plastic displays (manufacturing 144577.doc 201040642 route) ° has been reported for the manufacture of thin film transistors (tft) or display on plastic substrates. Many different ways. A technique is described in WO 05/050754 in which a substrate arrangement comprising a rigid carrier substrate and a plastic substrate over the rigid carrier substrate is fabricated. After forming the pixel circuit and the display unit over the plastic substrate, the rigid carrier substrate is released from the plastic substrate. This can be accomplished using conventionally known substrate treatment, processing, and unit fabrication. 〇 In order to release the plastic substrate from a glass carrier, a heating method is usually used. The electronic component formed on the plastic substrate and the substrate is released from the glass carrier by heating the glass and the plastic substrate. There are various methods by which the plastic substrate can be separated from the glass carrier. The release method suggested in W0 05/050754 is - laser stripping (10) lift-off processing. Laser light of an ultraviolet wavelength is used to cause the plastic substrate to be peeled off from the underlying carrier. It is recommended that this release method be a photoablation process due to multiphoton chemistry (including localized heating). One of the suggested materials for this treatment is polyimine, and the reason for choosing polyimine is the high temperature stability of polyimine and the high absorbency of uv energy. There are several potential problems with peeling the plastic substrate from the glass using a heating effect. Sufficient energy is required to cause the peeling to occur without damaging the plastic substrate or the components formed on the plastic substrate, which can cause thermal expansion effects. When using a laser lift-off treatment, a longer wavelength in the UV spectral range is desirable because the shorter wavelength is more absorbed by the glass substrate, making the release of the laser 144577.doc 201040642 less political. For example, commercially available lasers operating at 3-8 nm or 351 nm are preferred. The energy absorbed in the plastic layer at this longer wavelength is statistically distributed without the need for complete heating within the plastic polymer molecules. This causes a localized heating effect, which in turn can cause damage to the plastic substrate or the ampule. This can also result in partial peeling or poor peeling from the carrier. EPLaR (laser-release plastic-based electronics) processing can be used in principle with a variety of different materials, but the ideal substrate for this EpLaR treatment is considered to be a polyimide, but this is not suitable for most coffee display effects. use together. EPLaR Treatment - The example uses the following steps: - Start with spin coating of polyimine onto a glass substrate. It is important to use the correct polyimine with a low coefficient of thermal expansion of the father. Typically, 1 μm of polyimine is applied, but layers in the range of 3 to 25 μm or larger can be used. This % St imine will eventually form a plastic substrate with a U-product. A passivation layer of tantalum nitride is deposited on the polyimine. Manufactured from standard amorphous germanium thin film transistors (a_Si TFT). An electrophoretic foil is laminated to the TFT array to obtain a fully operational electrophoretic display, and - a thin polyimine, between the glass substrate and the TFT array. - Exposing the back of the polyimine to a laser that can pass through the glass but is strongly absorbed in the polyimide. This actually means that the laser must be launched in the spectral range from 300 nm to 41 nm. - Excimer laser 7 144577.doc 201040642 Used in conjunction with the wavelength of 351 nm, but other wavelengths such as nanometers can be used. The laser is strongly absorbed in a thin (possibly several angstroms) polyimine layer of the burnt surname. This leaves a very thin layer of polyimine (usually less than 15 nm) on the glass and releases most of the polyimide layer. In fact, the laser-released polyimide layer will be 丨〇 micron thick overall. - The polyimine treated by Xiao in EPLaR has excellent properties in terms of mechanical strength, maximum processing temperature, stability and resistance to handling chemicals. 〇 This device can be used for reflective displays and launch displays, but it has yellow pigments. This pair of transmissive displays, where light passes through the substrate, is not ideal. Even more pertinent, tr, these polyimines have any optical birefringence induced by the spin coating process. This means that the polyimide substrates are not suitable for use with any display effect that includes most LCD effects, which uses polarized light. Applicants have performed experiments using a transparent plastic layer (anthrone resin, bcb, and parylene) as a substrate and a lower absorbing layer (e.g., amorphous). These 透明 transparent plastics were found to have lower strength and decompose when the laser is released. In addition, the remaining difficulties are proper handling of amorphous germanium or treatment of temperatures at the TFT standard and proper disposal of certain processing chemicals. SUMMARY OF THE INVENTION According to the present invention, a method of fabricating a thin film electronic device is provided, the method comprising: applying a first plastic coating directly to a rigid carrier substrate; forming a thin film electronic component over the first plastic coating; Applying a second plastic coating over the thin film electronic components; 144577.doc 201040642 'each electrode together with at least one phase and the electrode comprising directly located at the electrode associated with the second plastic coating The electronic components forming the electrodes together form a circuit, and a portion of the electronic components above the associated electronic components are separated by the second plastic coating; the plastic coating releases the rigid carrier from the laser release treatment — Body substrate. This method enables the use of a conventional material as a substrate for the manufacture of the electronic component (e.g., a thin film transistor). The second plastic coating can form part of a known field masked pixel (FSP) technique. The high temperature processing step of the electronic component fabrication is performed on the first plastic coating and the first plastic coating provides strength during the release process. The invention may be used to form a split having only a plastic substrate, or the device may have a glass side and a plastic side. Applying the first plastic coating layer may include: applying a first plastic layer; forming an alignment with the thin film electrical and metal patterns formed on the first plastic layer, the first plastic layer having sub-elements a pattern portion at a position; a second plastic layer is formed over the metal pattern. A metal structure embedded between the plastic layers is provided. By aligning the metals B to the electronic components, the metal portions can provide a masking functional area that is aligned with the components. For example, the metal pattern can be used as a mask to etch the first plastic layer, thereby forming a portion of the first plastic layer that is aligned with the thin film electronic components. 144577.doc 201040642 If the invention is used to ugly; 5 + τ is turned into an LCD display, then the plastic is removed from the pixel region. This means that a birefringent plastic such as a chitosan can be used. The polyimine is left as a grid below the display area, but it can also be left as a continuous layer below the edge interconnect area to provide mechanical support a for no mechanical application during plasma characterization Force, so the strength of the second plastic coating is sufficient.偏振 After the plastic kick coating, the polarizer can be laminated to the array to complete the cell fabrication. The method can include providing a color chopper portion in a space between portions of the first plastic layer.士卜:Leave _ + &> ,. This provides color filter alignment on the previous active board. A sealing layer can be provided over the portions of the color dimmers. Instead of forming the plastic portion, the first plastic coating can be completely removed after the rigid carrier substrate is released. The first: plastic coating may comprise polyimine. A passivation layer can be formed over the first plastic coating prior to forming the thin film electronic components. This electronic component manufacturing step provides a suitable surface. The passivation layer can be packaged = niobium nitride. The second plastic coating is preferably a transparent plastic having no birefringence and having a thickness of from 1 micron to ίο micron. This can function as a field mask in the _Fsp pixel, in which case the thin film electronic components include field shielded pixel film transistors. The method can be a method for manufacturing an active matrix display device, wherein: / forming a thin film electronic component comprises forming a pixel electric H4577.doc 201040642 road array above the plastic substrate, and wherein the method includes -> A display layer is formed over the stray +^ pixel circuit array prior to releasing the rigid carrier substrate from the first plastic coating. The method further or further includes fabricating a second substrate configuration, and wherein the square of the pixel circuit array is formed into a display layer including mounting the first substrate configuration and the second substrate configuration and also two 4J·, The first electrical material is sandwiched between the substrate configurations, and the active matrix display device includes a substrate and a first substrate, and the photovoltaic material is disposed between the substrates. This provides a method for manufacturing a display. Manufacturing the second substrate to apply a plastic coating to a rigid carrier substrate and releasing the rigidity from the plastic coating by a laser release treatment after mounting the first and second substrate configurations Carrier substrate. The present invention also provides a thin film electronic device comprising: - a support structure comprising a plurality of plastic portions, each plastic portion having a - metal coated portion underneath and having a filling space between the plastic portions; a passivation layer Above the support structure; a process, a thin film electronic component, the thin film electronic element is above the D-passivation layer and aligned with the plastic parts; and a plastic coating is disposed above the thin film electronic components And electrodes, which are formed on the upper surface of the plastic coating together with at least one associated thin film electronic component, and the electrode comprises directly associated with the associated electron The element is Μ + + + π 3 - a trowel which is separated from the associated electronic component by the plastic coating. [Embodiment] 144577.doc • 10-201040642 An example of the present invention will now be described in detail with reference to the accompanying drawings. The use of the component symbols in the scope of the patent application is to be understood as an understanding of the invention, and is not intended to be limiting. In the processing sequence diagram, only the component symbols of the parts of the structure associated with this part of the processing flow are given. It will be immediately understood that other features are still the same as those in the previous processing flowchart. - The present invention provides a manufacturing method that can use a -field-shielded pixel ❹ AM-LCD processed-laser release (EpLaR) process to allow for a flexible & color LCD display in a standard πτ factory. Before explaining the present invention in detail, the field masking pixel technique will first be described. A standard τρτ structure that can be used in more than 90% of current TFT LCD display modules (laptops, LC-TVs, mobile phones, etc.) has a thinner nitride nitride passivation layer over the TFT, shown as a SiN2 in the cross section of ^(4). Figure 1 (a) shows a cross section of a standard TFT structure having a SiN passivation layer

〇 面。圖1(b)展示具有較厚聚合鈍化層的一場屏蔽像素TFT 之一橫截面。 在圖1(a)中,玻璃基板展示為1〇,且在該基板上方提供 -第-閘極介電氮化碎層12。使用—第二氮化碎層14作為 一鈍化層。ITO像素電極展示為16,且像素TFT展示為 18 〇 圖i(b)的不同之處在於該第二氮化矽層14由一聚合介電 層20取代。 氮化矽(SiN)具有良好的介電及鈍化屬性,但其並不適 144577.doc 11 201040642 用於沈積超過0.5微米厚的SiN層,且通常使用〇 ^微米至 0.4微米。該SiN具有“的—介電常數。—薄層組合適” 的介電常數意謂著使用SiN作為一電介質的任何導電:: 具有-較高電容。此之結果為不允許IT〇像素覆蓋在金屬 行或TFT上。施加至該等行的電壓在每線定址時間而改變 且如果該ITO位於該等行上方,則電容性耦合可改變像素 上之電壓,導致垂直串擾。 μ 如果像素位於TFT上方,m其可充當一頂部閉極以部分 開啟處於關閉狀態的TFT,再次導致垂直串擾。ιτ〇可位 於列的上方’因為此僅在緊接在重新定址線前的每圖框時 間改變電壓一次。此對影像品質沒有可察覺之影響。 顯示器中之LCD材料僅回應於由像素上之電壓所誘發之 场且其在沒有ITO像素的區域中不切換1關像素可在標 準TFT結構中所處位置的限制,限制LCD顯示器之有效光 學孔隙’如圖2(a)中所示。 “圖2(a)展示一標準TFT結構之佈局,且沒有ιτ〇像素“覆 盍在行或TFT上。LCD僅在ΐτο像素16上方的區域中切 換。列線展示為22及行線展示為24,且像素電極^與”丁 之間藉由接觸孔2 6而接觸。 圖2(b)展示具有行及TFT上之IT〇像素電極的場屏蔽像素 TFT結構之佈局。該1TO像素遮罩的區域大於圖2(a)中所示 之枯準結構中之區域。特定言之,連同該TFT 一起形成一 包路的忒ITO像素電極直接位於相關聯之TFT的上方,具 肢而吕,忒ITO像素電極位於相關聯之TFT的閘極及通道 144577.doc 201040642 的上方。 使用圖1 (b)中之橫截面中所示之場屏蔽像素(Fsp)結構增 大像素之有效光學孔隙。在此情況下,一較厚聚合層取代 該標準TFT結構之較薄氮化矽鈍化層。該聚合層通常為2微 米或3微米厚且通常具有為3的一介電常數。此意謂著厚度 - 已增大10之因數(從微米至3微米)且介電常數已減小2之 - 因數。此使電容減小20之因數。此為足夠低以藉由來自行 0 之電容性耦合或藉由開啟TFT之背部通道而允許ITO像素 16覆盍在行及TFT上且不導致垂直事擾。 顯然鈍化層聚合物必須為高透射且沒有雙折射,因為其 位於穿過LCD之光的光學路徑中。BCB(苯并環丁烯)通常 用作為FSP結構中之聚合物,但其極昂貴且原則上亦可使 用可液體澆鑄的其他透明塑膠。 行動應用需要較薄的顯示器^ TFT通常被製作在〇 7毫米 厚的玻璃基板上且需要兩塊基板以製作標準lcd。加上偏 〇 振态及光學增強薄膜,此使AMLCD至少為1.4毫米厚。此 對行動電話應用而言為太厚,所以通常藉自一则虫刻而使 顯示器變薄直至在附接偏振器前兩塊基板均為Ο]毫米 厚。此為一極浪費與污染的處理且顯示器仍有〇6毫米 厚。製造商已發現如果他們試圖使顯示器進一步變薄,則 顯示器易折斷。 實現高光學孔隙AMLCD亦存在困難。在AMLCD製造中 所使用的圖案對準存在兩種不同的形式。第—種為光微影 對準,其用以積累-基板上之不同金屬、介電質及半導體 144577.doc 201040642 層的圖案。该技術為高精度,且對於AMLCD製造,通常 引用在可為2米*2米大小的基板上具有約2微米的—對準精 度貫際上,對準精度通常不到1微米。第二種對準為板 對板耦Q 。此使Lc單元之兩側一起對準。對於一 AMLCD通$將存在在—板上的—主動矩陣陣列及在另 板上的形色濾光器、黑色遮罩及ITO,如圖3(a)中所 示° 八穿過像素之中點的—橫截面且展示主動板3 〇及被 動板32。在圖3⑷中,q為行與像素之間的間隙,該間隙 必須大於約1微米以防止過多的電容性交叉耦合。L〗為黑 色遮罩34與IT0像素之間的重疊距離。^等於最小間隙尺 寸加上最大光微影未對準間隙。L2為兩塊板之間的最大未 對準距離。 板對板對準容限遠A於光微影對準容限。在接觸期間亦 可有某些移動且同時使密封線固〖,所以板對板的輕合精 度接近於1G微米。對於高品質顯示器,關鍵在於光僅能穿 過像素ιτ〇,#中該像素ΙΊΌ經調變以給出期望之光透射 級。可圍繞像素穿過且到達觀看者之任何光將降低對比率 且意謂著黑色狀態並不如其所能的那麼黑。此降低顯示效 能。因此該黑色遮罩必須;^夠大以適應該等板之間的對準 之變數’此減小光學孔隙。該黑色料越大,該光學孔隙 就越小,&意謂著更多電力必須用於光源以得到必要的亮 度。 圖叫用於「大孔隙」FSp AMLCD的主動板及被動板之 M4577.doc -】4- 201040642 對準。L為該黑色遮罩與該ITO像素之間的重疊距離。其等 於該兩塊板之間的最大未對準距離。 因此,該FSP結構增大光學孔隙,尤其是對於小像素。 最大化光學孔隙對於最大化顯示器之亮度及減少電力消耗 為重要’所以板對板搞合精度可有效為限制此等參數之因 數。改良該光學孔隙之一顯著方式為將彩色濾光器移至主 動板。對於玻璃基板’此可以兩種方法進彳干 ^ 该兩種方法 0 均已在研究實驗室中得到論證’但並不在批量生產中使 用。第一方法為將彩色濾光器放在TFT陣列的下方。已報 導此可將一 15英吋的XGA監測器之光學孔隙從約6〇%增大 至80%。該彩色濾光器通常由!微米至2微米厚的染色聚合 物製成且該染色聚合物給出一極不規則的輪廓。在此等不 規則表面上處理TFT存在嚴重的實際困難,但此處理之真 正問題為處理溫度。該等彩色濾光器禁止被加熱超過約 150°C ’否則該等彩色濾光器開始分解且損失其等之色彩 〇 飽和度。通常在超過3〇〇°C時TFT被沈積。此溫度可降低至 接近200°C,但如果此溫度繼續低於2〇(TC,則在一可接受 的顯示壽命期間TFT在變得極電不穩定。具有較差色彩飽 和度或不穩定的TFT為不可接受。 第二技術為使彩色濾光器在TFT陣列上方。進行此之最 簡單方法為僅在一標準TFT陣列之頂部放置一彩色濾光 。此並不實際’因為將一較厚聚合層安置在像素電極上 方顯著增大驅動電壓且引進歸因於在聚合物中之電荷移動 所致的影像殘留。可製作TFT陣列、沈積彩色濾光器,接 I44577.doc -15- 201040642 MIT◦放置在彩色渡光器上方,而且具有穿過彩色渡光 益層的電連接件。此為—困難處理,即控制·在所有彩色 渡光器層上之要求的良好漸變斜坡;具有用於沈積之限制 溫^m™;及在崎Λ區聚合層之頂部的ιτ〇之精確及 可靠圖案化。此處理並不表明已使其成為製造階段。 本發明提供改良之處理。以下給出三項實例用於利用一 改口良EPLaR處理來製作塑膠⑽,且給出—實例用於利用 -單-玻璃基板來製作高解析度之薄單元。在前兩項實施 例中’使用標準彩色濾光器技術。在標準TFt卫薇中實施 此等LCD為最簡單,但比較於標準玻璃基材lcd,其等具 有幾個額外的處理步驟。在第三實施例中,在已移除抓 側上之玻璃基板且已蝕刻聚醯亞胺電漿後, 喷㈣刷至該塑卿之TFT側上。具有喷墨印;;二 光器的塑膠顯示器給出最大的孔隙及最少的處理步驟。該 等塑膠顯示器亦受益於在單元製作期間不需要板對板對 準。 參考圖4⑷至圖4⑷展示第-實施你j,如—系列簡圖展 示在處理期間在TFT陣列之中心處的處理序列。特定^ 之,圖4展示具有FSP像素的EPLaRLCD及一支撐聚醯亞胺 網格。該實施例使用具有聚醯亞胺支撐層及Fsp結構的桿 準LCD單元製作。其優點為提供一牢固聚醯亞胺支撐網 格0 圖4(a)至圖4(d)展示形成一 LCD之主動板的處理步驟。 圖4(a)展示一玻璃基板40,其具有薄(5〇奈米至5〇〇奈米)的 144577.doc •16- 201040642 聚醯亞胺層(PI-1),接著是一金屬網格42(如喷鍍的鉬)之沈 積及圖案化。該網格在TFT陣列完成時位於列及行之下 方。 圖4(b)展示旋塗在板之表面上的一第二、較厚(2微米至〇 face. Figure 1 (b) shows a cross section of a field of a shielded pixel TFT with a thicker polymeric passivation layer. In Fig. 1(a), the glass substrate is shown as 1 〇, and a -first gate dielectric nitride layer 12 is provided over the substrate. The second nitride layer 14 is used as a passivation layer. The ITO pixel electrode is shown as 16 and the pixel TFT is shown as 18 〇. Figure i(b) differs in that the second tantalum nitride layer 14 is replaced by a polymeric dielectric layer 20. Cerium nitride (SiN) has good dielectric and passivation properties, but it does not apply. 144577.doc 11 201040642 is used to deposit SiN layers over 0.5 microns thick, and typically uses 〇^ microns to 0.4 microns. The SiN has a dielectric constant of "the dielectric constant. - a suitable thin layer group" means any conductivity using SiN as a dielectric:: has a higher capacitance. The result of this is that IT pixels are not allowed to be covered on metal lines or TFTs. The voltage applied to the rows changes at each line addressing time and if the ITO is above the rows, the capacitive coupling can change the voltage across the pixels, resulting in vertical crosstalk. μ If the pixel is above the TFT, m can act as a top closed to partially turn on the TFT in the off state, again causing vertical crosstalk. Ιτ〇 can be located above the column 'because this only changes the voltage once per frame immediately before the re-addressing line. This has no appreciable effect on image quality. The LCD material in the display only limits the effective optical aperture of the LCD display by responding to the field induced by the voltage on the pixel and not switching the position of the pixel in the standard TFT structure in the region without the ITO pixel. 'As shown in Figure 2 (a). "Figure 2(a) shows the layout of a standard TFT structure, and there is no ιτ〇 pixel "overlay on the line or TFT. The LCD switches only in the area above the 16το pixel 16. The column line is shown as 22 and the row line is shown as 24, and the pixel electrode ^ is contacted by the contact hole 26. Figure 2(b) shows the field mask pixel having the row and the IT pixel electrode on the TFT. The layout of the TFT structure. The area of the 1TO pixel mask is larger than the area in the dry structure shown in Fig. 2(a). Specifically, the ITO pixel electrode which forms a package together with the TFT is directly associated with Above the TFT, there is a limb, and the ITO pixel electrode is located above the gate of the associated TFT and above the channel 144577.doc 201040642. Use the field mask pixel shown in the cross section in Figure 1 (b) (Fsp The structure increases the effective optical aperture of the pixel. In this case, a thicker polymeric layer replaces the thinner tantalum nitride passivation layer of the standard TFT structure. The polymeric layer is typically 2 microns or 3 microns thick and typically has 3 A dielectric constant. This means the thickness - a factor that has increased by 10 (from micron to 3 microns) and the dielectric constant has been reduced by a factor of 2. This reduces the capacitance by a factor of 20. This is low enough. By capacitive coupling from row 0 or by turning on the back channel of the TFT The ITO pixel 16 is overlaid on the row and on the TFT without causing vertical disturbances. It is obvious that the passivation layer polymer must be highly transmissive and have no birefringence because it is located in the optical path of the light passing through the LCD. BCB (benzo ring) Butene) is commonly used as a polymer in FSP structures, but it is extremely expensive and in principle other liquid plastics can be used for liquid casting. Mobile applications require thinner displays ^ TFTs are usually fabricated in 7 mm thick glass Two substrates are required on the substrate to make a standard lcd. Adding a biased mode and an optically reinforced film makes the AMLCD at least 1.4 mm thick. This is too thick for mobile phone applications, so it is usually borrowed from a worm. The display is thinned until the two substrates are Ο]mm thick before attaching the polarizer. This is a wasteful and polluting process and the display is still 〇6 mm thick. Manufacturers have found that if they try to make the display Further thinning, the display is easy to break. There are also difficulties in achieving high optical aperture AMLCD. There are two different forms of pattern alignment used in the manufacture of AMLCD. The first type is photolithography. It is used to accumulate the pattern of different metals, dielectrics and semiconductor layers on the substrate. This technology is highly accurate, and for AMLCD manufacturing, it is usually cited on a substrate that can be 2 meters by 2 meters in size. With an alignment accuracy of about 2 microns, the alignment accuracy is usually less than 1 micron. The second alignment is a board-to-board coupling Q. This aligns the sides of the Lc unit together. For an AMLCD pass$ The active matrix array that will be present on the board and the color filter on the other board, the black mask and the ITO, as shown in Figure 3(a) ° eight through the midpoint of the pixel - cross section The active board 3 被动 and the passive board 32 are shown. In Figure 3(4), q is the gap between the rows and the pixels, which must be greater than about 1 micron to prevent excessive capacitive cross-coupling. L is the overlap distance between the black mask 34 and the IT0 pixel. ^ is equal to the minimum gap size plus the maximum photolithography misalignment gap. L2 is the maximum misalignment distance between the two plates. The board-to-board alignment tolerance is far beyond the optical lithography alignment tolerance. There may also be some movement during the contact and at the same time the seal line is solidified, so the plate-to-plate lightness is close to 1G micron. For high quality displays, the key is that light can only pass through the pixel ιτ〇, which is modulated to give the desired light transmission level. Any light that can pass around the pixel and reach the viewer will reduce the contrast ratio and mean that the black state is not as dark as it can. This reduces the display performance. Therefore, the black mask must be large enough to accommodate the alignment of the plates. This reduces the optical aperture. The larger the black material, the smaller the optical aperture, & means that more power must be used for the light source to achieve the necessary brightness. The picture is called the active plate and the passive plate for the "large pore" FSp AMLCD. M4577.doc -] 4- 201040642 Alignment. L is the overlapping distance between the black mask and the ITO pixel. It is equal to the maximum misalignment distance between the two plates. Therefore, the FSP structure increases optical aperture, especially for small pixels. Maximizing optical aperture is important to maximize the brightness of the display and reduce power consumption. Therefore, board-to-board accuracy can effectively limit the number of such parameters. One significant way to improve this optical aperture is to move the color filter to the active plate. For glass substrates, this can be done in two ways. Both methods have been demonstrated in research laboratories' but are not used in mass production. The first method is to place a color filter under the TFT array. This has been reported to increase the optical aperture of a 15 inch XGA monitor from about 6% to 80%. This color filter is usually made! Made from a micron to 2 micron thick dyed polymer and the dyed polymer gives a very irregular profile. There are serious practical difficulties in processing TFTs on such irregular surfaces, but the true problem with this process is the processing temperature. The color filters are prohibited from being heated above about 150 ° C. Otherwise the color filters begin to decompose and lose their color saturation. The TFT is usually deposited at over 3 °C. This temperature can be reduced to nearly 200 ° C, but if this temperature continues to be less than 2 〇 (TC, the TFT becomes extremely electrically unstable during an acceptable display lifetime. TFTs with poor color saturation or instability The second technique is to make the color filter above the TFT array. The easiest way to do this is to place a color filter on top of a standard TFT array. This is not practical because of a thicker polymerization. The layer is placed above the pixel electrode to significantly increase the driving voltage and introduce image residue due to the movement of charge in the polymer. A TFT array can be fabricated and a color filter can be deposited, I44577.doc -15- 201040642 MIT◦ Placed above the color concentrator and with electrical connections through the color illuminating layer. This is - difficult processing, ie control of the required good gradual slope on all color dynode layers; with for deposition Limiting the temperature and the precise and reliable patterning of the top layer of the polymeric layer in the rugged zone. This treatment does not indicate that it has been made into a manufacturing stage. The present invention provides an improved process. Three examples were used to make a plastic (10) using a modified EPLaR process, and an example was given to fabricate a high resolution thin cell using a single-glass substrate. In the first two embodiments, 'standard color filter was used. Optoelectronic technology. Implementing such LCDs in standard TFt Weiwei is the simplest, but compared to standard glass substrate lcd, which has several additional processing steps. In the third embodiment, the scratched side has been removed. After the glass substrate is etched and the polyimide film is etched, the film is sprayed onto the TFT side of the plastic film. The ink display has a maximum porosity and a minimum of processing steps. These plastic displays also benefit from the need for board-to-board alignment during cell fabrication. Referring to Figures 4(4) through 4(4), the first implementation, as shown in the series, shows the processing sequence at the center of the TFT array during processing. Specifically, Figure 4 shows an EPLaRLCD with FSP pixels and a supporting polyimine mesh. This embodiment is fabricated using a rod-aligned LCD unit with a polyimide support layer and an Fsp structure. Polyimine branch Grid 0 Figures 4(a) through 4(d) show the processing steps for forming an active panel of an LCD. Figure 4(a) shows a glass substrate 40 having a thin (5" to 5" nanometer. 144577.doc •16- 201040642 Polyimine layer (PI-1) followed by deposition and patterning of a metal grid 42 (eg, sprayed molybdenum). The grid is in the column when the TFT array is completed. And below the line. Figure 4(b) shows a second, thicker spin on the surface of the board (2 microns to

10微米)的聚醯亞胺層(PI-2),接著是TFT 44之一第一 SiN 鈍化層SiNl及陣列。用以形成該等丁F丁之步驟相同於用在A 10 μm polyimine layer (PI-2) followed by a first SiN passivation layer SiN1 and an array of TFT 44. The steps for forming the same are the same as used in

現有EPLaR處理中之步驟。聚醯亞胺可易於耐受標準處理 溫度及化學物質。 圖4(c)展示用場屏蔽像素處理所完成的tft陣列,給出 在該等TFT之上方的一聚合鈍化層46及與各叮了相關聯的 一像素電極47。該層46為一透明非雙折射塑膠,如以上所 解釋,例如BCB。該層46較佳地具有丨微米至1〇微米、更 佳為1微米至5微米的一厚度,且介電常數為丨至5。該等電 極位於該等TFT之上方,如以上所解釋,因此形成一Fsp 組態。 圖4⑷展示旋塗在該TFT陣列之表面上的一⑽聚酸亞 胺對準層48。使用—摩擦處理以定向lc材料。接著添加間 隔件50。此等間隔件5〇經設計以使Lc單元間距保持恆定且 不允許基板分開。已報導光微影界定之膠黏球體及主動單 元間隔件兩者用於此用途。 40)至圖4(h)展示製造被動板之步驟。 在圖物,亦用將圍繞像素的一薄聚醯亞胺層Μ及 金屬網格62來塗覆彩色遽光器玻璃基板60。 圖_展示施加至該彩色濾光器基板的—較厚聚醒亞胺 144577.doc -17- 201040642 層(PI-2)及鈍化層SiNl。到目前為止處理相同於TFT板之 處理的前幾個步驟。 圖4(g)展示使用一標準彩色濾光器處理而施加在鈍化層 SiNl上的彩色濾光器材料63。此通常由2微米至3微米厚的 圖案化為像素形狀之彩色聚合物層形成。通常在用於標準 玻璃AM-LCD的彩色像素下方將存在一黑色遮罩層,但功 能上此可被金屬網格62取代。因此,此處理並不增加用於 彩色濾光器板的遮罩計數。 圖4(h)展示在彩色濾光器之頂部的一平坦化層64、ITO 共同電極層66及LCD對準層68,此可利用標準AM-LCD處 理加以實施。 圖4(i)至圖4(q)展示製造顯示器之步驟。 圖4(i)展示涉及對準頂部板及底部板(主動板40及被動板 60)的單元製作,其再次為一標準AMLCD處理。間隔件界 定單元間隙。對於較小單元,在此階段玻璃板將被切割成 條。 圖4(j)展示用LCD 70的單元填充,使用一標準AMLCD處 理。通常在此步驟後該等條將被分隔成個別單元。 圖4(k)展示藉由一雷射處理(如EPLaR處理中所使用)而 移除彩色濾光器側上之玻璃基板60。在彩色濾光器基板之 聚醯亞胺層PI-1中吸收雷射光。剩下之主要結構層為聚醯 亞胺,其具有良好的強度且已證明適於連同雷射釋放一起 使用。 在圖4(1)中,頂部聚醯亞胺層展示為由在一反應性離子 144577.doc -18- 201040642 姓刻(RIE)系統中之氧電漿蝕刻。使用金屬網格作為一遮 罩。因為該RIE為高度各向異性,所以即使在金屬網格下 方存在底部蝕刻也將為極少。將完全移除pjq,且在不被 金屬網格所遮罩的任何處移除PI_2。該RIE蝕刻止於彩色 濾光器基板之氮化矽層以^^及金屬網格,因為氧電漿不蝕 刻此等材料。 圖4(m)展示層積至TFT陣列之頂部的一偏振器片。此 ^ 將、、、°予陣列更大的機械強度。在此階段亦可層積其他光學 增強片及保護片。 在層積該偏振器片後’將進行列互連及行互連,較佳地 使用一晶片玻璃板接合(chip_on_Glass)處理。 圖4(n)展示主動板玻璃基板4〇之雷射釋放。 如圖4(〇)中所示,用於處理之單元被翻轉。 在圖4(p)中,藉由〇2電漿而RIE蝕刻在TFT主動板上之兩 個聚醯亞胺層P1·1及PI-2向下直至金屬網格及層SiN1。 〇 圖4(q)展示經層積以完成處理的一主動板偏振器72,連 同此等單元所需之效能所需要的任何光學增強薄膜或保護 薄膜。 因為在TFT板上之聚醯亞胺網格位於TFT陣列列及行的 下方,所以其將不影響光學效能。聚醯亞胺層亦可被留在 互連區域以在此等區域中提供額外的機械強度。 圖5展不顯示器製造及互連處理之宏觀圖,且展示留在 互連區域下方的聚醯亞胺(及金屬網格材料)80。區域81可為 八有;I於像素之間之聚醢亞胺網格的單元之光學作用區域。 144577.doc •19· 201040642 右需要,可藉由一浸泡蝕刻而移除外部金屬網格。 以上所給出之本發明之解釋論證在顯示區域之中間處合 發生的情H尚未描述驅動器電子產品之互連或使顯示 為與母體玻璃分開的劃線處理及折斷處理。實際上, 肌aR處。理之若干高強度之_者允許以完全相同於歸玻 璃不&之互連的料進行肖於撓性顯示ϋ之互連。 圖6展示在大玻璃基板上所進行的用於許多小顯示器之 玻璃劃線及單元填充序列。The steps in the existing EPLaR process. Polyimine can easily withstand standard processing temperatures and chemicals. Figure 4(c) shows the completed tft array with field mask pixel processing, giving a polymeric passivation layer 46 over the TFTs and a pixel electrode 47 associated with each of the TFTs. This layer 46 is a transparent non-birefringent plastic, as explained above, such as BCB. The layer 46 preferably has a thickness from 丨 micron to 1 〇 micron, more preferably from 1 micron to 5 microns, and has a dielectric constant of 丨 to 5. The electrodes are located above the TFTs, as explained above, thus forming an Fsp configuration. Figure 4 (4) shows a (10) polyimide alignment layer 48 spin coated on the surface of the TFT array. Use - rubbing treatment to orient the lc material. The spacer 50 is then added. These spacers 5 are designed to keep the Lc cell pitch constant and do not allow the substrates to separate. Both the viscous sphere defined by photolithography and the active unit spacer have been reported for this purpose. 40) to Figure 4(h) shows the steps of manufacturing a passive board. In the figure, a color chopper glass substrate 60 is also coated with a thin polyimide layer and a metal grid 62 surrounding the pixels. Figure _ shows the thicker polyamidamine 144577.doc -17- 201040642 layer (PI-2) and the passivation layer SiNl applied to the color filter substrate. The first few steps of the same processing as the TFT board have been handled so far. Figure 4(g) shows a color filter material 63 applied to the passivation layer SiN1 using a standard color filter process. This is typically formed by a 2 micron to 3 micron thick colored polymer layer patterned into a pixel shape. A black mask layer will typically be present beneath the color pixels used in the standard glass AM-LCD, but this can be replaced by a metal grid 62 in function. Therefore, this process does not increase the mask count for the color filter panel. Figure 4(h) shows a planarization layer 64, an ITO common electrode layer 66, and an LCD alignment layer 68 on top of the color filter, which can be implemented using standard AM-LCD processing. 4(i) to 4(q) show the steps of manufacturing a display. Figure 4(i) shows the fabrication of a unit that involves aligning the top and bottom panels (active panel 40 and passive panel 60), again being a standard AMLCD process. The spacer defines the cell gap. For smaller units, the glass plate will be cut into strips at this stage. Figure 4(j) shows cell filling with LCD 70 using a standard AMLCD process. Usually after this step the strips will be separated into individual units. Figure 4(k) shows the removal of the glass substrate 60 on the side of the color filter by a laser process such as that used in the EPLaR process. The laser light is absorbed in the polyimide layer PI-1 of the color filter substrate. The remaining major structural layer is polyimine, which has good strength and has proven to be suitable for use in conjunction with laser release. In Figure 4(1), the top polyimine layer is shown as being etched by oxygen plasma in a reactive ion 144577.doc -18- 201040642 surname (RIE) system. Use a metal mesh as a mask. Since the RIE is highly anisotropic, there will be very little bottom etching even below the metal grid. Pjq will be completely removed and PI_2 will be removed anywhere that is not covered by the metal mesh. The RIE etch stops at the tantalum nitride layer of the color filter substrate to form a metal grid because the oxygen plasma does not etch such materials. Figure 4(m) shows a polarizer sheet laminated to the top of the TFT array. This ^ gives , , , ° to the array for greater mechanical strength. Other optical reinforcing sheets and protective sheets can also be laminated at this stage. After stacking the polarizer sheets, column interconnects and row interconnects will be performed, preferably using a wafer glass bonding (chip_on_Glass) process. Figure 4 (n) shows the laser release of the active plate glass substrate 4 . As shown in Figure 4 (〇), the unit for processing is flipped. In Fig. 4(p), the two polyimide layers P1·1 and PI-2 on the TFT active plate are RIE-etched down to the metal mesh and the layer SiN1 by 〇2 plasma. 〇 Figure 4(q) shows an active plate polarizer 72 that is laminated to complete the process, any optically reinforced film or protective film required to achieve the desired performance of such cells. Since the polyimine mesh on the TFT panel is located below the columns and rows of the TFT array, it will not affect the optical performance. The polyimide layer can also be left in the interconnected regions to provide additional mechanical strength in such regions. Figure 5 shows a macro view of the display fabrication and interconnection process and shows the polyimide (and metal mesh material) 80 remaining below the interconnected regions. The region 81 can be an optically active region of the unit of the polyimine mesh between the pixels. 144577.doc •19· 201040642 Right, the outer metal mesh can be removed by a soak etch. The explanation of the invention as set forth above demonstrates that the occurrence of a combination in the middle of the display area has not described the interconnection of the driver electronics or the scribing process and breaking process shown to be separate from the parent glass. In fact, muscle aR. A number of high-intensity ones allow for the interconnection of flexible displays with materials that are identical to the interconnects of the glass. Figure 6 shows glass scribe lines and cell fill sequences for many small displays performed on large glass substrates.

。。在圖6(a)中,首先藉由對準主動板及被動板*製造顯示 〇Π將要含有液晶材料的顯示區域82係由像素陣列周圍之 -印刷猞封線界定。在顯示區域内存在單元間隔件。首先 ^劃σ]線84水平地給玻璃板劃線。被動板經劃線使得其與 單元大】4乎一樣。主動板經劃線使得存在延伸超過單 兀t一架狀突出物(見以下圖7),該單元含有用於行Tcp (捲帶式晶片封裝(Tape chip package))或c〇G(晶片玻璃板 接合)連接件的區域。. . In Fig. 6(a), the display area 82, which is to be filled with liquid crystal material, is first defined by alignment of the active and passive plates* by a printed seal line around the pixel array. There are cell spacers in the display area. First, the line σ is lined horizontally to the glass sheet. The passive board is scribed by a line so that it is the same as the unit. The active board is scribed so that there is a frame-like protrusion extending beyond a single 兀t (see Figure 7 below), which unit is used for Tcp (Tape chip package) or c〇G (wafer glass) The board engages the area of the connector.

接著&劃線將顯示器分成條。此對應於以上圖4(丨)之步 驟。 在條内之多個單元上執行單元填充,如圖6(c)中所示。 填充係通過在密封線内之一小間隙,該小間隙在單元填充 後被密封。此對應於步驟4(j)。 圖6(c)展示經垂直劃線的玻璃條。TFT玻璃經再次劃線 以召下用於列互連的一邊緣,同時被動板劃線接近於顯示 is之邊緣。 、 144577.doc •20- 201040642 圖6(d)展示單元之單一元件化(singUiati〇n)。在此階段將 在玻璃上進行用於標準顯不器之互連。在單元單一元件化 後進行電互連。 用於該等兩個基板之劃線並不相同。圖7展示在單元製作 後該等基板之相對大小,且其中TCP(捲帶式晶片封裝(Tape Chip Package))或COG(晶片玻璃板接合)被連接至該TFT基板。 - 在圖7(a)中,展示基板尺寸及用於TCP驅動器的位置。Then & scribes the display into strips. This corresponds to the step of Figure 4 (丨) above. Cell filling is performed on a plurality of cells within the strip as shown in Figure 6(c). The filling system passes through a small gap in the sealing line which is sealed after the unit is filled. This corresponds to step 4(j). Figure 6(c) shows a vertically scribed glass strip. The TFT glass is again scribed to capture an edge for the column interconnect while the passive scribe line is close to the edge of the display is. 144577.doc •20- 201040642 Figure 6(d) shows the single elementization of the unit (singUiati〇n). At this stage, the interconnection for the standard display will be performed on the glass. Electrical interconnections are made after the unit is single componentized. The scribe lines for the two substrates are not the same. Figure 7 shows the relative sizes of the substrates after fabrication of the cells, and wherein TCP (Tape Chip Package) or COG (wafer glass plate bonding) is attached to the TFT substrate. - In Figure 7(a), the substrate size and position for the TCP driver are shown.

0 列丁CP驅動器展示為86 ,且行TCP驅動器展示為87。TFT 基板8 8大於彩色濾光器基板8 9,延伸以給出用於列導入區 及行導入區的沿兩側之架狀突出物。 圖7(b)展示基板尺寸及用於c〇G驅動器之位置。行晶片 玻璃板接合展示為90且列晶片玻璃板接合展示為92。一驅 動盗信號箔展示為94。在圖4(p)中之rie處理期間,驅動 器箔已被施加至TFT基板。可僅僅藉由具有在一屏蔽(其在 RIE處理期間覆蓋在顯示器上方)内之剪裁而保護該等箔,曝 〇 露顯示區域同時保護互連區域及驅動器箔,如圖8中所示。 圖8展示使用〇2電漿96的7打基板之聚醯亞胺層Η」及 PI-2之RIE。電漿屏蔽102保護互連箔1〇〇。在蝕刻期間, 使用一支撐板104。區域1 〇6為蝕刻PI_2聚醯亞胺層的位 置。可同時蝕刻多個顯示器,且使該等互連箱向下彎曲入 凹槽以改良生產率。 在圖9中展示-第二實施例,其中移除所有外部聚醒亞 胺。圖9展示完成的顯示裝置,對應於圖4(q)。 由於在LCD單元之外側上沒有留下㈣亞胺,可省略某 144577.doc •21 - 201040642 些處理步驟’即以上圖4(a)及圖4(e)中之層Η·〗及金屬網 ♦口由於自秦色,慮光器基板移除金屬網格,所以必須重新号| 進彩色濾光器中之黑色遮罩層110以防止光洩漏,如所示。 完全移除外部聚酿亞胺之缺點在於,移除來自顯示區域 内之肩格的水醯亞胺補#,以及互連區域内之連續聚醒亞 月女層。特定設計及設計所針對的應用將決定此是否可行。 接著一較低成本的桶式蝕刻器而非一 RIE系統可用以移除 聚醯亞胺,因為各向異性並非必需。 在圖10中展示使用外部彩色濾光器的一第三實施例。此 具有明顯的優點,因為在主動板上執行所有圖案化,無需 精確的板對板耦合且其可具有比目前所製造之任何其他顯 示器大的光學孔隙。 圖10(a)至圖10(d)對應於圖4(a)至圖4(d)。 被動板處理為不同。圖丨〇(e)展示施加至被動板的聚醯亞 胺層120及SiN鈍化層SiNl。 在圖io(f)中,一透明聚合物122(如BCB或矽酮)被施加 至SiNl,接著是IT〇 123及聚醯亞胺對準層124。該汀〇及 δ亥聚酸亞胺對準層為標準lcd處理。 在圖10(g)及圖l〇(h)中展示單元製作及填充。此比標準 衫色LCD之組裝簡單,因為在被動板上不存在圖案。此意 謂著不需要精確對準兩塊板。對於較小顯示器,在此階段 單元將被切割成條。 在圖10(i)中,使用一雷射釋放以移除在顯示器之被動板 側上的玻璃基板。 圖10⑴展示電漿蝕刻以自顯示器之被動板側移除聚醯亞 144577.doc • 22- 201040642 胺。The 0-dial CP drive is shown as 86 and the row TCP drive is shown as 87. The TFT substrate 88 is larger than the color filter substrate 809, and extends to give frame-like protrusions on both sides for the column lead-in area and the row lead-in area. Figure 7(b) shows the substrate size and position for the c〇G driver. The row wafer glass bond exhibits a 90 and the array wafer glass plate bond exhibits 92. A drive pirate signal foil is shown as 94. During the rie process in Figure 4(p), the driver foil has been applied to the TFT substrate. The foils may be protected only by having a cut within a shield that overlies the display during the RIE process, exposing the exposed display area while protecting the interconnect regions and the driver foil, as shown in FIG. Figure 8 shows the RIE of a 7-sheet substrate using 〇2 plasma 96 and PI-2. The plasma shield 102 protects the interconnect foil 1〇〇. A support plate 104 is used during the etching. Zone 1 〇6 is the location of the etched PI 2 polyimine layer. Multiple displays can be etched simultaneously and the interconnect boxes can be bent down into the grooves to improve productivity. A second embodiment is shown in Figure 9, in which all external chiral imines are removed. Figure 9 shows a completed display device, corresponding to Figure 4(q). Since there is no (iv) imine left on the outer side of the LCD unit, some processing steps of 144577.doc •21 - 201040642 may be omitted, that is, the layers in Figure 4(a) and Figure 4(e) above and the metal mesh. ♦ The mouth is removed from the metal grid due to the color of the light, so it is necessary to re-enter the black mask layer 110 in the color filter to prevent light leakage, as shown. A disadvantage of complete removal of the outer polyimine is the removal of the salicinite from the shoulders in the display area, and the continuous layer of the rejuvenation in the interconnected area. The specific design and design of the application will determine whether this is feasible. A lower cost barrel etcher instead of a RIE system can then be used to remove the polyimine because anisotropy is not necessary. A third embodiment using an external color filter is shown in FIG. This has significant advantages because all patterning is performed on the active board, eliminating the need for precise board-to-board coupling and it can have larger optical apertures than any other display currently made. 10(a) to 10(d) correspond to Figs. 4(a) to 4(d). Passive board processing is different. Figure (e) shows the polyimide layer 120 and the SiN passivation layer SiN1 applied to the passive plate. In Figure io (f), a transparent polymer 122 (e.g., BCB or fluorenone) is applied to SiN1, followed by IT〇 123 and polyimine alignment layer 124. The Ting and δ-polyimide alignment layers are standard lcd treatments. Cell fabrication and filling are shown in Figure 10(g) and Figure l(h). This is simpler to assemble than a standard shirt color LCD because there is no pattern on the passive board. This means that there is no need to precisely align the two boards. For smaller displays, the unit will be cut into strips at this stage. In Fig. 10(i), a laser release is used to remove the glass substrate on the passive plate side of the display. Figure 10 (1) shows the plasma etch to remove the poly phthalate from the passive plate side of the display. 144577.doc • 22- 201040642 Amine.

1 〇(k)展示 一偏振器片126,其施加 側且接著經翻轉用於進一步處理。 至顯示器之被動板1 〇(k) shows a polarizer sheet 126 that is applied to the side and then flipped for further processing. Passive board to the display

Ο 在圖10(1)中,實施聚醯亞胺層之rie蝕刻向下直至充當 一钮刻止播的siN1。此留下在TFT板像素上方的井128。 為在該等井内成功喷墨印刷彩色遽光器墨,該等井之底部 的SiNl為親水性且聚醯亞胺行之頂部的金屬網格為疏水 性。氧氣及氟化氣體可用於此用途。 圖l〇(m)展示射入每一第三聚醯亞胺井的一第一墨 130(例如藍色)。進入被動板的喷墨印刷已用於批量生產彩 色濾光器。在圖l〇(n)中展示用紅墨及綠墨完成彩色濾光器 喷墨印刷以形成RGB彩色濾光器132。在圖1〇(〇)中,施加 一保護膜(overcoat)134以密封彩色濾光器。此可藉由噴墨 印刷或旋轉塗覆而進行。 圖10(P)展示層積至陣列之主動板側上之SiNl上的一偏 振裔片13 6。 在此實施例中’被動板側上不留下用於補強的聚酿亞 胺。因為在此側上不存在驅動連接件,所以將可能不需要 聚醯亞胺,但如果需要可在基板上留有聚醯亞胺。 以上之處理可經修改以留下一玻璃板,但不移除以上步 驟10(i)中之被動板玻璃基板。此將製造一更薄的玻璃顯示 器,其具有所有的添加優點:侷限於一塊板的高級光學孔 隙及複雜處理;及不需要精確板耦合。接著偏振器箔將被 施加至玻璃基板。玻璃基板可比用於標準TFT處理之此等 144577.doc -23· 201040642 基板薄,因為其等不需要經過高溫處理、㈣或旋轉。如 果必要’触刻亦可以普通方式使其等變薄。 熟習此項技術者將明白各種其他修改。 【圖式簡單說明】 圖1(a)及圖1 (b)展示-標準TFT結構及一場屏蔽像素tft 之橫戴面; 圖2(a)及圖2(b)展示-標準TFT結構及場屏蔽像素結 構之平面圖佈局; 圖3(a)及圖3(b)展示一習知AMLCD結構及_「大孔隙」 FSP AMLCD結構; 」 圖4(a)至圖4(q)展示用於本發明之一第一方法的處理序 列; 圖5展示顯示器製作及互連處理之宏觀圖; 圖6(a)至圖6(d)展示在大玻璃基板上所進行的用於許多 小顯示器之玻璃劃線及單元填充序列; 圖7(a)及圖7(d)展示用於TCP驅動器及用於COG驅動器的 基板大小及位置; 圖8展示一反應性離子蝕刻處理如何能用以曝露顯示區 域同時保護互連區域及驅動器箔; 圖9展示本發明之裝置之一第二實施例;及 圖10(a)至圖l〇(p)展示用於本發明之一第二方法的處理 序列。 【主要元件符號說明】 10 玻璃基板 144577.doc -24- 201040642 Ο ❹ 12 第一閘極介電氮化矽層 14 第二氮化矽層 16 ΙΤΟ像素電極 18 像素薄膜電晶體(TFT) 20 聚合介電層 22 列線 24 行線 26 接觸孔 30 主動板 32 被動板 34 黑色遮罩 40 載體基板 42 金屬網格 44 薄膜電子元件 46 第二塑膠塗層 47 電極 48 LCD聚醯亞胺對準層 50 間隔件 60 彩色濾光器玻璃基板/被動板 62 金屬網格 63 彩色濾光器材料 64 平坦化層 66 ITO共同電極層 68 LCD對準層 144577.doc -25- 201040642 70 偏振器片 72 主動板偏振益 80 聚醯亞胺 81 區域 82 顯示區域 84 劃線 86 列TCP驅動器 87 行T C P驅動器 88 TFT基板 89 彩色濾光器基板 90 行晶片玻璃板接合 92 列晶片玻璃板接合 94 驅動器信號箔 96 RIE 02電漿 100 互連箔 102 電漿屏蔽 104 支撐板 110 黑色遮罩層 120 聚醯亞胺層 122 透明聚合物 123 ITO 124 聚醯亞胺對準層 126 偏振器片 128 井 144577.doc -26- 201040642 130 132 134 136 PI-1 PI-2 o 彩色濾光器部分 密封層 保護膜 偏振器片 聚醯亞胺層 聚醯亞胺層 〇 144577.doc -27-Ο In Fig. 10(1), the rie etching of the polyimide layer is carried down until it acts as a button-stopping siN1. This leaves well 128 above the pixels of the TFT board. To successfully ink-jet print color chopper inks in such wells, the SiNl at the bottom of the wells is hydrophilic and the metal mesh at the top of the polyimine rows is hydrophobic. Oxygen and fluorinated gases can be used for this purpose. Figure 1 (m) shows a first ink 130 (e.g., blue) that is injected into each of the third polyimine wells. Inkjet printing into passive boards has been used to mass produce color filters. Color filter inkjet printing is performed with red and green inks to form RGB color filter 132 in Figure l(n). In Fig. 1 (〇), an overcoat 134 is applied to seal the color filter. This can be done by ink jet printing or spin coating. Fig. 10(P) shows a polarizing plate 13 6 laminated on SiN1 on the active plate side of the array. In this embodiment, no polyamine for reinforcement is left on the side of the passive plate. Since there is no drive connection on this side, polyimine will probably not be needed, but polyimine may be left on the substrate if desired. The above process can be modified to leave a glass plate, but the passive plate glass substrate in step 10(i) above is not removed. This will result in a thinner glass display with all of the added advantages: advanced optical aperture and complex processing limited to one board; and no need for precise board coupling. The polarizer foil will then be applied to the glass substrate. The glass substrate can be thinner than the substrate used for standard TFT processing because it does not require high temperature processing, (four) or rotation. If necessary, the touch can also be thinned in the usual way. Those skilled in the art will appreciate various other modifications. [Simplified Schematic] Figure 1(a) and Figure 1(b) show the standard TFT structure and a horizontally shielded pixel tft; Figure 2(a) and Figure 2(b) show the standard TFT structure and field. A plan view layout of the masked pixel structure; Figures 3(a) and 3(b) show a conventional AMLCD structure and a "large aperture" FSP AMLCD structure; Figure 4(a) through Figure 4(q) are shown for use in this A processing sequence of the first method of the invention; FIG. 5 shows a macroscopic view of the display fabrication and interconnection process; and FIGS. 6(a) to 6(d) show the glass for many small displays performed on a large glass substrate. Scribing and cell filling sequences; Figures 7(a) and 7(d) show the substrate size and position for the TCP driver and for the COG driver; Figure 8 shows how a reactive ion etching process can be used to expose the display area At the same time, the interconnect region and the driver foil are protected; Figure 9 shows a second embodiment of the apparatus of the present invention; and Figures 10(a) through 1(p) show a processing sequence for a second method of the present invention. [Major component symbol description] 10 Glass substrate 144577.doc -24- 201040642 Ο ❹ 12 First gate dielectric tantalum nitride layer 14 Second tantalum nitride layer 16 ΙΤΟPixar electrode 18 Pixel thin film transistor (TFT) 20 Polymerization Dielectric layer 22 column line 24 row line 26 contact hole 30 active board 32 passive board 34 black mask 40 carrier substrate 42 metal grid 44 thin film electronic component 46 second plastic coating 47 electrode 48 LCD polyimide alignment layer 50 spacer 60 color filter glass substrate / passive board 62 metal grid 63 color filter material 64 flattening layer 66 ITO common electrode layer 68 LCD alignment layer 144577.doc -25- 201040642 70 polarizer sheet 72 active Plate Polarization Benefit 80 Polyimine 81 Area 82 Display Area 84 Lined 86 Columns TCP Driver 87 Rows TCP Driver 88 TFT Substrate 89 Color Filter Substrate 90 Rows Wafer Glass Bonding 92 Columns Wafer Glass Bonding 94 Driver Signal Foil 96 RIE 02 plasma 100 interconnect foil 102 plasma shield 104 support plate 110 black mask layer 120 polyimine layer 122 transparent polymer 123 ITO 124 Imine alignment layer 126 polarizer sheet 128 well 144577.doc -26- 201040642 130 132 134 136 PI-1 PI-2 o color filter partial sealing layer protective film polarizer sheet polyimine layer polyimine层〇144577.doc -27-

Claims (1)

201040642 七、申請專利範圍: 1· -種製造-薄膜電子裝置之方法,該方法包括: 將第塑膠塗層(PI-1)直接施加至一剛性載體基板 (40); 在該第—《塗層上方形成若干薄膜電子元件(44); . 將第—塑膠塗層(46)施加在該等薄膜電子元件上 .方; 0 在該第二塑膠塗層上方形成若干電極(47),各電極連 $至夕相關聯之電子元件―起形成—電路,且該電極 包含直接位於該相關聯之電子元件上方的—部分,該電 極與該相關聯之電子元件藉由該第二塑膠塗層隔開;及 ,精由-雷射釋放處理而自該第一塑膠塗層釋放該剛性 載體基板(4〇)。 2.如π求項丨之方法,其中施加該第一塑膠塗層包括: 施加—第一塑膠層(ΡΙ-1); 〇 在该第一塑膠層上方形成一金屬圖案(42),該第一塑 膠層具有對準於隨後形成該等薄膜電子元件之位置的圖 案部分;及 在亥孟屬圖案上方施加一第二塑膠層(ΡΙ-2)。 二长員2之方法,其進一步包括使用該金屬圖案(42)作 為…遮罩來姓刻該第一塑膠廣(ρΜ) ’藉此形成對準於 °亥等薄膜電子元件的第一塑膠層部分。 4-如請求項 3$·*·、土 、方去,其進一步包括於該等第一塑膠層部 1之空間(128)内提供彩色濾光器部分(13〇)。 144577.doc 201040642 5‘如叫求項4之方法’其進一步包括在該等彩色濾光器部 分上方提供一密封層(132)。 6. 如β求項1之方法,其進一步包括在釋放該剛性載體基 板後完全移除該第一塑膠塗層(PI-1)。 7. 如則述清求項中任一項之方法,其中該第一塑膠塗層 (PI-1)包括聚酿亞胺。 8. 月:述請求項中任一項之方法’纟進一,包括在形成該 等薄膜電子元件前在該第一塑膠塗層上方形成一鈍化層 (SiNl) 〇 9.如明求項8之方法,其中該純化層(s腕)包括氮化石夕。 1〇_如刚述請求項中任一項之方法,其中該第二塑膠塗層 (PI 2)為不具有雙折射的—透明塑膠且具有1微米至10微 米的一厚度。 11 ·如如述請求項中—丨工—巧,子 (44)包括若干場屏蔽像素薄膜電晶體。 12·Γ前述請求項中任—項之方法,其用於製造4動矩擇 ’打裝置’其中形成薄膜電子元件(4句包括在該塑膠邊 板㈣上方形成一像素電路陣列,且其中該方法進一步 =括在自4第-㈣塗層釋放該剛性载體基板前在該係 ,、電路陣列上方形成—顯示層(LCD)。 13·Π:12之方法’其進—步包括製造-第二基板配 二且”中在該像素電路陣列上方形成一顯示層⑽) 匕括安裝第-基板配置及該k基板配置 於該等基板配置之間,該主動矩陳ag_壯 电材料又 王勤矩陣頒不裝置藉此包括第 144577.doc 201040642 一基板及第二基板且該光電材料夾於該等基板之間。 14. 如請求項13之方法,其令製造該第二基板包括··將一塑 膠塗層(PI-1)施加至一剛性載體基板(60)且在安裝該第一 基板配置及該第二基板配置後藉由一雷射釋放處理而自 該塑膠塗層(PM)釋放該剛性載體基板(60)。 15. —種薄膜電子裝置,其包括: —支撐結構,其包括若干塑膠部分(ρι_2),各塑膠部 〇 分在下方具有—金屬塗層部分(42),且該等塑膠部分之 間具有填充空間; 一純化層(SiNl) ’其在該支撐結構上方; 右干薄膜電子元件(44),其等在該鈍化層^^丨)上方 且對準於該等塑膠部分; 一塑膠塗層(46) ’其在該等薄膜電子元件(44)上方;及 右干’該等電極(47)在該塑膠塗層上方,各電極(47) 連同至少一相關聯之薄膜電子元件(44) 一起形成一電 〇 路’且該電極包含直接位於該相關聯之電子元件上方的 一部分’該電極與該相關聯之電子元件被該塑膠塗層隔 開。 144577.doc201040642 VII. Patent application scope: 1. A method for manufacturing a thin film electronic device, the method comprising: directly applying a first plastic coating (PI-1) to a rigid carrier substrate (40); Forming a plurality of thin film electronic components (44) above the layer; applying a first plastic coating (46) on the thin film electronic components; 0 forming a plurality of electrodes (47) over the second plastic coating, each electrode An electronic component associated with the $ 至 至 至 至 至 至 至 至 至 至 至 至 至 至 至 至 至 至 至 至 至 至 至 至 至 至 至 至 至 至 至 至 至 至 至 至 至 至 至 至And the fine carrier substrate (4〇) is released from the first plastic coating by the laser release treatment. 2. The method of claim 1, wherein applying the first plastic coating comprises: applying a first plastic layer (ΡΙ-1); forming a metal pattern (42) over the first plastic layer, the first A plastic layer has a pattern portion aligned with the location where the thin film electronic components are subsequently formed; and a second plastic layer (ΡΙ-2) is applied over the Hei Meng pattern. The method of the second member 2, further comprising using the metal pattern (42) as a mask to name the first plastic strip (ρΜ) to thereby form a first plastic layer aligned with the thin film electronic component such as ° section. 4- If the request item 3$·*·, earth, square, further includes a color filter portion (13〇) provided in the space (128) of the first plastic layer portion 1. 144577.doc 201040642 5 'A method of claim 4', further comprising providing a sealing layer (132) over the color filter portions. 6. The method of claim 1, further comprising completely removing the first plastic coating (PI-1) after releasing the rigid carrier substrate. 7. The method of any of the preceding claims, wherein the first plastic coating (PI-1) comprises a polynymine. 8. The method of any of the preceding claims, wherein the method comprises forming a passivation layer (SiN1) over the first plastic coating layer prior to forming the thin film electronic component. The method wherein the purification layer (s wrist) comprises nitrite. The method of any one of the preceding claims, wherein the second plastic coating (PI 2) is a transparent plastic having no birefringence and having a thickness of from 1 micrometer to 10 micrometers. 11 • As described in the claim, the sub- (44) includes a plurality of field-shielded pixel film transistors. 12. The method of any of the preceding claims, wherein the method for manufacturing a four-momentary device comprises forming a thin film electronic component (four sentences comprising forming a pixel circuit array over the plastic side panel (four), and wherein The method further includes forming a display layer (LCD) over the circuit array before releasing the rigid carrier substrate from the 4th (d) coating. The method of 13·Π:12 The second substrate is provided with a display layer (10) formed above the pixel circuit array. The first substrate arrangement is mounted and the k substrate is disposed between the substrate configurations, and the active moment ag_strong electric material is The Wang Qin matrix is not provided to include a substrate and a second substrate and the photovoltaic material is sandwiched between the substrates. 14. The method of claim 13, wherein the manufacturing of the second substrate comprises Applying a plastic coating (PI-1) to a rigid carrier substrate (60) and applying a laser release coating from the plastic coating after the first substrate configuration and the second substrate configuration are mounted The rigid carrier substrate (60) is released. A thin film electronic device comprising: a support structure comprising a plurality of plastic parts (ρι_2), each of the plastic parts having a metal coating portion (42) underneath, and a filling space between the plastic parts; a purification layer (SiN1) 'over the support structure; a right dry film electronic component (44), which is above the passivation layer and aligned with the plastic portions; a plastic coating (46)' Above the thin film electronic components (44); and right stems, the electrodes (47) are above the plastic coating, and the electrodes (47) together with at least one associated thin film electronic component (44) form an electrical The circuit 'and the electrode includes a portion directly above the associated electronic component' that is separated from the associated electronic component by the plastic coating. 144577.doc
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