200947752 九、發明說明： 【發明所屬之技術領域】 本^明係’―種高功率發光裝置，尤其關於—種 結構之南功率發光裝置。 ，月 【先前技術】 ❹ ❹ 發光二極體（Light Emitting Diode ; LED)係一種固態物理半 _元件，其至少包含_ p_n接面（p_n細_η)，此种接^係形成 於P型與η型半導體層之間。當於ρ·η接面上施加一定程度之偏壓時， Ρ型半導體層中之電洞與η型半導體層中之電子將會結合而釋放出 光此光產生之Q域一般又柄為發光區（ac彳jyeregj〇n)。 LED為了特定的目的會轉換基板，例如使用散熱佳的銅 或可增加出光鱗的透明基板，如㈣^基板，並且在LED 上表面形成規則的圖案以提高光摘出效率。一般而言，轉換基板 後原本庇晶成長製程裡的成長基板與未摻雜的緩衝層會被移除 而裸露出摻雜的蟲晶層，例如P型半導體或η形半導體，接著於 ί形成窗戶層或介電層’例如ΙΤ〇，再形成規則圖 案於囱戶層或介電層上，製程較為繁複。 【發明内容】 一局功率發光裝置包含一支持基板；一接合層，位於支持基 板之上；-反射層，位於接合層之上；—導電接觸層，位於反射 層之上；-發光疊層，位於導電接觸層之上；以及—未換雜半導 體層，位於發光疊層之上。發光疊層包含一第一摻雜型半導體層， 位於導電接觸層之上；—發光層，位於第—摻雜型半導體層之上； -第二摻雜型半導體層’位於發光層與未摻雜半導體層之間。未 200947752 掺雜型半導體料有-開π以裸露部分第二摻雜型半導體層。於 開口之中形成-第-電極，並與第二摻雜型半導體層接觸； 二電極，位於支持基板之下。 -尚功率發絲置包含-支縣板；—接合層，位於支持基 t之上I -反射層’位於接合層之上卜導電接觸層，位於反射 層之上，-發光疊層，位於導電接觸層之上；以及—未摻雜半導 體層，位於發光疊層之上。發光疊層包含一第一換雜型半導體層， 位於導電接觸層之上；-發光層，位於第—摻雜型半導體層之上； 〇 —第二摻雜型半導體層，位於發光層與未摻雜半導體層之間。未 摻雜型半導體層具有1 口以裸露部分第二摻雜型半導體層。於 開口之中形成-第-電極，並與第二摻雜型半導體層接觸；一第 二電極，位於導電接觸層裸露之部分。 【實施方式】 二發光裝置1包含一成長基板100; 一未摻雜 型+導體層110，位於成長基板100之上；一 未摻雜型半導體層110之上； ”且日牙，於 ❹r〗之上;r及-反射層⑽，位二= 11〇Γ上包型半導體層122’位於未摻雜型半導體層 笛一上，卜/VL層124，位於第二摻雜型半導體層122之上；-ί 一 iinifi126 ’位於發光層124與導電接觸層130之 Ξ fπ簡形抓祕雜。未摻雜料導體=1〇 其材枓包含但稀於AlxGayInixyN，化⑸，， fyf 1 ’ 或 A^GabU ’ ⑸ ’ 〇ga+b幻且 未破人為地或刻思地摻雜任何摻雜物。 第二摻雜型半導體層122的材料包含但不限於 6 200947752200947752 IX. Description of the invention: [Technical field to which the invention pertains] The present invention relates to a high-power illuminating device, and more particularly to a south power illuminating device of the type. , [Previous Technology] ❹ ❹ Light Emitting Diode (LED) is a solid-state physical half-element that contains at least _ p_n junction (p_n thin _η), which is formed in P-type Between the n-type semiconductor layer and the n-type. When a certain degree of bias is applied to the ρ·η junction, the holes in the Ρ-type semiconductor layer and the electrons in the n-type semiconductor layer will combine to emit light. The Q domain generated by the light is generally the illuminating region. (ac彳jyeregj〇n). The LED converts the substrate for a specific purpose, for example, using a heat-dissipating copper or a transparent substrate that can increase the scale, such as a (4) substrate, and forming a regular pattern on the upper surface of the LED to improve light extraction efficiency. Generally, after the substrate is converted, the grown substrate and the undoped buffer layer in the original growth process are removed to expose the doped layer, such as a P-type semiconductor or an n-type semiconductor, and then formed in ί. The window layer or dielectric layer 'such as tantalum, and then form a regular pattern on the layer of the household or the dielectric layer, the process is more complicated. SUMMARY OF THE INVENTION A power illuminating device comprises a supporting substrate; a bonding layer on the supporting substrate; a reflective layer on the bonding layer; a conductive contact layer on the reflective layer; Located above the conductive contact layer; and - without a semiconductor layer, on top of the light-emitting stack. The light emitting layer stack comprises a first doped semiconductor layer on the conductive contact layer; the light emitting layer is located on the first doped semiconductor layer; the second doped semiconductor layer is located in the light emitting layer and is not doped Between the hetero semiconductor layers. No 200947752 The doped semiconductor material has an open π to expose a portion of the second doped semiconductor layer. A -first electrode is formed in the opening and is in contact with the second doped semiconductor layer; and two electrodes are located under the support substrate. - still power hairline set - branch plate; - bonding layer, above the support base t - the reflective layer 'on the bonding layer, the conductive contact layer, above the reflective layer, - the light-emitting stack, located at the conductive Above the contact layer; and - an undoped semiconductor layer, overlying the light-emitting stack. The light emitting layer comprises a first impurity-doped semiconductor layer on the conductive contact layer; - a light-emitting layer on the first doped semiconductor layer; and a second-doped semiconductor layer in the light-emitting layer and Doped between the semiconductor layers. The undoped semiconductor layer has one port to expose a portion of the second doped semiconductor layer. A -first electrode is formed in the opening and is in contact with the second doped semiconductor layer; and a second electrode is located in the exposed portion of the conductive contact layer. [Embodiment] The two light-emitting device 1 includes a growth substrate 100; an undoped + conductor layer 110 on the growth substrate 100; an undoped semiconductor layer 110; and "Japanese teeth, Yu ❹ r" Above; r and - reflective layer (10), bit 2 = 11 〇Γ upper cladding type semiconductor layer 122' is located on the undoped semiconductor layer flute, and the Bu/VL layer 124 is located in the second doped semiconductor layer 122. Above; -ί an iinifi126 'is located between the luminescent layer 124 and the conductive contact layer 130 Ξ fπ simple shape clutter. Undoped material conductor = 1 〇 its material 枓 contains but is less than AlxGayInixyN, chemistry (5),, fyf 1 ' or A^GabU ' (5) ' 〇ga+b is illusory and does not artificially or intentionally dope any dopant. The material of the second doped semiconductor layer 122 includes but is not limited to 6 200947752
AlxGayln—N ’OSxSi’o^y^i’ 〇sx+ysi，或从以血』， OSaSl，〇Sbgl ’ 〇Sa+bSl ’可以為n型或p型半導體。第一 摻雜型半導體層126的材料包含但不限於AlxGayln^N， O^xSl ’ OSygl，OSx+yg，或 AlaGabIniabP，， 〇SbSl’〇Sa+bSl’但與第二摻雜型半導體層m的電性相異。 發光層124的材料包含但不限於n-VI族半導體、ΠΙ-ν族半導體、AlxGayln - N 'OSxSi'o ^ y ^ i' 〇 sx + ysi, or from the blood, OSaSl, 〇Sbgl 〇 〇 Sa + bSl ' can be an n-type or p-type semiconductor. The material of the first doped semiconductor layer 126 includes, but is not limited to, AlxGayln^N, O^xSl 'OSygl, OSx+yg, or AlaGabIniabP, 〇SbSl'〇Sa+bSl' but with the second doped semiconductor layer m The electrical properties are different. The material of the light-emitting layer 124 includes, but is not limited to, an n-VI semiconductor, a ΠΙ-ν semiconductor,
AlGalnP、AIN、GaN、AlGaN、InGaN、AlInGaN 或 CdZnSe。 導電接觸層130與第一摻雜型半導體層126形成歐姆接觸， 其材料包含但不限於填化鎵(GaP)、钟化鎵(GaAs)、碟神化鎵 (GaAsP)、砷鎵化鋁(AlGaAs)、氮化鎵(GaN)、銦(In)、錫(Sn)、鋁 (A1)、金(Au)、鉑(Pt)、鋅(Zn)、銀(Ag)、鈦(Ti)、錫(Pb)、鍺(Ge)、 銅(Cu)、鎳(Ni)、鈹化金(AuBe)、鍺化金(AuGe)、鋅化金(AuZn)、 錫化鉛(PbSn)、氧化錮錫(ITO)、氧化銦(in〇)、氧化錫(sn〇)、氧化 鎘錫(CTO)、氧化錄錫(ΑΤΟ)、氧化鋅(ZnO)等金屬氧化物或上述材 料之組合所構成之群組。反射層14〇用以反射光線，其材料包含 但不限於銦(In)、錫(Sn)、鋁(A1)、金(Au)、鉑(Pt)、鋅(Zn)、銀(Ag)、 鈦(Τι)、錫(Pb)、錯(Ge)、銅(Cu)、鎳(Ni)、鈹化金(AuBe)、鍺化金 (AuGe)、鋅化金(AuZn)、錫化鉛(PbSn)、上述材料之組合或布拉格 反射層。 〇 一接合層15〇可選擇性地形成在反射層140或一支持基板101 之上’亦或在兩者之上皆形成接合層150。藉由接合層150黏結發 光裝置1與支持基板101’再經翻轉的步驟形成如第2圖所示之發 光裝置1。接合層150的材料包含但不限於聚醯亞胺（PI)、苯并 %丁稀（BCB)、過氟環丁婦（PFCB)、環氧樹g旨(Epoxy)、其他有 機黏結材料、銦(In)、錫(Sn)、銘(A1)、金(Au)、#(Pt)、鋅(Zn)、 銀(Ag)、鈦(Ti)、錯(Pb)、把(Pd)、鍺(Ge)、銅(Cu)、錄(Ni)、錫化 金(AuSn)、銀化銦(InAg)、金化銦(inAu)、鈹化金(AuBe)、錄化金 (AuGe)、鋅化金(AuZn)、錫化鉛(PbSn)、銦化鈀(Pdln)或上述材料 之組合。支持基板101的材料包含但不限於半導體、金屬、矽(si)、 7 200947752 構化碘(IP)、碰化鋅(ZnSe)、氮化銘(AIN)、神化鎵(GaAs)、神化鎵 鋁(AlGaAs)、氮化鎵(〇祝）、氧化鋰鋁(liai〇2)、碳化矽(siC)、氧 化鋅(ZnO)、金屬基複合材料（Metal Matrix c〇mp〇site ; 、 ^化鎵(GaP)、鍺(Ge)、磷化銦(inp)、氮化銘(A1N)、氧化錳_〇)、 氧化鎂(MgO)、氧化鈣(Ca〇)、藍寶石(sapphire)、鑽石(diam〇nd)、 玻璃(glass)或上述材料之組合。 Ο 移除，長基板100，但是保留未摻雜型半導體層u〇，形成如 第3圖所示之發光裝置！，移除成長基板1〇〇的方法包含雷射移除 ，侧。如第4圖所示，湘微影或侧等製程，在未掺雜型半 導體層no的-上表面形成一週期性結構112，包含複數個凹部與 凸部’其中每個凸部與凹部的高與寬大約為1〇〇奈米到3微米；、 週期，結構112可以為-光子晶體。如第5圖所示，利用微影或 製程在未摻雜型半導體層11G形成—開口 114以裸露部分 第-掺雜型半導體層122。接下來於開口 114之中形成一第 =並摻雜型半導體層122接觸，並於支持基板101之下 =交佳為採用導電之材料。經由上述步驟，形成:高功 ❹ 如第6圖所示，-高功率發光裝置2包 =層250，位於支持基板201之上；一反射層=== 之上’ 一導電接觸層230，位於反射層240之上；一發光心 220 ’位於導電接觸層23〇之上；以及一未摻雜型=且層 位於發光疊層220之上。發光疊層22〇包含一第 J贼 層226，位於導電接觸層23〇之上； +導體 型半導體層226之上；-第-換雜型丰位於第一摻雜 224與未摻雜型半導體層= ^於發光層 換雜型半導體層21〇的-上表面形成在未 Α光子曰曰體°利用微影或_等製 8 200947752 導2:Λ210形成-開口214以裸露部分第二摻雜 2露，電_ 23Q ’ 含微影=== 二巧口 214之中形成—第—_ %。，並與第二摻雜型 接觸’並於導電接觸層23〇裸露 ^ 此時，支持基板20卜連接層250或反射層24t交 此。除此之外，亦可移除部份未捧雜 1 +導體210、第二摻雜型半導體層a ㈣成第二電_於^^ Ο Ο 第7圖係繪示出—絲產生裝置示賴，該絲產生裂置3 包含本發明任-實施例巾之—高功率發光裝置。該紐產生裝置3 了 =是-照明裝置’例如路燈、車燈、或室内照明光源，也可以 是交通號諸、或-平賴示H巾背絲_—背光杨。該光源 產生裝置3包含前述高功率發錄置組成之—光源3卜電源供應 系統32以供貞光源31 -電流、以及—控㈣元件33，用以控制電 源供應系統32。 ^第8圖係繪示出一背光模組剖面示意圖，該背光模組4包含 前述實施例中的光源產生裝置3，以及一光學元件41。光學元件 41可將由光源產生裝置3發出的光加以處理，以應用於平面顯示 器。惟上述實施例僅為例示性說明本發明之原理及其功效，而非 用於限制本發明。任何熟於此項技藝之人士均可在不違背本發明 之技術原理及精神的情況下，對上述實施例進行修改及變化。因 此本發明之權利保護範圍如後述之申請專利範圍所列。 【圖式簡單說明】 第1〜5圖係顯示依據本發明一實施例之高功率發光裝置之製造流 200947752 程剖面圖。 第6圖係顯示依據本發明另一實施例之高功率發光裝置之剖面圖。 第7圖係為示意圖，顯示利用本發明實施例之發光元件 組成之一光源產生裝置之示意圖。 第8圖係為示意圖，顯示利用本發明實施例之發光元件 組成之一背光模組之示意圖。 【主要元件符號說明】 © 1發光裝置 10，2高功率發光裝置 100成長基板 101，201支持基板 110，210未摻雜型半導體層 112，212週期結構 114，214 開口 120，220發光疊層 122, 222第二摻雜型半導體層 124，224發光層 ® 126，226第一掺雜型半導體層 130導電接觸層 140反射層 150接合層 160，260第一電極 170，270第二電極 3光源產生裝置 31光源 32電源供應系統 33控制元件 200947752 4背光模組 41光學元件AlGalnP, AIN, GaN, AlGaN, InGaN, AlInGaN or CdZnSe. The conductive contact layer 130 forms an ohmic contact with the first doped semiconductor layer 126, and the material thereof includes, but is not limited to, gallium (GaP), gallium arsenide (GaAs), gallium arsenide (GaAsP), and aluminum arsenide (AlGaAs). ), gallium nitride (GaN), indium (In), tin (Sn), aluminum (A1), gold (Au), platinum (Pt), zinc (Zn), silver (Ag), titanium (Ti), tin (Pb), germanium (Ge), copper (Cu), nickel (Ni), gold (AuBe), gold (AuGe), gold (AuZn), lead (PbSn), antimony tin oxide a group of (ITO), indium oxide (indium), tin oxide (sn〇), cadmium tin oxide (CTO), oxide-recorded tin (yttrium), zinc oxide (ZnO) or the like, or a combination of the above materials group. The reflective layer 14 is for reflecting light, and the material thereof includes but is not limited to indium (In), tin (Sn), aluminum (A1), gold (Au), platinum (Pt), zinc (Zn), silver (Ag), Titanium (Τι), tin (Pb), mal (Ge), copper (Cu), nickel (Ni), gold (AuBe), gold (AuGe), gold (AuZn), lead ( PbSn), a combination of the above materials or a Bragg reflection layer. A bonding layer 15 is selectively formed over the reflective layer 140 or a support substrate 101 or both. The light-emitting device 1 shown in Fig. 2 is formed by the step of bonding the light-emitting device 1 and the support substrate 101' to the flip layer 150. The material of the bonding layer 150 includes, but is not limited to, polyimine (PI), benzoxanthrene (BCB), perfluorocyclopentane (PFCB), Epoxy, other organic bonding materials, indium. (In), tin (Sn), Ming (A1), gold (Au), #(Pt), zinc (Zn), silver (Ag), titanium (Ti), wrong (Pb), put (Pd), 锗(Ge), copper (Cu), recorded (Ni), gold (AuSn), indium (InAg), indium (inAu), gold (AuBe), gold (AuGe), zinc Gold (AuZn), lead (PbSn), palladium indium (Pdln) or a combination of the above. Materials supporting the substrate 101 include, but are not limited to, semiconductors, metals, bismuth (si), 7 200947752, iodine (IP), zinc ZnSe, AIN, GaAs, GaAs (AlGaAs), gallium nitride (lithium), lithium aluminum oxide (liai〇2), tantalum carbide (siC), zinc oxide (ZnO), metal matrix composite (Metal Matrix c〇mp〇site; (GaP), germanium (Ge), indium phosphide (inp), nitriding (A1N), manganese oxide 〇, magnesium oxide (MgO), calcium oxide (Ca 〇), sapphire (sapphire), diamond (diam) 〇nd), glass or a combination of the above.移除 Remove, long substrate 100, but leave undoped semiconductor layer u〇, forming a light-emitting device as shown in Figure 3! The method of removing the growth substrate 1〇〇 includes laser removal, side. As shown in FIG. 4, in the lithography or side process, a periodic structure 112 is formed on the upper surface of the undoped semiconductor layer no, and includes a plurality of concave portions and convex portions 'each of the convex portions and the concave portions The height and width are approximately 1 nanometer to 3 micrometers; and the period 112 may be a photonic crystal. As shown in Fig. 5, an opening 114 is formed in the undoped semiconductor layer 11G by lithography or a process to expose a portion of the first doped semiconductor layer 122. Next, a = and doped semiconductor layer 122 is formed in the opening 114, and is under the support substrate 101. Through the above steps, a high power 形成 is formed as shown in FIG. 6 , a high power illuminating device 2 package = layer 250 on the support substrate 201; a reflective layer === above a conductive contact layer 230, located Above the reflective layer 240; a luminescent core 220' is located over the conductive contact layer 23A; and an undoped type = and the layer is over the luminescent stack 220. The light-emitting layer 22 includes a J-thief layer 226 located on the conductive contact layer 23A; + a conductive semiconductor layer 226; - a first-type impurity is located in the first doped 224 and the undoped semiconductor Layer = ^ is formed on the upper surface of the light-emitting layer-doped semiconductor layer 21 在 in the untwisted photonic body 利用 by lithography or _ etc. 8 200947752 Introduction 2: Λ 210 formation - opening 214 to bare part of the second doping 2 dew, electricity _ 23Q ' with lithography === The second 214 is formed - the first - _ %. And contacting the second doping type and being exposed to the conductive contact layer 23, at this time, the support substrate 20 is connected to the connection layer 250 or the reflective layer 24t. In addition, part of the unfilled 1 + conductor 210 and the second doped semiconductor layer a (4) may be removed to form a second electric _ _ ^ Ο Ο Ο 7 7 7 — — — — — — — — Preferably, the filament produces a cleavage 3 comprising a high power illuminating device of any of the embodiments of the present invention. The neutron generating device 3 has a illuminating device such as a street lamp, a lamp, or an indoor lighting source, and may also be a traffic number, or a flat ray, a H-back lining. The light source generating device 3 comprises a high-power recording device, a light source 3, and a power supply system 32 for supplying a light source 31-current and a control element (4) for controlling the power supply system 32. FIG. 8 is a schematic cross-sectional view showing a backlight module 4 including the light source generating device 3 of the foregoing embodiment, and an optical element 41. The optical element 41 can process the light emitted by the light source generating device 3 to be applied to a flat display. The above-described embodiments are merely illustrative of the principles and effects of the invention and are not intended to limit the invention. Modifications and variations of the above-described embodiments can be made by those skilled in the art without departing from the spirit and scope of the invention. Therefore, the scope of protection of the present invention is as set forth in the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS FIGS. 1 to 5 are views showing a manufacturing flow of a high-power light-emitting device according to an embodiment of the present invention. Figure 6 is a cross-sectional view showing a high power light-emitting device in accordance with another embodiment of the present invention. Fig. 7 is a schematic view showing a light source generating device which is composed of a light-emitting element of an embodiment of the present invention. Fig. 8 is a schematic view showing a schematic diagram of a backlight module using the light-emitting elements of the embodiment of the present invention. [Main component symbol description] © 1 light-emitting device 10, 2 high-power light-emitting device 100 growth substrate 101, 201 support substrate 110, 210 undoped semiconductor layer 112, 212 periodic structure 114, 214 opening 120, 220 light-emitting laminate 122 222, second doped semiconductor layer 124, 224 luminescent layer® 126, 226 first doped semiconductor layer 130 conductive contact layer 140 reflective layer 150 bonding layer 160, 260 first electrode 170, 270 second electrode 3 light source Device 31 light source 32 power supply system 33 control element 200947752 4 backlight module 41 optical component
1111