TW200837562A - Non-volatile memory and method for class-based update block replacement rules - Google Patents

Non-volatile memory and method for class-based update block replacement rules Download PDF

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Publication number
TW200837562A
TW200837562A TW096134607A TW96134607A TW200837562A TW 200837562 A TW200837562 A TW 200837562A TW 096134607 A TW096134607 A TW 096134607A TW 96134607 A TW96134607 A TW 96134607A TW 200837562 A TW200837562 A TW 200837562A
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Taiwan
Prior art keywords
block
update
logical
memory
blocks
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TW096134607A
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Chinese (zh)
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TWI340899B (en
Inventor
Jason T Lin
Original Assignee
Sandisk Corp
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Priority claimed from US11/532,467 external-priority patent/US7774392B2/en
Priority claimed from US11/532,456 external-priority patent/US7779056B2/en
Application filed by Sandisk Corp filed Critical Sandisk Corp
Publication of TW200837562A publication Critical patent/TW200837562A/en
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Publication of TWI340899B publication Critical patent/TWI340899B/en

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023Free address space management
    • G06F12/0238Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72Details relating to flash memory management
    • G06F2212/7202Allocation control and policies

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Read Only Memory (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)

Abstract

In a nonvolatile memory with block management system, data are written to blocks and are erasable block by block. At any time a pool of blocks are open for storing data concurrently. The number of blocks in the pool is limited. A replacement system allows new blocks to be introduced into the pool without exceeding the limit. In particular, different classes of blocks in the pool each has its own replacement rule, such as closing a least active block before being replaced. In this way, possible inefficiency and premature closure of blocks in the pool can be avoided.

Description

200837562 九、發明說明: 【發明所屬之技術領域】 本發明一般係關於非揮發性半導體記憶體,明確而言係 具有記憶體區塊管理系統者,其採用改良系統以便管理同 時開啟供儲存資料之區塊集區的替代。 【先前技術】 能夠非揮發性儲存電荷的固態記憶體(特200837562 IX. DESCRIPTION OF THE INVENTION: TECHNICAL FIELD The present invention generally relates to a non-volatile semiconductor memory, specifically a memory block management system, which employs an improved system for managing simultaneous opening of data for storage. Replacement of block pools. [Prior Art] A solid state memory capable of storing charges nonvolatilely

成一小形狀因數卡的EEPROM及快閃EEPR〇M之形式)近年 來已經成為各種行動及手持裝置(尤其是資訊器具與消費 性電子產品)中選用的儲存器。和同為固態記憶體的 Ram(p通機存取記憶體)不同的係,快閃記憶體係非揮發性 的所以,即使關閉電源後仍可保留其已儲存的資料。另 外和ROM(唯讀記憶體)不同的係,快閃記憶體可以和碟 片儲存裝置雷同的方式來進行重寫。雖然成本較高不 過利用快閃記憶體作為大量儲存應用的情形卻越來越普 遍。傳統大量儲存器(其係基於旋轉磁性媒體,例如硬碟 :與軟碟)並不適用於行動及手持環境。這係因為碟片驅 盗的體積趨於龐大,I易產生機械故障,而且具有 的延遲時間以及較高的功率 半要求该些令人討厭的屬性使 二寻到•用主的儲存器無法在大多數行動式及可攜式應用 除式卡另一方面,快閃記憶體(不論係崁入或可卸 =二:式)因為具有尺寸小、耗電低、速度快以及 境中“特性,所以,非常適用於移動式與手持式環 124919.doc 200837562 快閃EEPROM與EEPROM(電可抹除可程式化唯讀記憶 體)的雷同處係其同樣為可被抹除的非揮發性記憶體,並 且可將新資料寫入或”程式化”至其記憶體單元之中。兩者 皆係於㈣電晶體結構中利用位於一 +導體餘中介於源 極區與汲極區間之通道區上的浮動(未被連接的)導電問 極。接著便會於該浮動閘極上提供一控制閘極。該電晶體 的臨界電壓特徵係受控於保留在該浮動閘極上的電荷量。 即’對該浮動閘極上既定的電荷位準而言,必須於該電晶 體被”開啟”前施加-對應(臨界)電壓至該控制閘極,方能 於其源極區與沒極區間產生導通。明確地說,快閃 ee^rom之類的快閃記憶體允許同時抹除整個區塊的記憶 體单元。 該浮動閘極能夠保留某個範圊 田木丨U靶阁的電何,所以,可以被程 式化成一臨界電壓視窗内杯咅 Μ的S品界電壓位準。該臨界電 壓視窗的尺寸係由該裝置的最 不罝的取小g品界位準與最大臨界位準In the form of a small form factor card EEPROM and flash EEPR〇M, it has become a storage device of choice for various mobile and handheld devices (especially information appliances and consumer electronics). Unlike the Ram (p access memory), which is also a solid-state memory, the flash memory system is non-volatile, so it can retain its stored data even after the power is turned off. In addition to the ROM (read-only memory) system, the flash memory can be rewritten in the same way as the disk storage device. Although the cost is higher, it is more and more common to use flash memory as a mass storage application. Traditional mass storage, which is based on rotating magnetic media, such as hard drives: and floppy disks, is not suitable for mobile and handheld environments. This is because the volume of disc piracy tends to be bulky, I is prone to mechanical failure, and the delay time and high power half require these annoying properties to make the second storage cannot be used. Most mobile and portable applications have a card, on the other hand, flash memory (whether intrusive or detachable = two:) because of its small size, low power consumption, fast speed and "characteristics," Therefore, it is very suitable for mobile and handheld rings 124919.doc 200837562 Flash EEPROM and EEPROM (electrically erasable programmable read-only memory) are similarly non-volatile memory that can be erased And new data can be written or "programmed" into its memory unit. Both are in (iv) the crystal structure using the channel region between the source region and the drain region in the middle of a + conductor. a floating (unconnected) conductive pole. A control gate is then provided on the floating gate. The threshold voltage characteristic of the transistor is controlled by the amount of charge remaining on the floating gate. The floating gate is set In terms of charge level, it is necessary to apply a -corresponding (critical) voltage to the control gate before the transistor is "on" to enable conduction between its source region and the poleless region. Specifically, flash ee A flash memory such as ^rom allows the memory cells of the entire block to be erased at the same time. The floating gate can retain the electrical power of a certain Van Gogh cymbal U target, so it can be programmed into a threshold voltage. The voltage level of the S product in the cup inside the window. The size of the threshold voltage window is determined by the most inconspicuous position of the device and the maximum critical level.

來界定,而該等位準依庠對A T應於可被程式化於該浮動閘極 上的電荷範圍。該臨農《目处 /αί 口 V ®通Φ取決於該記憶體裝置的特 徵、操作條件以及歷史。人 》、^ 娜上’该視窗内每種不同的、 可解析的臨界電壓位進益问^ 位旱轭圍皆可用來代表該單元的-明確 的記憶體狀態。當將蚱w +广 記…… 壓分割成兩個不同區域時,各 口己體早凡此夠儲存一位 欠 IA ^ / 兀之貝料。同樣,當將臨界電壓 祝囪分割成兩個以卜夕 广你一 同區域時,各記憶體單元能夠儲 存一位70以上之資料。 % 通常會利用下面兩種機 制中其中一者將作為記憶體單元 124919.doc 200837562 的電晶體程式化至一 ”經程式化,,狀態。於”熱電子射出,, 中,被施加至汲極的高電壓會對跨越該基板通道區的電子 進行加速。於此同時,被施加至該控制閘極的高電壓則會 透過一薄的閘極介電質將該等熱電子拉至該浮動閘極之 上。於’’穿隨射出’’中,會相對於該基板施加一高電壓給該 控制閘極。依此方式,便可從該基板將電子拉到中間的浮 動閘極。雖然術語’’程式化”於過往係用來描述藉由將電子 射至該記憶體單元中於一開始便被抹除的電荷儲存單位中 f以便改變記憶體狀態來寫入該記憶體,不過,目前則可與 π寫入”或π記錄”之類更常見的詞語交換使用。 可以利用下面數種機制來抹除該記憶體裝置。對 EEPROM而言,藉由相對於該控制閘極施加一高電壓給該 基板,致使可於該浮動閘極中誘發出電子,使其穿隨一薄 氧化物進入该基板通道區(即,F〇wler_N〇rdheim穿隧效 應)’便可電抹除一記憶體單元。一般來說,EEpR〇M可以 逐個位元組的方式來抹除。對快閃EEpR〇M而言,可每次 C電抹除所有的記憶體或是每次電抹除一或多個最小可抹除 區塊,其中一最小可抹除區塊可能係由一個以上的區段所 組成且每個區段均可儲存512個位元組或更多的資料。 該記憶體裝置通常包括可被安裝於一張卡上的一或更多 記憶體晶片。每個記憶體晶片皆包含一受到周邊電路(例 如解碼器及抹除電路、寫入電路以及讀取電路)支援的記 憶體單元陣列。更複雜的記憶體裝置還會搭配一可實施智 慧型與更高階記憶體操作與介接的控制器。 124919.doc 200837562 現今正在使用許多市售成功的非揮發性固態記憶體裝 置。該些記憶體裝置可能係快閃EeprOM,或是可採用其 它類型的非揮發性記憶體單元。美國專利第5,〇7〇,〇32、 5,095,344、5,315,541、5,343,063、及 5,661,053、5,313,421 及6,222,762號中提供快閃記憶體及系統之範例以及製造其 之方法。特疋g之,具有NAND串結構之快閃記憶體裝置 在美國專利第5,570,3 15、5,903,495、6,046,935號中予以 說明。另外,亦可利用具有一用來儲存電荷之介電層的記 憶體單元來製造非揮發性記憶體裝置。其係利用一介電層 來替代前面所述的導電浮動閘極元件。Eitan等人已在2〇〇〇 年 11 月的 IEEE Electron Device Letters,第 21 卷,第 11 期,第 543 至 545 頁的”NR0M: a Novel Localized Trapping, 2_Bit Nonvolatile Memory Cell"中說明使用介電儲存元件 之此類圮憶體裝置。一 ON〇介電層橫跨源極與汲極擴散區 之間的通道而延伸。用於一個資料位元的電荷係在鄰近於 汲極的介電層中局部化,並且用於另一資料位元的電荷係 I 在鄰近於源極的介電層中局部化。例如,美國專利第 5,768,192及6,011,725號揭示一種具有夾在兩個二氧化矽層 間之捕獲介電質的非揮發性記憶體單元。藉由分開讀取該 介電質内空間分離的電荷儲存區域的二進制狀態,便可實 現多重狀態的資料儲存。 為改良讀取與程式化效能,可平行讀取或程式化一陣列 中多個電荷儲存元件或記憶體電晶體。因此,可同時讀取 或程式化記憶體元件之”頁面”。於現有的記憶體架構中, 124919.doc 200837562 一列通常會含有數個交錯頁或是其可能會構成其中一頁。 一頁中的所有記憶體元件將會被同時讀取或程式化。 於快閃記憶體系統中’抹除操作所花費的時;長度可能 :讀取與程式化操作的倍數長度。因此,吾人希望具有非 常大的抹除區塊。如此一來,便可將抹除時間分攤至大量 的記憶體單元聚合體之中。 快閃記憶體的特性係會斷定必須將資料寫入一已抹除的 =憶體位置中。假使欲更新來自—主機的特定邏輯位址的 育料的話’其中-種方式便係於相同的實體記憶體位置中 重寫該更新資料。即,邏輯至實體位址映射並未改變。不 過,此意謂著整個抹除區塊會含有必須先被抹除然後再以 j更新資料進行重寫的實體位置。此更新方法的效率不 彰,因為其需要抹除且重寫整個抹除區塊,假使欲被更新 的資料僅佔據該抹除區塊的一小部分的話其效率尤為不 彰:其還將會導致更頻繁的該記憶體區塊的抹除循環,就 此類型a己彳,¾體裝置的有限耐用性來說,並不樂見。 官理快閃記憶體系統的另一項問題係必須程序系統控制 與目錄資料。於各項記憶體操作進程期間會產生且存取該 貝料。因此,有效地程序與便捷的存取將會直接影響到效 月b。吾人希望將此類型的資料保持在快閃記憶體之中,因 為快閃記憶體係原本用於儲存且為非揮發性。不過,利用 介於該控制器與該快閃記憶體之間的中間檔案管理系統的 居,便無法直接存取該資料。另外,系統控制與目錄資料 傾向於非常活躍且會被分割,其並不利於儲存在具有大尺 124919.doc 200837562 寸區塊抹除的系統之中。依慣例’此類型的資料會被設定 在控制器RAM之中,從而允許該控制器來直接存取。於供 電給該記憶體褒置之後’一初始化程序便會致能掃描該快 閃記憶體,以便編譯該必要的系統控制與目錄資訊,用以 將其置放在該控制器RAM之中。此程序會花費時間且需要 控制器RAM容量,因而必須進—步提高快閃記憶體容量。 US 6,567,307揭示的係—種於大型抹除區塊中程序區段 更新的方法’纟包含將該更新資料記錄於作為刮傷填補的 多個抹除區塊之中’並且最後於依照邏輯順序對其重新配 置之後來合併該等各個區塊間的有效區段並且重寫該等區 •k依此方式便無須於每次輕微更新時抹除且重寫一區 塊。 WO 03/027828與WO 00/49488兩案揭示的係一種於大型 抹除區塊中程序更新的記憶體系、统,其包含將該等邏輯區 段位址分割成複數個區帶。其會保留一小型的邏輯位址範 圍區帶用於作用中系統控制資料,該區帶會與用於使用者 資料的另-區帶分離。依此方式,於其自己的區帶中操縱 該系統控制資料將不會與另一區帶中相關的使用者資料產 生相互作用。更新係於邏輯區段物準處,而且一寫入指標 指向欲被寫入之區塊中的該等對應的實體區段。該映射資 訊會被緩衝於RAM之中,而且最後會被儲存於該主記憶體 中的區段配置表之中。一邏輯區段的最新版本將會廢棄現 有區塊中已經變成部分廢棄的所有先前版本。實施廢棄項 目收集亦便保持可接收數量的部分廢棄區塊。 124919.doc -10- 200837562 先W技#r的系統趨於將該更新資料分散在許多區塊中; 或者’該更新資料可能會使得許多現有的區塊變成部分麥 棄。其結果通常係必須針對該等部分廢棄的區塊進行: =棄:目收集’其效率相當不彰且會造成該記憶體提: 老。另卜,相較於非循序更新,並沒有任何系統性 效的方式來程序循序更新。 有 憶體。明 ‘fe體操作 所以,通常需要高容量且高效能的非揮發性記 確地說,需要具有一種能夠於大型區塊中進行記 f 且不έ有别述問題的南容量非揮發性記憶體。 【發明内容】 -非揮發性記憶體系統會被組織成複數個實體記憶體位 置的複數個實體群。每個實體群(元區塊)均可如同一個單 位般地抹除,並且可用來儲存—邏輯f料群。記情體管理 系統允許藉由配置一專門用來記錄該邏輯群組之該更新資 料的兀區以便用於更新一邏輯資料群。該更新元區塊 會依照收相順序來記錄更新",而且並未限制該記錄 是(循序)否(雜亂)以和原來被儲存般正確 後,便會關閉該更新元區塊,以用於進一步=將: =數項程序中的其中m最終皆會以正確㈣ 序來產生-完全填充的元區塊,,來替代原始元區塊。於 :亂的情況中,會以進行頻繁更新的方式將目錄資料保留 多重邏輯群組。 同時被更新的 ?發明的其中一項特點允許以逐個邏輯群組的方式來更 新貧料。因此,當欲更新一邏輯群組時,邏輯單位的分佈 124919.doc 200837562 (Γ!有Λ新廢^單位的記憶體單位的分散)便會被侷限於某 & 。冑該邏輯群組—般内含於-f體區塊内時,尤 為如此。 兀 於該邏輯群組的更新期間’通常必須指派一或兩個區塊 來緩衝該等已更新的邏輯單位。因此,僅需要於相當少數 的區塊中實施廢棄項目收集。可利用合併法或壓縮法來實 % —雜亂區塊的廢棄項目收集。 *相較於該等循序區塊來說,該更新程序的經濟效能於該 等更新區塊的一般程序中會愈加明顯’因而便無須為雜亂 (非循序)更新配置任何額外的區塊。所有的更新區塊均會 被指派為循序的更新區,鬼’而且任何的更新區塊均可㈣ 更成雜亂的更新區塊。更確切地說,可任意地將_更新區 塊從循序式變更成雜亂式。 有效地使用系統資源便可允許同時更新多個邏輯群組。 如此便可進一步提高效率且降低額外負擔。 依據本發明之一方面,在採用區塊管理系統之非揮發性 記憶體中,針對支援同時開啟用於記錄資料的第一預定最 大數目之更新區塊的系統實施改良區塊替代方案。更新區 塊主要係循序更新區塊,其中以邏輯循序順序記錄資料, 但允許第二預定最大數目之更新區塊係雜亂更新區塊,其 中未以邏輯循序順序記錄資料。無論何時更新區塊之新配 置可使更新區塊之集區超過第一或第二預定最大數目,將 關閉及移除集區内現有更新區塊之一,以便符合限制。關 閉更新區塊前,其資料係合併成循序區塊。改良方案係避 124919.doc -12· 200837562 免循序更新可導致額外數目之雜亂區塊合併的情況。此係 藉由將循序更新區塊及雜亂更新區塊分離至個別替換或組 合集區内而完成。特定言之,當循序更新使新更新區塊之 配置超過第一預定最大數目時,集區之最近最少使用之循 序更新區塊係優先挪出空間。To define, the level of dependence on A T should be a range of charges that can be programmed on the floating gate. The prospective location /αί V ® Φ depends on the characteristics, operating conditions and history of the memory device. People 》, ^ 上上' In this window, each of the different, resolvable threshold voltage levels can be used to represent the unit's clear memory state. When 蚱w + 广记... is divided into two different areas, each mouth is enough to store one owing IA ^ / 兀. Similarly, when the threshold voltage is divided into two areas, the memory unit can store more than 70 pieces of data. % usually uses one of the following two mechanisms to program the transistor as memory unit 124919.doc 200837562 into a "programmed, state." in "thermal electron emission,", is applied to the bungee The high voltage accelerates the electrons across the substrate channel region. At the same time, the high voltage applied to the control gate pulls the hot electrons onto the floating gate through a thin gate dielectric. In the 'wearing out', a high voltage is applied to the substrate relative to the substrate. In this way, electrons can be pulled from the substrate to the intermediate floating gate. Although the term 'programming' is used in the past to describe the writing of the memory by exposing electrons to the memory unit in the beginning to be erased in order to change the state of the memory, At present, it can be exchanged with more common words such as π write or π record. The following devices can be used to erase the memory device. For EEPROM, by applying with respect to the control gate A high voltage is applied to the substrate such that electrons can be induced in the floating gate to pass through a thin oxide into the substrate channel region (ie, F〇wler_N〇rdheim tunneling effect). A memory unit. In general, EEpR〇M can be erased on a byte by byte basis. For flash EEpR〇M, all memory can be erased every time C is erased or erased every time. One or more minimum erasable blocks, wherein a minimum erasable block may be composed of more than one segment and each segment may store 512 bytes or more of data. Body devices typically include a device that can be mounted on a card Or more memory chips. Each memory chip contains an array of memory cells supported by peripheral circuits such as decoders and erase circuits, write circuits, and read circuits. More complex memory devices A controller that implements intelligent and higher-order memory operation and interface. 124919.doc 200837562 Many commercially available non-volatile solid-state memory devices are currently in use. These memory devices may flash EeprOM. Alternatively, other types of non-volatile memory cells can be used. Flash memory and systems are provided in U.S. Patent Nos. 5, 5, 5, 5, 095, 344, 5, 315, 541, 5, 343, 063, and 5, 661, 053, 5, 313, 421 and 6, 222, 762. Examples and methods of making the same. A flash memory device having a NAND string structure is described in U.S. Patent Nos. 5,570,315, 5,903,495, and 6,046,935. a memory cell of the dielectric layer to fabricate a non-volatile memory device that utilizes a dielectric layer in place of the conductive floating gate described above Components. Eitan et al., IEEE Electron Device Letters, Vol. 21, No. 11, pp. 543-545, NR0M: a Novel Localized Trapping, 2_Bit Nonvolatile Memory Cell" A memory device of such a dielectric storage element. An ON dielectric layer extends across the channel between the source and drain diffusion regions. The charge for one data bit is localized in the dielectric layer adjacent to the drain and the charge system I for the other data bit is localized in the dielectric layer adjacent to the source. For example, U.S. Patent Nos. 5,768,192 and 6,011,725 disclose a non-volatile memory cell having a trapping dielectric sandwiched between two ceria layers. Multiple state data storage can be achieved by separately reading the binary state of the charge storage region separated by the space within the dielectric. To improve read and program performance, multiple charge storage elements or memory transistors in an array can be read or programmed in parallel. Therefore, the "page" of the memory component can be read or programmed simultaneously. In the existing memory architecture, 124919.doc 200837562 A column usually contains several interlaced pages or it may constitute one of the pages. All memory components on a page will be read or programmed simultaneously. In the flash memory system, the time taken to erase the operation; the length may be: the multiple of the read and program operation. Therefore, we hope to have a very large erase block. In this way, the erase time can be spread among a large number of memory cell aggregates. The characteristics of the flash memory will conclude that the data must be written to an erased = memory location. If the material from the specific logical address of the host is to be updated, the way is to rewrite the updated data in the same physical memory location. That is, the logical-to-physical address mapping has not changed. However, this means that the entire erase block will contain the physical location that must be erased before rewriting the data with j. This update method is inefficient because it needs to erase and rewrite the entire erase block, which is especially inefficient if the data to be updated only occupies a small portion of the erase block: it will also The erasing cycle that leads to more frequent memory blocks is not desirable in terms of the limited durability of this type of device. Another problem with the official flash memory system is the need for program system control and catalog information. The bead material is generated and accessed during each memory operation process. Therefore, effective procedures and convenient access will directly affect the validity month b. We want to keep this type of data in flash memory because the flash memory system was originally stored and non-volatile. However, using the intermediate file management system between the controller and the flash memory, the data cannot be accessed directly. In addition, system control and catalogue data tend to be very active and segmented, which is not conducive to storage in systems with large-scale 124,919.doc 200837562 inch block erase. By convention, this type of data is set in the controller RAM, allowing the controller to access it directly. After the power is supplied to the memory device, an initialization program enables scanning of the flash memory to compile the necessary system control and directory information for placement in the controller RAM. This program takes time and requires controller RAM capacity, so it is necessary to further increase the flash memory capacity. US 6,567,307 discloses a method of updating a program segment in a large erasure block, 纟 including recording the update data in a plurality of erase blocks as a scratch padding and finally in a logical order After reconfiguration, the valid sections between the various blocks are merged and the areas are rewritten. In this way, it is not necessary to erase and rewrite a block each time a slight update is made. WO 03/027828 and WO 00/49488 disclose a memory system for updating a program in a large erase block, which includes dividing the logical segment addresses into a plurality of zones. It retains a small logical address range for active system control data that is separated from the other zone for user data. In this way, manipulating the system control data in its own zone will not interact with user data associated with another zone. The update is at the logical sector level and a write indicator points to the corresponding physical segment in the block to be written. The mapping information is buffered in RAM and is eventually stored in the extent configuration table in the main memory. The latest version of a logical section will discard all previous versions of the existing block that have become partially obsolete. The implementation of the abandoned project collection also maintains a receivable portion of the abandoned block. 124919.doc -10- 200837562 The system of W technology #r tends to spread the update data in many blocks; or 'this update data may cause many existing blocks to become partially abandoned. The result is usually for the blocks that are partially discarded: = abandon: the collection is 'very efficient and will cause the memory to be raised: old. In addition, compared to non-sequential updates, there is no systematic way to program updates. There is a memory. Therefore, it is necessary to have a high-capacity and high-efficiency non-volatile memory. It is necessary to have a south-capacity non-volatile memory that can be recorded in a large block without any problems. . SUMMARY OF THE INVENTION - A non-volatile memory system is organized into a plurality of entity groups of a plurality of physical memory locations. Each entity group (meta block) can be erased as a unit and can be used to store a logical f group. The story management system allows for updating a logical data group by configuring a zone dedicated to recording the updated information for the logical group. The update metablock records the update" according to the order of the collection, and does not restrict the record to be (sequential) or not (disorderly) and the original metablock is closed, so that the update metablock is closed. In the further = will: = in the program, where m will eventually produce the - completely filled metablock in the correct (four) order, instead of the original metablock. In the case of chaos, the directory data is kept in multiple logical groups in a way that is frequently updated. One of the features of the invention that has been updated at the same time allows for the updating of lean materials in a logical group by group. Therefore, when a logical group is to be updated, the distribution of logical units is 124919.doc 200837562 (Γ! The dispersion of memory units with new waste units) is limited to a certain & This is especially true when the logical group is normally contained within the -f block. During the update period of the logical group, one or two blocks must typically be assigned to buffer the updated logical units. Therefore, it is only necessary to implement the collection of abandoned projects in a relatively small number of blocks. The merged or compressed method can be used to collect the discarded items of the %-disorganized block. * The economic performance of the update program will become more apparent in the general procedures of the update blocks compared to the sequential blocks. Thus, there is no need to configure any additional blocks for clutter (non-sequential) updates. All update blocks are assigned a sequential update area, and any update block can (4) be a more messy update block. More specifically, the _update block can be arbitrarily changed from sequential to cluttered. Effective use of system resources allows multiple logical groups to be updated simultaneously. This will further increase efficiency and reduce the additional burden. In accordance with one aspect of the present invention, in a non-volatile memory employing a block management system, an improved block replacement scheme is implemented for a system that supports simultaneous opening of a first predetermined maximum number of updated blocks for recording data. The update block is mainly a sequential update block in which data is recorded in a logical sequential order, but the second predetermined maximum number of update blocks are allowed to be disorderly updated, wherein the data is not recorded in a logical sequential order. Whenever the new configuration of the update block causes the update block to exceed the first or second predetermined maximum number, one of the existing update blocks in the set will be closed and removed to meet the limit. Before closing the update block, its data is merged into sequential blocks. The improved scheme avoids 124919.doc -12· 200837562 The out-of-order update can lead to the merger of an additional number of messy blocks. This is accomplished by separating the sequential update blocks and the cluttered update blocks into individual replacement or combination sets. Specifically, when the sequential update causes the configuration of the new update block to exceed the first predetermined maximum number, the least recently used sequence update block of the set area preferentially moves the space.

當前系統中,一般存在兩種類型之資料:使用者資料及 控制資料。通常以邏輯循序順序將使用者資料從主機傳送 至記憶體系統。循序更新區塊係配置成最佳地程序來自主 機之循序寫入操作。使用者資料亦可呈邏輯非循序順序, 特別係在隨後更新邏輯資料時。雜亂更新區塊係建立成以 非循序順序最佳地程序資料。另一雜亂或非循序資料之來 源係藉由檔案系統或記憶體系統保持之控制資料,例如在 儲存使用者資料過程中產生的檔案及目錄資訊。 符合支援最多最大數目之同時開啟更新區塊的實際系統 限制的先前方案係關閉集區内之最近最少使用之更新區 塊’無論其係循序或雜亂。 本方案改善先前方案,其中本質上若循序寫入操作期間 集區中之更新區塊需要關閉以挪出空間給新配置,則關閉 集區内之最近最少使用之循序更新區塊。此確保各種更: ,塊有效地心程序循序寫人操作及隨機寫人操作。特定 .之’其避免主機執行之較大循序寫人操作可強制包含 AT及目錄資訊之雜亂更新區塊的過早關閉的無效情況。 可Μ地有效建立另_雜亂區&,以儲存附及目錄次 机’―旦完成較大循序寫入操作即再次將其更新。改良^ 124919.doc -13- 200837562 代政策之建立強制替代及合併集區之分離,以防止在循序 寫入期間合併雜IL區塊的新增額外負擔,以及潛在的開啟 循序或開啟雜亂區塊之合併,以管理隨後FAT及目錄資訊 更新。 本方案之一般化係根據一組屬性分類更新區塊,例如更 新區塊係儲存循序或非循序資料,或者其儲存某一預定義 類型之系統資料。在實施有限數目之更新區塊的集區時, 各層級之更新區塊在超過該層級支援之最大數目時將具有 其本身之替代規則。 例如,循序更新區塊及非循序更新區塊係兩種不同層 級。該等層級之各個的替代規則相同,即採用新的區塊替 代最低作$ t之區塊。@此#超過循序更新區塊之集區 時在將新區塊引入集區前將關閉及移除集區内之最低作 用中區塊。對於非循序更新區塊之集區也是如此。 瓜而β各層級具有獨立於其他層級的其本身之替代 規則。替代規則之範㈣根據對應層級替代最近最少存 取取近取多存取、不頻繁存取、最頻繁存取等。 k本發明之較佳具體實施例之下列說明中將會明白本發 明之額外特徵與優點,該等具體實施例將結合附圖來說 【實施方式】 圖1至圖20說明採用 ^ ,^ ^ 鬼g理之汜憶體系統的範例,其 中可實施本發明之夂链士二 r u咕 種方面。類似記憶體系統已在In the current system, there are generally two types of data: user data and control data. User data is typically transferred from the host to the memory system in a logical sequential order. The sequential update block is configured to optimally program sequential write operations from the host. User data can also be in a logical, non-sequential order, especially when the logic is subsequently updated. The messy update block is built to best program data in a non-sequential order. Another source of clutter or non-sequential data is control data maintained by the file system or memory system, such as file and directory information generated during the process of storing user data. The previous scheme that meets the maximum system number while supporting the maximum system number while opening the update block is the least recently used update block in the closed zone, regardless of its order or clutter. This scenario improves on the previous scenario, where essentially the updated block in the pool during the sequential write operation needs to be closed to move space for the new configuration, then the least recently used sequential update block in the cluster is closed. This ensures a variety of more:, block effective geocentric program sequential writing and random writing operations. The specific sequential write operation that avoids host execution can force invalidation of premature shutdown of the messy update block containing AT and directory information. It is possible to effectively create another _disorder area & to store the attached directory computer ’ ― once the large sequential write operation is completed, it is updated again. Improvement ^ 124919.doc -13- 200837562 Generation of policy mandatory substitution and separation of merged pools to prevent additional additional burdens of merged hetero-Iblocks during sequential writes, and potential to open sequential or open messy blocks The merger to manage subsequent FAT and catalog information updates. The generalization of the scheme updates the blocks according to a set of attributes, such as updating the block to store sequential or non-sequential data, or storing system data of a predefined type. When implementing a pool of a limited number of update blocks, the update blocks of each level will have their own replacement rules when the maximum number of levels supported by the level is exceeded. For example, sequential update blocks and non-sequential update blocks are two different levels. The replacement rules for each of these levels are the same, that is, the new block is substituted for the lowest block of $t. @此# When the cluster of the sequential update block is exceeded, the lowest-function block in the collection area will be closed and removed before the new block is introduced into the collection area. The same is true for the episodes of non-sequential update blocks. Each level of melon and beta has its own alternative rules that are independent of the other levels. The rule of the alternative rule (4) replaces the least recent access, the near access multiple access, the infrequent access, the most frequent access, etc. according to the corresponding level. Additional features and advantages of the present invention will become apparent from the following description of the preferred embodiments of the invention. An example of a system of ghosts, which can implement the aspect of the invention. Similar memory system is already in

Gorobets等人之美闹蛮立丨士 + 、一專利申&公開案第US-2005-0144365-124919.doc -14- 200837562 A1 號中揭示,標題為”Non-Volatile Memory and Method with Control Data Management”。 圖1示意性說明一適合實現本發明之記憶體系統的主硬 體組件。記憶體系統20通常透過一主機介面與一主機10操 作。記憶體系統一般係以記憶體卡或嵌入式記憶體系統之 形式。記憶體系統20包括藉由控制器1 〇〇控制操作之記憶 體200。記憶體200包含分佈於一或多個積體電路晶片上之 非揮發性記憶體單元的一或多個陣列。控制器1 〇〇包括介 面110、程序器120、可選共程序器121、ROM 122(唯讀記 憶體)、RAM 130(隨機存取記憶體)及可選可程式化非揮發 性記憶體124。介面11〇具有將控制器介接至主體之一組件 以及介接至記憶體200之另一組件。儲存於非揮發性ROM 122及/或可選非揮發性記憶體124内之韌體提供用於程序 器120之代碼,以實施控制器1〇〇之功能。可藉由程序器 120或可選共程序器121程序錯誤校正碼。替代具體實施例 ,中,藉由狀態機(未顯示)實施控制器1〇〇。在另一具體實施 '例中,可在主機内實施控制器100。 邏輯與實體區塊結構 、圖2垅明根據本發明一較佳具體實施例的記憶體,其係 被、、且織^數個實體區段群(或元區塊)並且由該控制器的 j隐體“里裔來管理。將記憶體鳩組織成元區塊,其中 每個元區燒氧V 〇 ,, 鬼為了一起抹除的實體區段s〇、…、Sn_i之群 組0 Μ在擒案系統或择你i X奋作糸統條件下運行一應用程式時,主 124919.doc -15- 200837562 機1 〇存取記憶體200。通常而言,主機系統以邏輯區段單 位而定址資料,例如,每個區段可包含5 12個位元組資 料。同樣,主機通常以邏輯叢集之單位來讀取或寫入記憶 體系統,每個邏輯叢集由一或多個邏輯區段組成。在某些 主機系統中,可能存在一可選主機側記憶體管理器以在主 機中執行較低位準記憶體管理。在讀取或寫入操作期間的 大夕數情況下,主機1 〇本質上發出一命令給記憶體系統2〇The title of "Non-Volatile Memory and Method with Control Data Management" is disclosed in Gorobets et al., "Non-Volatile Memory and Method with Control Data Management", which is disclosed in US Patent Application Publication No. US-2005-0144365-124919.doc -14-200837562 A1. ". BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a schematic illustration of a main hardware assembly suitable for implementing the memory system of the present invention. The memory system 20 typically operates with a host 10 via a host interface. The memory system is typically in the form of a memory card or embedded memory system. The memory system 20 includes a memory 200 that is controlled by the controller 1 . Memory 200 includes one or more arrays of non-volatile memory cells distributed over one or more integrated circuit wafers. The controller 1 includes an interface 110, a programmer 120, an optional coprocessor 121, a ROM 122 (read only memory), a RAM 130 (random access memory), and an optional programmable non-volatile memory 124. . The interface 11 has another component that interfaces the controller to one of the components and to the memory 200. The firmware stored in the non-volatile ROM 122 and/or the optional non-volatile memory 124 provides code for the programmer 120 to implement the functions of the controller. The program error correction code can be programmed by the programmer 120 or the optional co-programmer 121. Instead of the specific embodiment, the controller 1 is implemented by a state machine (not shown). In another embodiment, the controller 100 can be implemented within a host. Logic and physical block structure, FIG. 2 illustrates a memory according to a preferred embodiment of the present invention, which is woven, and woven into a plurality of physical segment groups (or metablocks) and is controlled by the controller j hidden body "living to manage. The memory is organized into metablocks, in which each meta-region burns oxygen V 〇, the ghosts in order to erase the physical segments s〇, ..., Sn_i group 0 Μ When running an application under the conditions of the file system or the system, the main 124919.doc -15-200837562 machine 1 access memory 200. Generally speaking, the host system is in logical sector units. Addressing information, for example, each segment can contain 5 12 bytes of data. Similarly, the host typically reads or writes to the memory system in units of logical clusters, each logical cluster consisting of one or more logical segments. In some host systems, there may be an optional host side memory manager to perform lower level memory management in the host. In the case of a large number of eves during a read or write operation, host 1 〇 essentially sends a command to the memory system 2〇

以’取或寫入一片段,其包含具有連續位址的資料之一串 邏輯區段。 將記憶體側記憶體管理器實施於記憶體系統20之控制器 1 〇〇内,以在快閃記憶體200之元區塊中管理主機邏輯區段 資料的儲存及擷取。較佳具體實施例中,記憶體管理器 包3用於管理元區塊之抹除、讀取及寫入操作的若干軟體 杈組。§己憶體管理器亦維持與其在快閃記憶體2〇〇及控制 时RAM 130當中的操作相關聯之系統控制與目錄資料。 "(〇至3A(iii)示忍,丨王說明很據本發% —平乂Ί王开姐I苑 例介於-邏輯群組與一元區塊間之映射。實體記憶體之元 區塊具有Ν個實體區段,其用於儲存—邏輯群組的資料之 Ν個邏輯區段。圖3Α⑴顯示來自邏輯群叫之資料,复中 邏輯區塊以連續邏輯順序〇、卜…、⑽。圖3A(ii)顯示以 相冋邏輯順序儲存於元區塊内之相同資料。在以此方式錯 存几區塊時’將it區塊視為"循序式—般而言,元區塊 :具有以不同順序加以儲存_,在此情況下,將元區 塊視為,,非循序式”或,,雜亂式,,。 124919.doc -16 - 200837562 在一邏輯群組之最低位址與其所映射的元區塊之最低位 址之間可能存在偏移。在此情況下,邏輯區段位址從元區 塊内的邏輯群組的底部返回至頂部而纏繞為一迴路。例 如,圖3A(iii)中,元區塊在其第一位置開始儲存邏輯區塊 k之資料。當到達最後邏輯區塊N-丨時,其繞回至區段〇, 最後將與邏輯區段k-1相關聯之資料儲存於其最後實體區 段中。在較佳具體實施例中,將頁面標籤用於識別任何偏 移,例如識別儲存在元區塊之第一實體區段中的資料之開 始邏輯區段位址。當兩個區塊僅相差一頁面標籤時,將該 等兩個區塊視為具有其以相同的順序加以儲存的邏輯區 段0 圖3B示意性說明介於複數個邏輯群組與複數個元區塊間 之映射。將每個邏輯群組映料—獨特元區塊,其中當前 對資料進行更新的少數邏輯群組除外。在已更新—邏:群 組之後’可將該群組映射為一不同元區塊。映射資訊係維 持在一組邏輯至實體目錄中,該等目錄將在下文加以更詳 細地說明。 也可預期其他類型的邏輯群組至元區塊映射。舉例來 說’由Alan Sinclair於和本發明同_天提出 共同擁有的美國專利申請宰,俨 月茶‘喊為 Adaptive Metablocks,, 之中便揭示具有可變尺寸的元區塊。共用待審的中嘖案之 整個揭示案係以引用的方式併入本文中。 样ΓΓ'之:特徵為系統採用單—邏輯分割操作,而且同 ,&理。己體系統之整個邏輯位址範圍内的邏輯區段之 124919.doc -17- 200837562 群組。例如,可以在邏輯位址空間當中的任何處分佈包含 系統資料的區段與包含使用者資料的區段。 與先别技術糸統不同’不存在系統區段之特殊分宝彳或巴 (即,與檔案配置表、目錄或子目錄相關的區段)以便在邏 輯位址空間中局部化很可能包含具有高頻率及小尺寸更新 的資料之區段。相反,更新區段之邏輯群組的該方案將有 效率地程序系統區段之典型存取圖案及檔案資料之典型存 取圖案。 圖4說明一元區塊於實體記憶體中和各種結構的對準。 快閃記憶體包括可作為一單位而一起抹除的記憶體單元之 區塊。此類抹除區塊為快閃記憶體之最小抹除單位或記憶 體之最小可抹除單位(MEU)。最小抹除單位為記憶體之^ 體設計參數,雖然在支援多重MEU抹除的某些記憶體系統 中,可以組態包括一個以上之MEU的”超級MEU,,。對於快 閃EEPROM而言,一MEU可包括一個區段,但較佳包括多 個區段。在所示的範例中,其具有M個區段。在較佳具體 實施例中,每個區段可以儲存512個位元組之資料並具有 一使用者資料部分及用於儲存系統或管理資料的標頭部 分。若元區塊係由P個MEU構成且每個MEU包含Μ個區 4又’則母個元區塊將具有μ個區段。 兀區塊代表處在系統位準的記憶體位置群組,例如可一 起抹除的區段。將快閃記憶體之實體位址空間視為一組元 區塊,一元區塊為最小抹除單位。在此說明書内,術語 元區塊與區塊同義,其係用於定義處在用於媒體管理 124919.doc 200837562 之糸統位準的最小抹除單位,而且術語"最小抹除單位 MEU係用於表示快閃記憶體的最小抹除單位。 $ 連結複數個最小抹除單位(MEU)以形成—元區塊 為最大化程式化速度與抹除速度,藉 彳乃武而儘可 ^利用平行度:將定位在多個MEU中的多個資訊頁配置 成加以並列程式化,並將多個MEU配置成加以並列抹除。 Γ \ 在快閃記憶體中,一頁為可在單一操作中—起加以^式 化的a己憶體單元之群組。一頁可包括多個區段。同樣,可 將一圮憶體陣列分割成一個以上之平面,其中每次可程^ 化或抹除一平面内的僅一個MEU。最後,可將平面分佈在 一或多個記憶體晶片當中。 在快閃圮憶體中,MEU可包括一或多頁。可將一快閃記 fe體曰曰片内的MEU組織在平面中。因為可同時程式化戋抹 除自每個平面的一個MEU,所以,有利的係藉由從每個平 面選擇一個MEU來形成多個MEU元區塊(參見以下圖5B)。 圖5 A說明連結不同平面的最小抹除單位所構成的元區 塊。每個元區塊(例如ΜΒ0、MB1、…)係由自記憶體系統 之不同平面的MEU構成,其中可將不同平面分佈在一或多 個晶片當中。圖2所示之元區塊鏈路管理器170管理用於每 個元區塊的MEU之連結。每個元區塊在初始格式化程序期 間加以配置,並且於系統的整個使用壽命中保持其組成 MEU,除非MEU之一中存在故障。 圖5 B說明其中會從每個平面中選出一最小抹除單位 (MEU)用以連結成一元區塊之一具體實施例。 124919.doc -19- 200837562 圖5C說明其中會從每個平面中選出一個以上的meu用以 連結成一元區塊之另一具體實施例。在另一項具體實施例 中,可從每個平面選擇一個以上之MEU以形成一超級 MEU。例如,可採用兩個MEU形成一超級meu。在此情況 下,可能需要一次以上之傳遞來進行讀取或寫入操作。 將MEU連結及重新連結成元區塊亦揭示於共同待審及共 同持有的美國專利申請案,其標題為” AdaptWe Deterministic Grouping of Blocks int〇 Multi_m〇ck 以⑺以犯以,,由 Gonzales等人申請於和本申請案的同一天。共用待審的申 請案之整個揭示案係以引用的方式併入本文中。 元區塊管理 圖6為該元區塊管理系統被實施在該控制器與快閃記憶 體中時的不意性方塊圖。元區塊管理系統包含實施於控制 M 100内之各種功能模組並將各種控制資料(包括目錄資料)A segment is fetched or written containing a string of logical segments of data having consecutive addresses. The memory side memory manager is implemented in the controller 1 of the memory system 20 to manage the storage and retrieval of the host logical sector data in the metablock of the flash memory 200. In a preferred embodiment, the memory manager package 3 is used to manage a plurality of software groups of erase, read, and write operations of the metablock. The memory manager also maintains system control and directory information associated with its operation in flash memory 2 and control time RAM 130. "(〇到3A(iii) shows forbearance, 丨王 description is very according to the present issue%. Pingyi Wang Kaijie I Court case is between - logical group and unary block. The physical memory block has A physical segment is used to store the logical segments of the data of the logical group. Figure 3 (1) shows the data from the logical group, and the logical blocks in the complex logical sequence are 〇, 卜..., (10). 3A(ii) shows the same data stored in the metablock in logical order. When several blocks are missed in this way, 'it' is treated as "sequentially, the metablock: Has been stored in a different order _, in this case, the metablock is treated as, non-sequential, or, chaotic,. 124919.doc -16 - 200837562 at the lowest address of a logical group There may be an offset between the lowest addresses of the mapped metablocks. In this case, the logical sector addresses are wound back into the loop from the bottom of the logical group within the metablock to the top. For example, Figure 3A (iii) In the first position, the metablock begins to store the information of the logical block k. When the logical block N-丨, it wraps around to the segment 〇, and finally stores the data associated with the logical segment k-1 in its last physical segment. In a preferred embodiment, the page label is used. Identifying any offset, such as identifying the starting logical sector address of the data stored in the first physical segment of the metablock. When the two blocks differ by only one page label, the two blocks are considered Having a logical section 0 stored in the same order Figure 3B schematically illustrates a mapping between a plurality of logical groups and a plurality of metablocks. Each logical group is mapped - a unique metablock, wherein Except for a few logical groups that currently update the data. After updating - logical: group, the group can be mapped to a different metablock. The mapping information is maintained in a set of logical to physical directories, such The catalogue will be explained in more detail below. Other types of logical group-to-meta-block mappings are also contemplated. For example, 'Alan Sinclair's US patent application jointly owned by the same invention as the present invention, 俨月Tea' shouted for Adapt In tive Metablocks, the meta-blocks with variable sizes are revealed. The entire disclosure of the shared pending case is incorporated herein by reference. The split operation, and the same, the logical section of the entire logical address range of the body system 124919.doc -17- 200837562 group. For example, the distribution system can be distributed anywhere in the logical address space The section of the data and the section containing the user data. Unlike the prior art system, there is no special branch or bar of the system section (ie, the section related to the file configuration table, directory or subdirectory). In order to localize in the logical address space it is possible to include segments of data with high frequency and small size updates. Conversely, this scheme of updating the logical group of segments will effectively map the typical access patterns of the system segments to the typical access patterns of the archives. Figure 4 illustrates the alignment of a unitary block in physical memory and various structures. The flash memory includes a block of memory cells that can be erased together as a unit. This erase block is the minimum erase unit of the flash memory or the minimum erasable unit (MEU) of the memory. The minimum erase unit is the memory design parameter of the memory. Although in some memory systems that support multiple MEU erase, you can configure a “super MEU” that includes more than one MEU. For flash EEPROM, A MEU may comprise a segment, but preferably comprises a plurality of segments. In the illustrated example, it has M segments. In a preferred embodiment, each segment may store 512 bytes. The data has a user data portion and a header portion for storing the system or management data. If the metablock is composed of P MEUs and each MEU includes one district 4 and then the parent metablock will There are μ segments. The 兀 block represents a group of memory locations at the system level, such as a segment that can be erased together. The physical address space of the flash memory is treated as a set of metablocks, one dollar The block is the minimum erasing unit. Within this specification, the term metablock is synonymous with the block and is used to define the minimum erasing unit at the level of the media management for media management 124919.doc 200837562, and the term "Minimum erase unit MEU is used to indicate flash flash The minimum erase unit of the memory. $ Connect multiple minimum erase units (MEU) to form the - metablock to maximize the stylized speed and erase speed. Multiple information pages in multiple MEUs are configured to be side-by-side programmed, and multiple MEUs are configured to be erased side by side. Γ \ In flash memory, one page can be used in a single operation. A group of a memory cells. A page may include multiple segments. Similarly, an array of memory cells may be segmented into more than one plane, where each plane can be erased or erased in a plane. There is only one MEU. Finally, the plane can be distributed among one or more memory chips. In the flash memory, the MEU can include one or more pages. A MEU organization within a flash memory can be recorded. In the plane, since one MEU from each plane can be programmed at the same time, it is advantageous to form a plurality of MEU metablocks by selecting one MEU from each plane (see Figure 5B below). 5 A shows the meta-area formed by the minimum erasing unit connecting different planes Each metablock (eg, ΜΒ0, MB1, ...) is composed of MEUs of different planes from the memory system, in which different planes can be distributed among one or more wafers. The metablock chain shown in Figure 2. The way manager 170 manages the links of the MEUs for each metablock. Each metablock is configured during the initial formatter and maintains its constituent MEU throughout the life of the system, unless one of the MEUs is present Figure 5B illustrates a specific embodiment in which a minimum erase unit (MEU) is selected from each plane for concatenation into a unitary block. 124919.doc -19- 200837562 Figure 5C illustrates where each will Another embodiment in which more than one meu is selected in the plane for joining into a unitary block. In another embodiment, more than one MEU can be selected from each plane to form a super MEU. For example, two MEUs can be used to form a super meu. In this case, more than one pass may be required for a read or write operation. The linking and reconnection of the MEU into a metablock is also disclosed in the co-pending and co-owned U.S. patent application entitled "Adapted by Deterministic Grouping of Blocks int" Multi_m〇ck (7), by Gonzales et al. The person applying on the same day as the present application. The entire disclosure of the application pending is hereby incorporated by reference herein. And the unintentional block diagram in the flash memory. The metablock management system includes various functional modules implemented in the control M 100 and various control materials (including catalog materials)

保持於以階層方式分佈於快閃記憶體200及控制器RAM 130内的表格及清單中。實施於控制器1〇〇内之功能模組包 括介面模組110、邏輯至實體位址轉換模組14〇、更新區塊 管理器模組150、抹除區塊管理器模組16〇及元區塊鏈路管 理器170。 ;ι面110使元區塊管理系統與一主機系統介接。邏輯至 實體位址轉化模組14〇將自主機的邏輯位址映射為一實體 記憶體位置。更新區塊管理器模組15〇管理記憶體中對給 定邏輯資料群組的資料更新操作。抹除區塊管理模組16〇 會官理該等元區塊的抹除操作,並且管理其配置以儲存新 124919.doc -20- 200837562 資訊。元區塊連結營哭 &理态170官理區段之最小可抹除區塊 的:群組之連結以構成一給定元區塊。該等模組將在其個 別章節t加以詳細說明。 i 在操作期間,元區塊管理系統產生控制資料(例如位 址、控制與狀態資訊)並採用該等資料進行操作。因為大 部分控制資料趨向於頻繁地改變小尺寸的資料,所以其無 法輕易地加以儲存且有效率地維持在具有大區塊結構之快 Η :己體中。使用階層式且分佈式方案將較具靜態性的控 制資料儲存於非揮發性快閃記憶體中,同時將較少數量的 較具變動性的控制資料定位在控制器RAM中以進行更有效 率的更新及存取。在電源關閉或出現故障情況下,則該方 案2揮發性控制器RAM中的控制資料可藉由掃描非揮發性 記憶體中的一小控制資料集而加以迅速地重建。此具可能 性,因為本發明限制與資料之一給定邏輯群組之可能活動 相關聯的區塊之數目。以此方式’可限制掃描。另外,將 需要持續的某些控制資料儲存在可逐個區段進行更新之非 揮發性元區塊中,每次更新均產生所記錄的一新區段,其 替代一先前區段。可針對控制資料使用區段索引方案以追 蹤一元區塊中逐個區段之更新。 非揮發性快閃記憶體200儲存具相對靜態性的大批控制 資料。此包括群組位址表(GAT)210、雜亂區塊索引 (CBI)220、抹除區塊清單(EBL)230 及 MAP 240。GAT 210 追蹤區塊之邏輯群與其對應元區塊間的映射。除經歷更新 的映射以外,映射不會發生變化。CBI 220追蹤更新期間 124919.doc -21- 200837562 邏輯非循序區段之映射。EBL 230追蹤已得到抹除的元區 塊之集區。MAP 240為一位元映像,其顯示快閃記憶體中 的所有元區塊之抹除狀態。 揮發性控制器RAM 130儲存頻繁地發生變化並得以存取 的控制資料之一小部分。此包括配置區塊清單(ABL)134及 清除區塊清單(CBL)i36。ABL 134追蹤用於記錄更新資料 的兀區塊之配置,而CBL 136追蹤已解除配置及抹除之元 區塊。在較佳具體實施例中,RAM 130作為用於儲存在快 閃冗憶體200中的控制資料之一快取記憶體。 更新區塊管理器 更新區塊管理器15〇(如圖2所示)會程序邏輯群組的更新 操作。依據本發明之一方面,為經歷更新的區段之每個邏 輯群組配置一專用更新元區塊以記錄更新資料。在較佳具 體實施例中,將邏輯群組之一或多個區段之任何片段記錄 在更新區塊中。可以管理一更新區塊以按循序順序或非循 序(亦瞭解為雜亂)順序來接收更新的資料。一雜亂更新區 塊使區段資料可在一邏輯群組内以任何順序並在個別區段 之任何重複的情況下加以更新。特定而言,一循序更新區 塊可以變成一雜亂更新區塊,而無需再定位任何資料區 段。不需要用於雜亂資料更新的區塊之預定配置;自動地 適應任何邏輯位址處的非循序寫入。因此,與先前技術系 統不同’不特別處理邏輯群組之各更新片段是否按邏輯序 列或非循序順序。將一般的更新區塊簡單地用於按主機請 求各片段的順序來記錄各種片段。例如,即使主機系統資 124919.doc -22 - 200837562 料或系統控制育料趨向於以雜亂方式進行更新,仍不需要 、不同於具有主機使用者資料之區域的方式來處理對應於 主機系統資料的邏輯位址空間之區域。 較,按邏輯循序順序將區段之—完整邏輯群組的資料儲 存在單7L區塊中。以此方式,可預定義儲存的邏輯區段 之索引。當7L區塊以預定義順序儲存一給定邏輯群組之所 有區段時,將其稱為,,完整式"。至於一更新區塊,當其最 按邏輯循序順序充滿更新資料時,接著該更新區塊便將 爻成更新的疋整兀區塊’其可輕易地替代原始元區塊。 另一方面,若更新區塊以邏輯上不同於完整區塊之順序的 順序來充滿更新資料,則更新區塊為一非循序或雜亂更新 區:,並且必須進一步程序順序顛倒的片段,以便最終以 與完整區塊之順序相同的順序來儲存該邏輯群組之更新資 料於較佳情況下,其在單一元區塊中係按邏輯循序順 序。進-步的處理涉及將更新區塊中的更新區段與原始區 塊中的未改變區段合併成另一更新區塊。接著,合併的更 新區塊將接著按邏輯循序順序並可用於替代原始區塊。在 某一預疋條件下,合併程序係後於一個或多個壓縮程序。 塵縮程序將雜亂更新區塊之區段簡單地重新記錄於一替代 雜乳更新區塊中,同時消除已藉由同一邏輯區段之隨後更 新而招致廢棄的任何複製邏輯區段。 該更新方案使多個更新線可同時運行,直至達到預定義 的最大值。每個更新線為使用其專用更新元區塊而經歷更 新的一邏輯群組。 124919.doc -23- 200837562 循序資料更新 當首先更新屬於一邏輯群組的資料時, 一 -夏 兀1區埦^並^ 將其專用作邏輯群組之更新資料的更新區塊。者…… ,, A ^ 田攸主機接 收一命令時,配置更新區塊以寫入邏輯群組 、一或多個區 &之一片段,其中一現有元區塊已在儲存其所有的完整區 ί又。對於苐一主機寫入操作而言,將資料 i ^ 貝T+您弟一片段記錄 '1 於更新區塊上。因&每次主機寫人》具有連續邏輯位址的 一或多個區段之一片段,所以遵循第一更新始終具序列性 質。在隨後的主機寫入中,按從主機接收的順序將同一邏 輯群組内的更新片段記錄在更新區塊中。一區塊繼續得= 官理為一循序更新區塊,同時藉由相關聯邏輯群組内的主 機所更新的區段保持邏輯序列式。將此邏輯群組中更新的 所有區段寫入此循序更新區塊,直至關閉該區塊或將其轉 換成雜亂更新區塊。 圖7A說明進行兩次分離的主機寫入操作而已循序順序被 寫入一循序更新區塊中的一邏輯群組之中的複數個區段的 範例,該邏輯群組之原始區塊中的該等對應區段則會變為 廢棄。於主機寫入操作#;[中,在更新邏輯區段LS5至LS8 中的資料。將更新的資料(如LS5’至LS8,)記錄在新近配置 的專用更新區塊中。 為方便起見,將欲在邏輯群組中加以更新的第一區段記 錄在始於第一實體區段位置的專用更新區塊中。一般而 言’欲加以更新的第一邏輯區段不必為群組之邏輯第一區 段’因此在邏輯群組之起點與更新區塊之起點之間可能存 124919.doc -24- 200837562 在偏移。此偏移稱為頁面標籤,如前面配合圖3 A所述。按 邏輯循序順序更新隨後的區段。當寫入邏輯群組的最後區 段時’群組位址會纏繞,並且寫入序列繼續群組之第一區 段。 於主機寫入操作#2中,在更新邏輯區段LS9至LS12中的 資料之片段。將更新的資料(如LS9,至LSI 2,)記錄在直接隨 最後寫入結束之位置中的專用更新區塊中。可以看出,兩 次主機寫入的情況係已按邏輯循序順序(即LS5,-LS 12,)將 、 更新資料記錄於更新區塊中。將更新區塊視為一循序更新 區塊’因為其已按邏輯循序順序加以填充。記錄在更新區 塊中的更新資料廢棄原始區塊中的對應資料。 雜亂資料更新 當藉由相關聯邏輯群組内的主機所更新的任何區段具邏 輯非循序性時,可對現有循序更新區塊啟動雜亂更新區塊 管理。一雜亂更新區塊為資料更新區塊之一形式,其中可 按任何順序且在任何數量的重複情況下更新一相關聯邏輯 V 群組内的邏輯區段。當藉由一主機寫入的一區段對更新的 邏輯群組内之先前寫入區段而言具邏輯非循序性時,其藉 由自一循序更新區塊的轉換加以建立。將此邏輯群組中隨 後更新的所有區#又寫入雜亂更新區塊中的下一可用區段位 置中,而不管群組内其邏輯區段位址。 圖7B說明進订五次分離的主機寫入操作而以雜亂序被寫 入一雜亂更新區塊中的一邏輯群組之中的複數個區段的範 例,同時該邏輯群組之原始區塊中已被替代的區段以及該 124919.doc -25- 200837562 雜亂更新區塊中已經複製的區段則會變為廢棄。於主機寫 入操作# 1中,更新儲存在一原始元區塊中的一給定邏輯群 、、且之逯輯區^又LS10至LSI 1。將更新的邏輯區段lS1〇,至 LS 11儲存在新近配置的更新區塊中。此時,t新區塊為 一循序更新區塊。於主機寫入操作#2中,將邏輯區段ls5_ LS6更新為LS5’-LS6,並將其記錄於更新區塊中就隨最後寫 入的位址中。此舉將更新區塊從循序更新區塊轉換成雜亂 更新區塊。於主機寫入操作#3中,再次更新邏輯區段LSI0 並將其記錄於更新區塊之下一位置中作為Lsi〇,,。此時, 更新區塊中的LSI〇’’替代先前記錄中的Lsl〇,,其依次替代 原始區塊中的LS 10。於主機寫入操作#4中,再次更新邏輯 區段L S1 0中的資料並將其記錄於更新區塊之下一位置中作 為LS10 。因此,LSI 0’"現在為最新資料且為邏輯區段 LS 10的唯一有效資料。於主機寫入操作中,更新邏輯區 段LS30中的資料並將其記錄在更新區塊中作為,。因 此,該範例說明可按任何順序且在任何重複情況下將一邏 輯群組内的區段寫入一雜亂更新區塊中。 強制循序更新 圖8說明進行兩次具有不連續邏輯位址的分離主機寫入 操作而以循序順序被寫人一循序更新區塊中的—邏輯群組 之中的複數個區段的範例。於主機寫入#1中,邏輯區段 LS5-LS8中的更新資料會以LS5,_LS8,被記錄於一專屬的更 新區塊之中。於主機寫入#2中,邏輯區段lsi4_lsi6中的 更新貧料會以LSI4,-LS 16,被記錄於最後寫入後面的更新區 124919.doc -26- 200837562 现之干。然而,在LS8及1^14之間有位址跳越 塊之中。然而 及主機寫The graphs and lists are distributed in a hierarchical manner in the flash memory 200 and the controller RAM 130. The functional modules implemented in the controller 1 include an interface module 110, a logical-to-physical address translation module 14A, an update block manager module 150, an erase block manager module 16 and a Block link manager 170. The ι面110 enables the metablock management system to interface with a host system. The logical-to-physical address translation module 14 maps the logical address from the host to a physical memory location. The update block manager module 15 manages the data update operation for a given logical data group in the memory. The erase block management module 16 官 administers the erase operations of the metablocks and manages their configuration to store the new 124919.doc -20- 200837562 information. The metablock block joins the crying & the minimum erasable block of the 170th administrative section: the group is connected to form a given metablock. These modules will be described in detail in their respective sections. i During operation, the metablock management system generates and uses control data (such as address, control, and status information). Since most of the control data tends to change small-sized data frequently, it cannot be easily stored and efficiently maintained in a fast-paced structure: itself. Use a hierarchical and distributed approach to store more static control data in non-volatile flash memory while positioning a smaller number of more variable control data in the controller RAM for more efficient Update and access. In the event of a power failure or failure, the control data in the volatile controller RAM of the scheme 2 can be quickly reconstructed by scanning a small set of control data in the non-volatile memory. This is possible because the present invention limits the number of blocks associated with a possible activity of a given logical group of one of the materials. In this way, scanning can be limited. In addition, some of the control data that needs to be persisted is stored in a non-volatile metablock that can be updated on a sector-by-segment basis, with each update generating a new segment that is recorded, which replaces a previous segment. A segment indexing scheme can be used for control data to track updates on a sector-by-segment basis in a metablock. The non-volatile flash memory 200 stores a large amount of control data with relative statics. This includes a group address table (GAT) 210, a hash block index (CBI) 220, an erase block list (EBL) 230, and a MAP 240. GAT 210 tracks the mapping between logical groups of blocks and their corresponding metablocks. The mapping does not change except for the updated map. CBI 220 Tracking Update Period 124919.doc -21- 200837562 Mapping of logical non-sequential sections. The EBL 230 tracks the pool of metablocks that have been erased. MAP 240 is a one-bit image that shows the erased state of all metablocks in the flash memory. Volatile controller RAM 130 stores a small portion of the control data that changes frequently and is accessed. This includes a configuration block list (ABL) 134 and a clear block list (CBL) i36. ABL 134 tracks the configuration of the block used to record the updated data, while CBL 136 tracks the metablocks that have been deconfigured and erased. In the preferred embodiment, RAM 130 acts as one of the cache memories for the control data stored in flash memory. Update Block Manager The Update Block Manager 15 (shown in Figure 2) updates the program logic group. In accordance with one aspect of the invention, a dedicated update metablock is configured for each logical group of segments undergoing updating to record updated material. In a preferred embodiment, any segment of one or more of the logical groups is recorded in the update block. An update block can be managed to receive updated data in sequential or non-sequential (also known as cluttered) order. A cluttered update block enables the segment data to be updated in any order within a logical group and in any repetition of individual segments. In particular, a sequential update block can become a cluttered update block without the need to locate any data segments. The predetermined configuration of the blocks for messy data updates is not required; it automatically adapts to non-sequential writes at any logical address. Therefore, unlike prior art systems, it is not specifically handled whether the updated segments of the logical group are in a logical or non-sequential order. The general update block is simply used to record various segments in the order in which the pieces are requested by the host. For example, even if the host system 124919.doc -22 - 200837562 material or system control feed tends to be updated in a messy manner, it is not necessary to process the area corresponding to the host system data differently than the area with the host user data. The area of the logical address space. In contrast, the data of the complete logical group of the segment is stored in a single 7L block in a logical sequential order. In this way, the index of the stored logical section can be predefined. When a 7L block stores all segments of a given logical group in a predefined order, it is called, complete ". As for an update block, when it is filled with the updated data in the most logical order, then the update block will be replaced by an updated block, which can easily replace the original block. On the other hand, if the update block is filled with update data in an order that is logically different from the order of the complete block, the update block is a non-sequential or messy update area: and the program sequence must be further reversed in order to ultimately Preferably, the update data of the logical group is stored in the same order as the complete block, which is preferably in a logical sequential order in the single metablock. The further processing involves merging the update section in the update block with the unchanged block in the original block into another update block. The merged update block will then be in logical sequential order and can be used to replace the original block. Under certain pre-conditions, the merged program is followed by one or more compression programs. The dust reduction process simply re-records the segments of the messy update block in an alternate milk update block while eliminating any duplicate logical segments that have been discarded by subsequent updates of the same logical segment. This update allows multiple update lines to run simultaneously until a predefined maximum is reached. Each update line is a logical group that undergoes an update using its dedicated update metablock. 124919.doc -23- 200837562 Sequential Data Update When the data belonging to a logical group is first updated, the one-summer area is 并^ and ^ is used as the update block of the update data of the logical group. ......,, A ^ When the field host receives a command, it configures the update block to write a logical group, one or more areas & one of the pieces, where an existing meta block is already storing all its complete District ί again. For a host write operation, the data i ^ B T + your brother a segment record '1 on the update block. Because & each host writes a segment of one or more segments with consecutive logical addresses, following the first update is always sequential. In subsequent host writes, updated segments within the same logical group are recorded in the update block in the order received from the host. A block continues to be = a progressive update block, while the logical sequence is maintained by the segments updated by the hosts in the associated logical group. All segments updated in this logical group are written to this sequential update block until the block is closed or converted to a cluttered update block. 7A illustrates an example of a plurality of segments in a logical group in a sequential update block that have been subjected to two separate host write operations in a sequential order, the original block in the logical group. The corresponding section will become obsolete. In the host write operation #; [in, update the data in the logical segment LS5 to LS8. The updated data (such as LS5' to LS8) is recorded in the newly configured dedicated update block. For convenience, the first segment to be updated in the logical group is recorded in a dedicated update block starting at the location of the first physical segment. In general, the first logical segment to be updated does not have to be the logical first segment of the group, so there may be 124919.doc -24-200837562 between the beginning of the logical group and the starting point of the updated block. shift. This offset is referred to as the page label as previously described in conjunction with Figure 3A. The subsequent sections are updated in logical sequential order. When the last segment of the logical group is written, the group address is wrapped and the write sequence continues with the first segment of the group. In host write operation #2, a segment of the data in the logical sections LS9 to LS12 is updated. The updated data (such as LS9, to LSI 2) is recorded in a dedicated update block directly at the end of the last write. It can be seen that the situation of two host writes has been recorded in the update block in the logical sequential order (ie LS5, -LS 12,). The update block is treated as a sequential update block 'because it has been populated in a logical sequential order. The update data recorded in the update block discards the corresponding data in the original block. Cluttered Data Updates When any segment updated by a host within an associated logical group has logical non-sequentiality, it is possible to initiate messy update block management for an existing sequential update block. A clutter update block is in the form of one of the data update blocks, wherein the logical segments within an associated logical V group can be updated in any order and in any number of iterations. When a segment written by a host is logically non-sequential to a previously written segment within the updated logical group, it is established by a conversion from a sequential update block. All of the regions # that are subsequently updated in this logical group are again written to the next available segment location in the hash update block, regardless of its logical sector address within the group. 7B illustrates an example of a plurality of sectors among a logical group in a hashed update block that are subscribed to five separate host write operations in a hashed order, while the original block of the logical group The section that has been replaced and the section that has been copied in the 124919.doc -25-200837562 messy update block becomes obsolete. In the host write operation #1, a given logical group stored in an original metablock is updated, and the LUNs are further LS10 to LSI1. The updated logical section lS1〇 is stored in the newly configured update block to the LS 11. At this time, the t new block is a sequential update block. In host write operation #2, the logical section ls5_LS6 is updated to LS5'-LS6 and recorded in the update block with the last written address. This converts the update block from a sequential update block to a messy update block. In the host write operation #3, the logical sector LSI0 is updated again and recorded in a position below the update block as Lsi,. At this time, the LSI 〇 '' in the update block replaces the Lsl 先前 in the previous record, which in turn replaces the LS 10 in the original block. In the host write operation #4, the data in the logical section L S1 0 is updated again and recorded in a position below the update block as LS10. Therefore, LSI 0'" is now the latest material and is the only valid material for logical segment LS 10. In the host write operation, the data in the logical section LS30 is updated and recorded in the update block as . Thus, the example illustrates that segments within a logical group can be written into a cluttered update block in any order and in any repetition. Forced sequential update Figure 8 illustrates an example of performing a separate host write operation with discontinuous logical addresses and sequentially writing the plurality of logical segments in the logical group in a sequential order. In host write #1, the update data in logical segment LS5-LS8 is recorded in a dedicated update block with LS5, _LS8. In host write #2, the update lean in the logical section lsi4_lsi6 is recorded as LSI4, -LS 16, which is recorded in the last update area 124919.doc -26-200837562. However, there is an address jump between LS8 and 1^14. However and the host writes

施填補操作(#2A)。依此方式, .裂至該更新區塊之中以實 便可保留該更新區塊的循 序特性。 圖9為說明根據本發明一通用具體實施例,由該更新區 塊管理器更新一邏輯資料群的程序之流程圖。該更新程序 包括下面步驟: 步驟260 :該記憶體會被組織成複數個區塊,每個區塊 均會被分割成可一起抹除的複數個記憶體單位,每個記憶 體單位係用於儲存一邏輯資料單位。 步驟262 ··該資料會被組織成複數個邏輯群組,每個邏 輯群組均會被分割成複數個邏輯單位。 步驟264 ·於邊標準的情況中,會根據第一種規定的順 序’較佳的係邏輯循序順序,將一邏輯群組的所有邏輯單 位儲存於一原始區塊的該等記憶體單位之中。依此方式, 便可知道用於存取該區塊中該等個別邏輯單位的索引。 步戮270:針對給定邏輯資料群組(例如lgx)而言,可請 求更新LGX内的一邏輯單位。(邏輯單位更新係給定為一種 範例。一般來說’該更新將會是LGx内由一或多個連續邏 輯單位之片段。) 步驟272 :被要求的更新邏輯單位將會被儲存於一第二 區塊中’該區塊係專門用來記錄LGx的該等更新。該記錄 124919.doc -27- 200837562 順序係依據第— 本發明的其二順序,一般來說係要求該等更新的順序。 通用於以邏2 Γ項特點係可於初始時將一更新區塊設定成 取決於該=j楯序或雜亂順序的方式來記錄資料。所以, 塊。/弟〜順序,該第二區塊可能係循序區塊或雜亂區 步驟274 ··繁-「 σ 一區塊繼績隨程序返回步驟270記錄請求之 建铒單位。去φ 田出現預定的關閉條件時,便會關閉該第二區 塊以接收進— f 2夕更新。於此情況中,該程序便會進入步驟 步驟276 :決〜# a 、疋〜已關閉之第二區塊是否以和原始區塊 相同的順庠| ^ ^ # 11錄其更新邏輯單位。當該等兩個區塊記錄 邏輯早位僅沬 i 相差一頁面標籤時,該等兩個區塊便會被視為 具有相同的川g皮, ' 一 、序,如配θ圖3 A所示。假使該等兩個區塊具 同員序的忐,該程序便會進入步驟280,否則便必須 於步驟290中實施某種廢棄項目收集。 、 步驟280 ·因為第二區塊具有相似於第一區塊的順序, 、σ用來曰代5亥原始第一區塊。接著該更新程序便會結 束於步驟299處。 步驟290 :從該第二區塊(更新區塊)與該第一區塊(原始 區塊)之中收集該給定邏輯群組之每個邏輯單位的最新版 本接著,便將該給定邏輯群組之該等已合併的邏輯單位 以相似於第一區塊的順序寫入至一第三區塊中。 步驟292··因為第三區塊(已合併區塊)具有相似於第一 區塊的順序’戶斤以可用來替代該原始第一區塊。接著該更 124919.doc -28- 200837562 新程序便會結束於步驟299處。 步驟299 :當結案(ci〇seout)程序建立一完整的更新區塊 時’其便會成為該給定邏輯群組新的標準區塊。接著便會 結束該邏輯群組的更新執行緒。 囷10為說明根據本發明一較佳具體實施例,由該更新區 塊管理器更新一邏輯資料群組的程序之流程圖。該更新程 序包括下面步驟: 步驟310:針對一給定的邏輯資料群(例而言,可 要求更新LGX内的一邏輯區段。(區段更新係給定為一種範 例。一般來說,该更新將會是LGX内由多個連續邏輯區段 之片段。) 步驟312 :假使尚未存在一專屬KLGx的更新區塊,則 進入步驟410用以開始針對該邏輯群組來啟動一新的更新 執行緒。此可藉由配置一專門用來記錄該邏輯群組之更新 資料的更新區塊來完成。假使已經有一更新區塊開放,則 進入步驟314用以將該更新區段記錄於該更新區塊之中。 步驟314 :假使目前的更新區塊已經係雜亂(即,非循 序),則逕行進入步驟510,用以將所要求的更新區段記錄 於該雜亂更新區塊之中。假使目前的更新區塊為循序,則 進入步驟316,用以處理一循序更新區塊。 步驟316 :本發明的其中一項特點係允許於初始時將一 更新區塊設定成通用於以邏輯循序或雜亂順序的方式來記 錄資料。不過,因為該邏輯群組最終會將其資料以邏輯循 序的順序儲存於一元區塊之中,所以,希望儘可能保持該 124919.doc -29- 200837562 更新區塊循序。接著,當關閉一更新區塊以進行進一步更 新時’將會需要較少的程序,因為並不需要進行廢棄項目 收集。 因此’便可決定所要求的更新是否將遵照該更新區塊目 則的循序順序。假使該更新循序遵照,則會進入步驟510 以實施循序更新’而且該更新區塊仍將保持循序。另一方 面,假使該更新未循序遵照(雜亂更新),則假使未採取其 fApply the fill operation (#2A). In this way, the crack is merged into the update block to preserve the sequence characteristics of the update block. Figure 9 is a flow diagram illustrating the process of updating a logical data group by the update block manager in accordance with a general embodiment of the present invention. The update program includes the following steps: Step 260: The memory is organized into a plurality of blocks, each of which is divided into a plurality of memory units that can be erased together, and each memory unit is used for storage. A logical data unit. Step 262 · The data is organized into a plurality of logical groups, each of which is divided into a plurality of logical units. Step 264. In the case of the edge standard, all logical units of a logical group are stored in the memory units of a primitive block according to the first specified order 'better logical order. . In this way, the index used to access the individual logical units in the block can be known. Step 270: For a given logical data group (e.g., lgx), a request can be made to update a logical unit within the LGX. (Logical unit updates are given as an example. In general, 'this update will be a fragment of one or more consecutive logical units within LGx.) Step 272: The requested update logic unit will be stored in a In the second block, the block is dedicated to recording the updates of LGx. The record 124919.doc -27- 200837562 is based on the second order of the invention, and generally the order of the updates is required. It is commonly used to record data in a manner that initially sets an update block to depend on the =j order or clutter order. So, block. / brother ~ order, the second block may be a sequential block or messy area step 274 · · complex - " σ a block successor with the program returns to step 270 to record the request of the building unit. Go to φ field appears scheduled to close When the condition is met, the second block is closed to receive the update. In this case, the program proceeds to step 276: 〜~# a, 疋~The second block that has been closed is The same block as the original block | ^ ^ # 11 records its update logical unit. When the two block record logics are only 沬i differing by one page label, the two blocks are considered Having the same chuan g skin, 'one, order, as shown in Figure 3A. If the two blocks have the same order, the program will proceed to step 280, otherwise it must be in step 290. Implementing some sort of obsolete item collection. Step 280: Because the second block has an order similar to the first block, σ is used to replace the original first block of 5 hai. Then the update process ends at step 299. Step 290: From the second block (update block) and the first block (original Collecting the latest version of each logical unit of the given logical group, then writing the merged logical units of the given logical group in an order similar to the first block to In a third block, step 292·· because the third block (merged block) has a sequence similar to the first block, which can be used to replace the original first block. Then the more is 124919. Doc -28- 200837562 The new program will end at step 299. Step 299: When the ci〇seout program creates a complete update block, it will become the new standard block for the given logical group. The update thread of the logical group will then end. 囷10 is a flowchart illustrating a procedure for updating a logical data group by the update block manager in accordance with a preferred embodiment of the present invention. The method includes the following steps: Step 310: For a given logical data group (for example, a logical segment within the LGX may be required to be updated. (The sector update is given as an example. Generally, the update will be Is a continuous logic in LGX Fragment of the segment.) Step 312: If there is no update block of a dedicated KLGx, proceed to step 410 to start a new update thread for the logical group. This can be configured by a dedicated record. The update block of the update data of the logical group is completed. If an update block has been opened, proceed to step 314 to record the update segment in the update block. Step 314: Suppose the current update area If the block is already cluttered (ie, non-sequential), then the process proceeds to step 510 to record the requested update segment in the hash update block. If the current update block is sequential, proceed to step 316. Used to process a sequential update block. Step 316: One of the features of the present invention is to allow an update block to be initially set to be commonly used to record data in a logical sequential or cluttered manner. However, because the logical group will eventually store its data in a logically sequential order in the unary block, it is desirable to keep the 124919.doc -29-200837562 update block as possible. Then, when an update block is closed for further updates, fewer programs will be required because no obsolete item collection is required. Therefore, it is possible to determine whether the requested update will follow the sequential order of the updated block. If the update is followed sequentially, then step 510 is taken to implement a sequential update' and the update block will remain in order. On the other hand, if the update is not followed (scurry update), then if it is not taken f

匕動作H其便會將該循序更新區塊轉換成—雜亂更新 區塊。 、於其中-具體實施例中’不會採取任何動作來挽救此情 、 /耘序會直接進入步称370,於該處允許進行更新 將該更新區塊轉換成雜亂更新區塊。 可選強制循序程序 、、具體貝施例中,會儘可能依照即將進行之雜亂更 =來視情況實施-強制循序程序步称32g,以便保留該循 =新區塊。會有兩種情況,兩者均需要從原始區塊中複 ^失的區段’以維持被記錄於該更新區塊中之邏輯區段 的循序順序。第一種愔7孫訪语虹么* ^ θ况係該更新會建立一短距位址跳 羅。弟二種情況則係提 ^ 托早、、、°案一更新區塊以保持其循序狀 ,㈣強制循序程序步驟320包括下面的子步驟: ㈣330:假使該更新建立一未大於預定量Cb的邏輯位 址跳躍的話,該程序债合 r , ㈣會進入步驟350中的強制循序更新 私序,否㈣料便會^步称34()考 序結案的資格。 古”有強制循 124919.doc -30 - 200837562 步驟340 :假使未被填充之實體區段的數量超過預定的 設計參數Cc(其典型值通常為該更新區塊之尺寸的一半), 則該更新區塊便很少被用到而且將不會被提早關閉。該程 序便進入步驟370而且該更新區塊將會變成雜亂的。另一 方面,假使該更新區塊相當大的部分被填充,則其便被視 為已經被充份運用,所以可進入步驟360以便強制循序結 案。 步驟350 :強制循序更新可讓目前的循序更新區塊保持 ' 循序,只要該位址跳躍不超過預定量CB即可。基本上,會 複製该更新區塊的關聯原始區塊中的區段來填補該位址跳 躍所橫跨的間隙。因此,於進入步驟510以前將會利用該 等中間位址中的資料來填補該循序更新區塊,以便循序地 記錄該目前的更新。 步驟360 :假使目前的循序更新區塊已經大部分被填充 的話,強制循序結案便會結案目前的循序更新區塊,而不 # ^讓即將進行雜亂更新將其轉換成一雜亂更新區塊。雜亂 " 或非循序更新的定義是具有以下項目的更新:不為上述位 址跳越例外所涵蓋的正向位址轉變、反向位址轉變、或位 址重複。為避免一循序更新區塊被一雜亂更新轉換,可藉 由複製該更新區塊的關聯原始部分廢棄區塊中的區段來填 充忒更新區塊中未被寫入的區段位置。接著,該原始區塊 便王廢棄並且可被抹除。現在,目前的更新區塊便會具 有滿載的邏輯區段集,接著便可被結案為一完整的元區 鬼用以替代该原始元區塊。接著該程序便會進入步驟 124919.doc -31 - 200837562 430,於正確的位置中配置一新的更新區塊,用以接受步 驟310中率先要求之即將進行的區段更新的記錄。 轉換成雜亂更新區塊 步驟370 :當該即將進行的更新係並非係循序順序且視 情況並未滿足該等強制循序條件的話,當該程序進入步称 510時,便可藉由將該即將進行的更新區段(其具有非循序 的位址)記錄於該更新區塊之中,用以將該循序更新區塊 轉換成一雜亂更新區塊。假使存在最大數量的雜亂更新區 塊,則必須於允許進行轉換以前先關閉最近最少被存取的 雜亂更新區塊,以防止超過最大數量的雜亂更新區塊。識 別最近最少被存取之雜亂更新區塊的方式和步驟42〇中所 述的一般情況相同,只不過僅限於雜亂更新區塊。此時可 藉由步驟550所述的合併操作來達成關閉一雜亂更新區塊 的目的。 於系統條件限制下配置新的更新區塊 步驟410 :將一抹除元區塊配置成一更新區塊的程序始 於决疋疋否超過-預定的系統限制。於由有限資源的關 係’記憶體管理系統通常允許同時存在就的最大更新區 塊數目UMAX。此限制為循序更新區塊與雜亂更新區塊的總 和’而且係-項設計參數。於—較佳的具體實施例中,舉 例來說,t玄限制為最大8個更新區塊。另外,由於系統資 ,需求較高的關係’可同時開放的雜亂更新區塊的最大數 量同樣會有對應的預定限制(例如4個)。 口此’ s已經配置UMAX個更新區塊日寺,那麼僅有於關閉 124919.doc -32- 200837562 該等現有已經配置之更新區塊之一以後才可能滿足下次配 置的要求。程序繼續至步驟420。當開放更新區塊的數量 小於CA時,該程序便會逕行進入步稀430。 步驟420 :假使超過預定的最大更新區塊數量cA,則會 關閉最近最少被存取的更新區塊,並且實施廢棄項目收 集。最近最少被存取的更新區塊係被判定為和最近最少被 存取之邏輯區塊相關的更新區塊。為達決定最近最少被存 取之區塊的目的’存取包含寫入及視需要讀取邏輯區段。 可依照存取順序來保存一份開放更新區塊的清單;初始化 時,假設沒有任何的存取順序。當該更新區塊係循序時, 一更新區塊的關閉便會遵循和步驟36〇與步驟53〇所述者雷 同的程序;當該更新區塊係雜亂時,則會遵循和步驟54〇 所述者雷同的程序。該關閉操作會產生空間以用於步驟 430中進行新更新區塊配置。 步驟430:配置一新的元區持你炎#The action H will convert the sequential update block into a messy update block. In the particular embodiment, no action is taken to save the situation, and the sequence will go directly to step 370 where the update is allowed to convert the updated block into a messy update block. The optional forced sequence program, in the specific example, will be implemented as much as possible according to the upcoming messy--forced sequence step step 32g, in order to retain the new block. There are two cases, both of which require a section that is lost from the original block to maintain the sequential order of the logical segments recorded in the updated block. The first type of 孙7孙访语虹么* ^ θ The system will establish a short-range address hop. In the case of the younger brother, the block is updated, and the block is updated to keep it in sequence. (4) The forced sequence procedure 320 includes the following sub-steps: (4) 330: If the update establishes a value that is not greater than the predetermined amount Cb If the logical address jumps, the program is bound to r, (4) will enter the mandatory sequential update private sequence in step 350, and if not (4), it will be called the 34 () test case completion. Ancient" has a mandatory cycle 124919.doc -30 - 200837562 Step 340: If the number of unfilled physical segments exceeds a predetermined design parameter Cc (typically typically half the size of the updated block), then the update The block is rarely used and will not be closed early. The program proceeds to step 370 and the update block will become cluttered. On the other hand, if a relatively large portion of the update block is filled, then It is considered to have been fully utilized, so step 360 can be entered to force the sequence to be closed. Step 350: Force sequential update to keep the current sequential update block 'sequential, as long as the address does not jump more than a predetermined amount CB Basically, the section in the associated original block of the update block is copied to fill the gap spanned by the address hop. Therefore, the data in the intermediate address will be utilized before proceeding to step 510. To fill the sequential update block, in order to record the current update sequentially. Step 360: If the current sequential update block has been mostly filled, the forced sequence will be closed. The current sequential update block, instead of #^ let the upcoming messy update convert it into a messy update block. The definition of "chaotic" or non-sequential update is an update with the following items: no exception for the above address jump Covered forward address transition, reverse address transition, or address repetition. To avoid a random update block being converted by a messy update, by copying the associated original portion of the updated block in the abandoned block The segment is filled with the location of the segment that is not written in the update block. Then, the original block is discarded and can be erased. Now, the current update block will have a set of logical segments that are fully loaded. Then it can be closed as a complete meta-ghost to replace the original meta-block. Then the program will proceed to steps 124919.doc -31 - 200837562 430 to configure a new update block in the correct location. A record to accept the upcoming segment update requested in step 310. Converting to a messy update block Step 370: When the upcoming update is not in a sequential order and is not satisfied as appropriate When the program is forced to enter the step 510, the upcoming update section (which has a non-sequential address) can be recorded in the update block for the sequence. The update block is converted into a cluttered update block. If there is a maximum number of cluttered update blocks, the least recently accessed messy update block must be closed before the conversion is allowed to prevent the maximum number of cluttered update blocks from being exceeded. The manner of identifying the least recently accessed messy update block is the same as the general case described in step 42, except that it is limited to a cluttered update block. At this point, the merge operation described in step 550 can be used to achieve the close. The purpose of a messy update block. Configuring a new update block under system condition constraints. Step 410: The process of configuring a wipe partition to an update block begins with a decision that exceeds a predetermined system limit. For the relationship between limited resources, the memory management system usually allows the maximum number of update blocks UMAX to exist at the same time. This limit is the sum of the sequential update block and the cluttered update block' and the system-item design parameters. In the preferred embodiment, for example, t Xu is limited to a maximum of 8 update blocks. In addition, due to the system resources, the relationship with higher demand, the maximum number of messy update blocks that can be simultaneously opened will also have corresponding predetermined limits (for example, four). This has been configured to UMAX update blocks, and it is only possible to meet the requirements of the next configuration after shutting down one of the existing configured update blocks 124919.doc -32- 200837562. The process continues to step 420. When the number of open update blocks is less than CA, the program will proceed to step 430. Step 420: If the predetermined maximum number of update blocks cA is exceeded, the least recently accessed update block is closed and the abandoned item collection is implemented. The least recently accessed update block is determined to be the update block associated with the least recently accessed logical block. The purpose of accessing the block that contains the least recently accessed block is to include the write and optionally read logical segments. A list of open update blocks can be saved in the order of access; at initialization, it is assumed that there is no access sequence. When the update block is sequential, the closing of an update block will follow the same procedure as that described in step 36 and step 53; when the update block is messy, it will follow and step 54 The same procedure as described above. This close operation creates space for the new update block configuration in step 430. Step 430: Configure a new meta zone to hold your inflammation#

吐塊作為该給定邏輯群組LGX 專屬的更新區塊便可滿足該配置要求。 ^ ^ 接者,該項程序會 進入步驟510。 將更新資料記錄於更新區塊中 步驟510 :所要求的更新區段合拙 曰破C錄於該更新區塊中 下個可用的實體位置中。接著,今#广a 序會進入步驟520, 決定該更新區塊是否可以結案。 更新區塊結案 空間可接受額外更新,則 步驟S22 ’結案該更新區 步驟520 :若該更新區塊仍有 會進入步驟570。否則便會進入 124919.doc 33 200837562 龙播:目讀要求的寫入試圖寫入的邏輯區段多於該區塊 =㈣的空間時,有兩種可能的實現方式來填充—更新區 ''種實現方式中,可將該寫入要求分成兩部分,其 :第邛刀會一直寫到該區塊的最後實體區段處為止。接 著便關閉該區塊’而該寫入的第二部分將會被視為下一個 、、寫 於$種實現方式中,可保留所要求的寫入, 而該區塊則會填補其剩餘的區段然後便關。該要求寫入 將會被視為下一個要求寫入。The spitting block can satisfy this configuration requirement as an update block specific to the given logical group LGX. ^ ^ Receiver, the program will proceed to step 510. The update data is recorded in the update block. Step 510: The requested update segment merges C records in the next available physical location in the update block. Next, the current #广 a sequence will proceed to step 520 to determine whether the update block can be closed. The update block settlement space can accept additional updates, and step S22' closes the update area. Step 520: If the update block still has to proceed to step 570. Otherwise, it will enter 124919.doc 33 200837562 Dragon broadcast: When the write request requires more writes than the block = (4) space, there are two possible implementations to fill the update area. In an implementation, the write request can be divided into two parts, where the first knives are written until the last physical segment of the block. The block is then closed' and the second portion of the write will be treated as the next one, written in the implementation, retaining the required write, and the block will fill the remaining The section is then closed. This request write will be treated as the next request write.

…步称522 :假使該更新區塊係循彳,則進入步称530以進 订循序關閉。假使該更新區塊係雜亂,則進人步称州以 進行雜亂關閉。 循序更新區塊結案 步驟530 ·因為該更新區塊係循序且完全填充的,所以 其中所儲存的邏輯群組係完整的。該元區塊係完整且會替 代原始元區塊。此時,該原始區塊係完全廢棄且可被抹 除。接著,該程序便會進入步驟570,結束該給定邏輯群 組的該更新執行緒。 雜亂更新區塊結案 步驟540 :因為該更新區塊係非循序填充,所以可能包 含多次更新部分的邏輯區段,因此要實施廢棄項目收集以 挽救其中的有效資料。該雜亂更新區塊將會進行壓縮或合 併。於步驟542中將會決定要實施哪項程序。 步驟542 ··實施壓縮或合併將取決於該更新區塊的老化 情形。假使一邏輯區段被更新數次的話,其邏輯位址便合 124919.doc -34- 200837562 高度地老化。於該更新區塊中將會記錄相同邏輯區段的多 重版本,但僅有最後被記錄的版本係該邏輯區段的有效版 本。於含有具多重版本之邏輯區段的更新區塊中,不同邏 輯區段的數量將會遠少於一邏輯群組的數量。 於該較佳的具體實施例中,當該更新區塊中不同邏輯區 段的數量超過預定設計參數CD(其典型值為一邏輯群組之 尺寸的一半)的活,該結案程序便會於步驟55〇中實施合 併,否則該程序便會於步驟56〇中實施壓縮。 r 步驟55〇:假使該雜亂更新區塊欲進行合併操作,則會 利用一含有該經合併資料之新的標準元區塊來替代該原始 區塊與該更新區塊。經過合併以後,該更新執行緒便將會 結束於步驟570中。 步驟560 :假使該雜亂更新區塊欲進行壓縮操作,則其 便會被一載有該經壓縮處理之資料之新的更新區塊替代。 、、二過C縮以後,该經壓縮處理的更新區塊的程序便將會結 束於步驟570中。或者,可延至該更新區塊再次被 £ ^ K進行壓縮操作,從而便可移除壓縮操作後面跟隨著合併操 作而沒有中間更新的可能性。當步驟5〇2中出現下一個要 求於LGX中進行更新時,那麼便可利用該新的更新區塊來 進一步更新该給定邏輯區塊。 步驟570 :當結案程序建立一完整的更新區塊時,其便 會成為該給定邏輯群組新的標準區塊。接著便會結束該邏 輯群組的更新執行緒。當結案程序建立一新更新區塊以替 代一現有的更新區塊時,便可使用該新的更新區塊來記錄 124919.doc •35- 200837562 針對该給定邏輯群組所要灰 、 文永的下次更新。當一更新區塊未 被結案時,當步称310中出j見 贝祝下一個要求於LGX中進行更新 時,那麼該項程序便將會繼續。 從上述的程序中可以蒼山 出’ ¥關閉一雜亂更新區塊時, f 其中所記錄的更新資料便會被進一步程序。明確地說,其 有效資料會經過廢棄項目收集程序,可能係進行壓縮程序 而被收集至另-雜亂區塊中,或是與其相關聯的原始區塊 進仃合併程序以形成—新的標準循序區塊。 、囷11A為况明關閉圖1〇所示之雜亂更新區塊的合併程序 的更存細流程圖。雜亂更新區塊合併係於結案該更新區塊 夺(例如§该更新區塊因其最後的實體區段位置被寫入而 王口P填滿時)所實施的兩種可能程序中其中一者。當被寫 區塊中的不同邏輯區段的數量超過預定的設計參數Cd 時便會選擇合併。圖10所示之合併程序步驟550包括下面 子步驟: 爾51 .在混IL更新區塊被關閉時,會配置可取而代 之的新元區塊。 步驟552 : &該雜亂更新區塊及其相關聯的原始區塊之 欠集母個邏輯區段的最新版本,忽略所有廢棄的區段。 '驟54 ·以邏輯循序的順序將該等已收集到的有效區 錄於"亥新元區塊之中,用以形成一完整的區塊,即, 成具有被循序記錄之一邏輯群組的所有該等邏輯區段 的區塊。 步称S56 : w亥新的完整的區塊來替代該原始區塊。 124919.doc -36- 200837562 步驟558 :抹除該已結案的更新區塊及該原始區塊。 圖11B為說明關閉囷1〇所示之雜亂更新區塊的壓縮程序 的更詳細流程圖。當被寫入該區塊中的不同邏輯區段的數 量低於預定設計參數CD時便會選擇壓縮。圖1〇所示之壓縮 程序步驟560包括下面子步驟: 步驟561 ·當欲壓縮一雜亂更新區塊時,便會配置一替 代它的新元區塊。 步驟562 :於該欲被壓縮的現有雜亂更新區塊中收集每 / 個邏輯區段的最新版本。 步驟564 :將該等已收集到的區段記錄於該新的更新區 塊之中,以形成一具有經壓縮區段的新的更新區塊。 步驟566 丨j肖該具有經壓縮區段的新㈤更新區塊來替 代該現有的更新區塊。 步驟568 :抹除該已被結案的更新區塊。 邏輯與元區塊狀態 圖12A說明一邏輯群組的所有可能狀態,以及於各種操 ί 作下該等狀態間可能的轉換情形。 囷12Β為-列出一邏輯群組之該等可能狀態的表格。該 等邏輯群組狀態的定義如下·· 1. 完整。:該邏輯群組中的所有邏輯區段依邏輯循序順序被 寫入單- 70區塊之中’其可能利用頁面標籤捲繞方式。 2. 未被寫人:該邏輯群組中沒有邏輯區段已經被寫入。該 邏輯群組會於一群位址表中標記著未被寫入並且沒有已配 置的元區塊。其會回應針對此群内每個區段的主機讀取而 124919.doc •37- 200837562 送回一預定義資料圖案。 3·循序更新:該邏輯群组 床址皆 f、内刀&段已經以邏輯循序的順 一元區塊之中’其可能會利用頁面標鐵,所以, J 、曰替代6亥群中任何前面的完整狀態之對應邏輯區 塊0 4·雜亂更新··該邏輯群 内σ卩刀Ε段已經以邏輯非循序的 力、被寫人-元區塊之中,其可能會利用頁面標藏,所Step 522: If the update block is looped, it proceeds to step 530 to order the sequence to close. If the update block is messy, then the state is called the state to make a messy shutdown. Step-by-Step Update Block Closure Step 530 • Since the update block is sequential and fully populated, the logical group stored therein is complete. The metablock is complete and replaces the original metablock. At this point, the original block is completely discarded and can be erased. The program then proceeds to step 570 to end the update thread for the given logical group. The messy update block is closed. Step 540: Because the update block is non-sequentially populated, it may contain a logical section of the update portion multiple times, so the waste project collection is implemented to save the valid data. The messy update block will be compressed or merged. In step 542, it will be decided which program to implement. Step 542 · Implementing compression or merging will depend on the aging situation of the updated block. If a logical section is updated several times, its logical address will be highly aging 124919.doc -34- 200837562. Multiple versions of the same logical segment will be recorded in the update block, but only the last recorded version is a valid version of the logical segment. In an update block containing logical sections with multiple versions, the number of different logical segments will be much less than the number of logical groups. In the preferred embodiment, when the number of different logical segments in the update block exceeds a predetermined design parameter CD (which is typically half the size of a logical group), the settlement procedure will occur. The merge is implemented in step 55, otherwise the program will perform compression in step 56. r Step 55: If the messy update block is to be merged, a new standard metablock containing the merged data is used to replace the original block with the updated block. After the merge, the update thread will end in step 570. Step 560: If the messy update block is to be compressed, it will be replaced by a new update block carrying the compressed data. After the second C is shortened, the compressed update block program will be terminated in step 570. Alternatively, it may be postponed until the update block is again compressed by £^K, thereby removing the possibility that the compression operation is followed by a merge operation without an intermediate update. When the next request in step 5〇2 is to be updated in the LGX, then the new update block can be utilized to further update the given logical block. Step 570: When the settlement program establishes a complete update block, it becomes the new standard block for the given logical group. The update thread for this logical group will then end. When the settlement program creates a new update block to replace an existing update block, the new update block can be used to record 124919.doc •35- 200837562 for the given logical group, gray, Wenyong Next update. When an update block has not been closed, the program will continue when the step 310 shows that the next request is to be updated in the LGX. From the above procedure, Cangshan can be released. ¥ When closing a messy update block, the updated information recorded in f will be further processed. Specifically, the valid data will be collected through the obsolete project, may be collected into another messy block, or the original block associated with it will be merged to form a new standard sequence. Block.囷11A is a more detailed flow chart for closing the merge procedure of the messy update block shown in FIG. The messy update block merge is tied to one of the two possible programs implemented by the update block (eg, when the update block is written because its last physical segment location is written and the king P is filled) . The merging is selected when the number of different logical segments in the written block exceeds the predetermined design parameter Cd. The merge procedure step 550 shown in Figure 10 includes the following substeps: 51. When the hybrid IL update block is closed, a replaceable new metablock is configured. Step 552: & the latest version of the logical segment of the hashed update block and its associated original block, ignoring all discarded segments. 'Step 54 · Record the collected valid areas in the logical sequence in the "Hai Xinyuan block to form a complete block, that is, to form a logical group with a sequential record A block of all of these logical segments of the group. Step S56: whai new complete block to replace the original block. 124919.doc -36- 200837562 Step 558: Erasing the closed update block and the original block. Figure 11B is a more detailed flow chart illustrating the compression procedure for closing the cluttered update block shown in Figure 1. Compression is selected when the number of different logical segments written into the block is below the predetermined design parameter CD. The compression procedure step 560 shown in Figure 1A includes the following sub-steps: Step 561 - When a hashed update block is to be compressed, a new metablock is replaced. Step 562: Collect the latest version of each logical segment in the existing messy update block to be compressed. Step 564: Record the collected segments in the new update block to form a new update block having the compressed segments. Step 566: The new (five) update block with the compressed segment replaces the existing update block. Step 568: Erasing the updated block that has been closed. Logic and Metablock Status Figure 12A illustrates all possible states of a logical group and possible transitions between the states under various operations.囷12Β is - a table listing the possible states of a logical group. The definitions of these logical group states are as follows: 1. Complete. : All logical segments in this logical group are written in a single-70 block in a logical sequential order 'which may utilize page label winding. 2. Unwritten: No logical segments have been written in this logical group. The logical group marks a group of address blocks that are not written and have no configured metablocks. It will respond to host reads for each segment in the group. 124919.doc •37- 200837562 Send back a predefined profile. 3. Sequential update: The logical group bed addresses are f, the inner knife & the segment has been logically sequential in the singular block. 'It may use the page mark, so J, 曰 replace any of the 6 HM groups Corresponding logical block of the previous complete state 0 4········································································ ,

^。亥等狀會替代該群中任何前面的完整狀態之對應邏 輯區塊。該群内的—區段可能會被寫人-次以上,其最新 的版本會替代所有前面的版本。 囷UA說明一元區塊的所有可能狀態,以及於各種操作 下該等狀態間可能的轉換情形。 一囷13B為-列出-元區塊之該等可能狀態的表格。該等 元區塊狀態的定義如下: •已抹除··該元區塊中的所有的區段均已被抹除。 入,其區段呈現邏輯 所有區段均屬於相同 2 ·循序更新:該元區塊已經被部分寫 循序順序,其可能會利用頁面標籤。 的邏輯群組。 3·雜亂更新:該元區塊已經被部分或完全寫入,其區段呈 現邏輯非循序順序。任何區段均可能被寫入一次 、 上。所 有區段均屬於相同的邏輯群組。 4 :完整:該元區塊已經以邏輯循序的順序被完全寫入, 其可能會利用頁面標籤。 5 ··原始:該元區塊係先前完整的元區塊,不過,至少其 124919.doc -38- 200837562 中-個區段已經因主機資料更新而變為廢棄。 _圖14(句至14〇1)為顯示對該邏輯群組之“以及 兀區塊所進行之各項操作的效果的狀態圖。 、 囷14(A)顯示對應於第_次 ^ u & 人寫入刼作的邏輯群組與元區 兔轉換之狀怨圖。該主機會以邏輯循序的順序將一先前未 被寫入之邏輯群組中—❹個的區段以-新配置之已抹 除的元區塊之中。該邏輟雜细命 狀態中。 ^群,讀以區塊會進人循序更新 圖卵)顯示對應於第_次完整操作㈣輯群組與元區 免轉換之狀關。-先前未被寫人之循序更新邏輯群組在 斤有區&均m機循序寫人時會變成完整。假使該卡利 用一預定義資料圖案來填充該等剩餘未被寫人區段以填滿 該群的話,亦可能會發生此轉換。該元區塊會變成完整。 ί κ 圖14(c)顯示對應於第-次雜亂操作的邏輯群組與元區 塊轉換之狀悲®。-先前未被寫人之循序更新邏輯群組在 至少-區段被該主機非循序寫人時便會變成雜亂。 囷14(D)顯不對應於第一次壓縮操作的邏輯群組與元區 塊轉換之狀悲圖。一先前未被寫入之雜亂更新邏輯群組内 的所有有效區段均會從舊的區塊被複製至一新的雜亂元區 塊,接著便會抹除該舊的區塊。 圖14(E)顯不對應於第一次合併操作的邏輯群組與元區 塊轉換之狀4圖。一先前未被寫入之雜亂更新邏輯群組内 的所有有效區段均會從舊的雜亂區塊中被移出,用於以邏 輯循序的順序來填充_新配置之已抹除區塊。未被主機寫 124919.doc -39- 200837562 入的區段會填充— 雜乳區塊。 義貝科圖案。接著便會抹除該舊的 圖14(F)顯示對靡 …於一循序寫入操作的邏輯群組盘 塊轉換之狀態圖。哕 砰、/、兀& 4主機會以邏輯循序的順序將一完整的 邏輯群組中一或容加广机^ ^ 區&寫入一新配置之已抹除的元區塊 之中。該邏輯群《且盥兮兄 、、/、4 7L區塊會進入循序更新狀態中。 先前完整的元區塊會變成一原始元區塊。 “ 圖“(G)顯不對應於一循序填充操作的邏輯群組鱼元區 塊轉換之狀態圖。一掂床 、 循序更新邏輯群組在所有區段均被該 主機循序寫入時會變成完整。在利用來自該原始區塊的有 品&真充4循序更新邏輯群組以使其變成完整時的廢棄 項目收集期間亦會發生此轉換,於此之後便可抹除該原始 區塊。 圖14(H)顯不對應於—非循序寫人操作的邏輯群組與元 區塊轉換之狀態圖。—循序更新邏輯群組在至少―區段被 該主機非循序寫人時便會變成雜亂。料非循序區段寫入 ^使得孩更新區塊或該對應原始區塊中的有效區段變為廢 棄0 囷14(1)顯示對應於一壓縮操作的邏輯群組與元區塊轉換 之狀態圖。一雜亂更新邏輯群組内的所有有效區段均會從 舊的區塊被複製至一新的雜亂元區塊,接著便會抹除該舊 的區塊。該原始區塊並不會受到影響。 圖14(J)顯示對應於一合併操作的邏輯群組與元區塊轉 換之狀態圖。一雜亂更新邏輯群組内的所有有效區段均會 124919.doc -40- 200837562 從舊的雜亂區塊及該原始區塊中被複製,用於以邏輯循序 的順序來填充一新配置之已抹除區塊。接著便會抹除該舊 的雜亂區塊與該原始區塊。 更新區塊追蹤與管理 囷15說明用於追蹤已開放及已關閉之更新區塊與已抹除 區塊以進行配置的配置區塊清單(ABL)的結構的較佳具體 實施例。該配置區塊清單(ABL)610會被保存於控制器 RAM 13 0之中,以允許管理已抹除區塊的配置、以分配之 〆 、更新區塊、相關的區塊與控制結構,並且可致能正確的邏 輯至實體位址轉換。於該較佳的具體實施例中,該ABL包 含一已抹除區塊的清單、一開放更新區塊清單614、以及 一已關閉更新區塊清單616。 開放更新區塊清單614係該ABL中之具有開放更新區塊 屬性之區塊項目的集合。該開放更新區塊清單針對目前開 放的每個資料更新區塊均具有一個項目。每個項目保有下 面的資訊。LG係目前更新元區塊專用的邏輯群組位址。 < 循序/雜亂係一狀態,其表示的係該更新區塊所填充的究 竟係循序或雜亂的更新資料。MB係該更新區塊的元區塊 位址。頁面標籤係被記錄於該更新區塊之第一實體位置處 的起始邏輯區段。已寫入的區段數量表示的係目前已被寫 入該更新區塊中的區段數量。MBg係該相關原始區塊的元 區塊位址。頁面Tag()係該相關原始區塊的頁面標籤。 已關閉更新區塊清單616係該配置區塊清單(ABL)的子 集。其為該ABL中具有已關閉更新區塊屬性之區塊項目的 124919.doc -41 - 200837562 集合。该已關閉更新區塊清單針對已經關閉的每個資料更 新區塊均具有_個項目,不過其項目並未於一邏輯至主實 體目錄中被更新。每個項目保有下面的資訊。lg係目前 更新區塊專用的邏輯群組位址。MB係該更新區塊的元區 塊位址。頁面標籤係被記錄於該更新區塊之第一實體位: 處的起始邏輯區段。廳。係該相關元區塊的原始區塊位 址° 雜區塊索引 -循序更新區塊具有按邏輯循序順序加以儲存的資料, 因此可輕易地定位該區塊當中的任何邏輯區段。一雜亂更 新區塊使其邏輯區段按順序顛倒方式加以儲存而且還可以 錯存-邏輯區段之多個更新代。必須維持額外資訊以追蹤 將母個有效邏輯區段定位於雜亂更新區塊中的位置。 於較佳具體實施例中,雜亂區塊索引資料結構允許追蹤 及快速存取-雜亂區塊中的所有有效區段。雜亂區塊索引 獨立地管理邏輯位灿处 、 區域’並有效率地程序系統 貝〈、使用者資料的熱區。索引資料結構本質上使索引資 訊可維持具很少更新需求的快閃記憶體中以便性能不受很 大程度的影塑。另_ 士二 生,、3另一方面,將雜亂區塊中最近寫入的區段 之/月早保存在控制器RAM中的雜亂區段清單中。同樣,將 自快閃記憶體的索引資訊之快取保存在控制器RAM中以便 最^化用於位址轉化的快閃區段存取之數目。將用於每個 雜亂區塊的旁弓丨# '、 存在快閃記憶體中的雜亂區塊索引 (CBI)區段中。 124919.doc -42- 200837562 圖16A顯示說明一雜亂區塊索引(CBI)區段的資料欄位。 一雜亂區塊索引區段(CBI區段)包含用於一邏輯群組内映 射至一雜亂更新區塊的每個區段之索引,其界定雜亂更新 區塊内或其相關聯原始區塊内的邏輯群組之每個區段的位 置。一 CBI區段包含:一雜亂區塊索引欄位,其用以追蹤 雜亂區塊内的有效區段;一雜亂區塊資訊欄位,其用於追 蹤用於雜亂區塊的位址參數;以及一區段索引欄位,其用 於追蹤儲存CBI區段之元區塊(CBI區塊)内的有效CBI區 段。 圖16B說明欲被記錄於一專屬元區塊中的該等雜亂區塊 索引(CBI)區段的範例。該專屬的元區塊將被稱為CBI區塊 620。當更新一 CBI區段時,其會被寫入該CBI區塊620中 的下個可用實體區段位置之中。於該CBI區塊中可能會存 在一 CBI區段的多重複製,不過,僅有最後被寫入的複製 係有效的。舉例來說,邏輯群組LG!的CBI區段便已經被 更新二次’最新的版本才係有效的版本。藉由區塊中最後 寫入之CBI區段中的一索引集來識別CBI區塊中的每個有 效區段之位置。於此範例中,該區塊中最後被寫入的CBI 區段係LGn6的CBI區段而其索引集則係會替代所有先前索 引集的有效索引集。當CBI區塊最終完全充滿CBI區段 時,藉由將所有有效區段重新寫入一新的區塊位置而在一 控制寫入操作期間壓縮該區塊。接著抹除滿區塊。 一 CBI區段内的雜亂區塊索引欄位包含用於一邏輯群組 或子群組内映射至一雜亂更新區塊的每個邏輯區段之一索 124919.doc -43- 200837562 引項目。每個索引項目表示雜亂更新區塊内定位對應邏輯 區段之有效資料所處的偏移。預留的索引值指示於雜亂更 新區塊中不存在邏輯區段之有效資料,而且相關聯原始區 塊中的對應區段為有效區段。將某些雜亂區塊索引攔位項 目之快取保存在控制器RAM中。 一 CBI區段内的雜亂區塊資訊攔位包含系統中存在的每 個雜亂更新區塊之一項目,其記錄區塊的位址參數資訊。 此欄位中的資訊僅在CBI區塊中的最後寫入之區段中有 效。此資訊還亦出現在RAM中的資料結構中。 母個雜亂更新區塊的項目包含三個位址參數。第一個參 數係與雜亂更新區塊相關聯的邏輯群組之邏輯位址(或邏 輯群組編號)。第二個參數係雜亂更新區塊之元區塊位 址。第二個參數係雜亂更新區塊中寫入的最後區段之實體 位址偏移。偏移資訊設定初始化期間雜亂更新區塊之掃描 的起始點,以於RAM中重建資料結構。 區段索引欄位包含用於CBI區塊中的每個有效CBI區段 之項目。其界定CBI區塊内定位與每個獲准的雜亂更新 區塊相關聯的最近寫入之CBI區段所處的偏移。索引中的 一偏移之預留值指示獲准的雜亂更新區塊不存在。 圖16C說明存取一正在進行雜亂更新之給定邏輯群組中 邏輯區段的資料的流程圖。於更新程序期間,將更新資 料記錄於雜亂更新區塊中,而未改變的資料保持在與邏輯 群組相關聯的原始元區塊中。於雜亂更新條件下存取邏輯 群組之一邏輯區段的程序如下: 124919.doc -44- 200837562 步驟650 :開始定位一給定邏輯群組之一給定邏輯區 段。 步驟652 ··於CBI區塊中定位最後寫入之CBI區段。 步驟654:藉由查找該最後寫入之CBI區段的雜亂區塊資 訊攔位來定位與給定邏輯群組相關聯的雜亂更新區塊或原 始區塊。此步驟可於步驟662之前的任何時間處實施。 步驟658 :若最後寫入之CBI區段係關於給定邏輯群組, 則定位該CBI區段。繼續至步驟662。否則,繼續至步驟 660 〇 步驟660 :藉由查找最後寫入之CBI區段的區段索引欄位 來定位給定邏輯群組的CBI區段。 步驟662 :藉由查找定位的CBI區段之雜亂區塊索引欄位 而於雜IL區塊或原始區塊當中定位給定邏輯區段。 囷16D說明根據一替代具體實施例,其中邏輯群組已經 被分割成複數個子群,存取一正在進行雜亂更新之給定邏 輯群組中一邏輯區段的資料的流程圖。一 CBI區段的有限 I 容量僅能追縱預定最大數目的邏輯區段。當邏輯群組具有 比單一 CBI區段所能程序的邏輯區段多之邏輯區段時,將 邏輯群組分割成多個子群組,將一 CBI區段指派給每個子 群組。在一個範例中,每個CBI區段具有足夠的容量用於 追蹤由256個區段及最多8個雜亂更新區塊組成的邏輯群 組。若邏輯群組具有超過256個區段的尺寸,則存在一分 離的CBI區段用於邏輯群組内的每個256區段子群組。可存 在CBI區段用於邏輯群組内最多8個子群組,從而為尺寸最 124919.doc -45- 200837562 多達2048個區段的邏輯群組提供支持。 於較佳具體實施例中,可使用間接索引方案以便於索引 之管理。區段索引之每個項目具有直接與間接欄位。 直接區段索引界定CBI區塊内定位與一特定雜亂更新區 塊相關之所有可能CBI區段所處的偏移。此欄位中的資訊 僅在與該特定雜亂更新區塊相關的最後寫入之CBI區段中 有效。索引中的一偏移之保留值指示CBI區段不存在,因 為與雜亂更新區塊相關的對應邏輯子群組不存在,或因已 配置更新區塊而尚未加以更新。 間接區段索引界定CBI區塊内定位與每個獲准的雜亂更 新區塊相關的最近寫入之CBI區段所處的偏移。索引中的 一偏移之保留值指示獲准的雜亂更新區塊不存在。 圖16D顯示雜亂更新下存取該邏輯群組之一邏輯區段的 程序’其步驟如下: 步称670 :將每個邏輯群組分割成多個子群且指派一 cbi 區段給每個子群。 步驟680 :開始定位一給定邏輯群組之一給定子群組的 一給定邏輯區段。 步驟682 :於CBI區塊中定位最後寫入之CBI區段。 步驟684 :藉由查找最後寫入之CBI區段的雜亂區塊資訊 攔位來定位與給定子群組相關聯的雜亂更新區塊或原始區 塊。此步驟可於步驟696之前的任何時間處實施。 步驟686 ··如果最後寫入的CBI區段係針對給定邏輯群 組,則繼續進行至步驟691。否則繼續進行至步驟690。 124919.doc -46- 200837562 步驟690 :藉由查找最後寫入之CBI區段的間接區段索引 欄位來定位給定邏輯群組之多個CBI區段的最後寫入之區 段。 步驟691 :已定位與給定邏輯群組的子群之一相關聯的 至少一 CBI區段。繼續。 步驟692 :若定位的CBI區段係關於給定子群組,則定位 給定子群組的CBI區段。繼續至步驟696。否則,繼續至步 驟 694。 步驟694 :藉由查找當前定位的CBI區段之直接區段索引 欄位來定位給定子群組的CBI區段。 步驟696 :藉由查找給定子群的CBI區段之雜亂區塊索引 欄位而在雜亂區塊或原始區塊當中定位給定邏輯區段。 圖16E說明於將每個邏輯群組分割成多個子群的具體實 施例中的雜亂區塊索引(CBI)區段的範例及其功能。一邏 輯群組7 0 0最初會將其完整的資料儲存於一原始元區塊7 〇 2 之中。接著,該邏輯群便會進行更新,其會配置一專屬的 雜亂更新區塊704。於該等範例中,該邏輯群7〇〇會被分割 成複數個子群(例如子群A、B、C、D),每個子群各具有 256個區段。 首先定位CBI區塊620中^. The Hierarchy equation replaces the corresponding logical block of any preceding complete state in the group. The segments in the group may be written more than once - and the latest version will replace all previous versions.囷UA describes all possible states of a unitary block and possible transitions between those states under various operations. A 13B is a table listing the possible states of the - metablock. The metablock states are defined as follows: • Erased · All sections in the metablock have been erased. In, its section rendering logic All sections are the same 2 · Sequential update: The metablock has been partially written in sequential order, which may utilize page labels. Logical group. 3. Scramble update: The metablock has been partially or completely written, and its sections appear in a logical, non-sequential order. Any section may be written once, on. All sections belong to the same logical group. 4: Complete: The metablock has been completely written in a logical sequential order, which may utilize page tags. 5 · Original: The metablock is the previous complete metablock, but at least its section of 124919.doc -38- 200837562 has been discarded due to host data updates. _ Figure 14 (sentence to 14〇1) is a state diagram showing the effect of the "and the operations performed by the block" on the logical group. 囷14(A) is displayed corresponding to the _th ^u &amp The person writes the logical group of the action and the meta-relationship of the meta-region rabbit. The host will logically order a previously unwritten logical group - one of the segments - new configuration Among the erased metablocks. The logic is in the middle of the fine-grained state. ^Group, read by the block will enter the orderly update map eggs) Display corresponding to the first _ complete operation (four) series group and meta-region The conversion-free status is closed. - The previously un-written person's sequential update logic group will become complete when the jin district & m machine sequentially writes the person. If the card uses a predefined data pattern to fill the remaining This conversion may also occur if the segment is written to fill the group. The metablock becomes complete. ί κ Figure 14(c) shows the logical group and metablock corresponding to the first-time messy operation. The shape of the conversion is sad. - The previously unwritten person's sequential update logic group will change when at least the section is written by the host in a non-sequential manner.囷14(D) does not correspond to the logical group and metablock conversion of the first compression operation. A valid segment in a previously unwritten random update logical group It will be copied from the old block to a new messy metablock, and then the old block will be erased. Figure 14(E) does not correspond to the logical group and metablock of the first merge operation. The transformation is shown in Figure 4. All valid segments in a previously unwritten random update logical group are removed from the old messy block for filling in a logically sequential order. Erase the block. The section that is not written by the host 124919.doc -39- 200837562 will be filled - the milky block. The Yibeke pattern. Then the old figure 14(F) will be erased... The state diagram of the logical group disk block conversion in a sequential write operation. The 哕砰, /, 兀 & 4 host will logically sequence a complete logical group or add a wide area ^ ^ area & is written into the erased metablock of a new configuration. The logical group "and the brother,, /, 4 7L block will enter In the sequential update state, the previous complete metablock becomes an original metablock. “Graphic” (G) does not correspond to the state diagram of the logical group fish metablock conversion of a sequential filling operation. The sequential update logical group becomes complete when all the segments are sequentially written by the host. In the case of using the product & true charge from the original block, the logical group is sequentially updated to make it become a complete abandoned project. This conversion will also occur during the collection period, after which the original block can be erased. Figure 14 (H) does not correspond to the state diagram of the logical group and metablock conversion of the non-sequential writer operation. The update logical group becomes messy when at least the section is written by the host in a non-sequential manner. The non-sequential section writes ^ makes the active section in the child update block or the corresponding original block become discarded 0 囷 14 (1) shows the state of the logical group and metablock conversion corresponding to a compression operation Figure. All valid segments in a messy update logical group are copied from the old block to a new messy metablock, and the old block is erased. This original block will not be affected. Fig. 14(J) shows a state diagram of logical group and metablock conversion corresponding to a merge operation. All valid sections in a messy update logical group will be 124919.doc -40- 200837562 copied from the old messy block and the original block, used to populate a new configuration in a logical sequential order Wipe the block. The old messy block and the original block are then erased. Update Block Tracking and Management 囷 15 illustrates a preferred embodiment of the structure of an Configuration Block List (ABL) for tracking open and closed update blocks and erased blocks for configuration. The configuration block list (ABL) 610 is saved in the controller RAM 130 to allow management of the configuration of the erased block, allocation of blocks, update blocks, associated blocks and control structures, and Enables correct logic to physical address translation. In the preferred embodiment, the ABL includes a list of erased blocks, an open update block list 614, and a closed update block list 616. The Open Update Block List 614 is a collection of block items in the ABL that have open update block attributes. The list of open update blocks has one item for each data update block currently open. Each project retains the following information. The LG system currently updates the logical group address specific to the metablock. < Sequential/chaotic state, which indicates that the update block is filled with sequential or cluttered update data. MB is the metablock address of the update block. The page label is recorded in the starting logical section at the first physical location of the update block. The number of segments written indicates the number of segments that have been written to the update block. MBg is the metablock address of the associated original block. The page Tag() is the page label of the relevant original block. The Closed Update Block List 616 is a subset of the Configuration Block List (ABL). It is the set of 124919.doc -41 - 200837562 in the ABL that has the block item with the updated block attribute turned off. The closed update block list has _ items for each data update block that has been closed, but its items are not updated in a logical to main entity directory. Each item retains the following information. Lg is the logical group address reserved for the current update block. MB is the metablock address of the update block. The page tag is recorded in the first physical bit of the update block: the starting logical segment at the location. hall. The original block address of the associated metablock. The hash block index - the sequential update block has data stored in a logical sequential order, so that any logical segment in the block can be easily located. A messy update block stores its logical sections in reverse order and can also be staggered - multiple update generations of logical sections. Additional information must be maintained to track the location of the parent valid logical segment in the messy update block. In a preferred embodiment, the hash block index data structure allows for tracking and fast access - all active segments in a messy block. The messy block index independently manages the logical location, the area' and the efficient program system, the hot area of the user data. The index data structure essentially allows the indexing information to be maintained in flash memory with little update requirements so that performance is not significantly affected. On the other hand, the month/month of the most recently written section in the messy block is saved in the list of messy sections in the controller RAM. Similarly, the cache of index information from the flash memory is saved in the controller RAM to maximize the number of flash sector accesses for address translation. It will be used in the chaotic block index (CBI) section of each flash block. 124919.doc -42- 200837562 Figure 16A shows the data field illustrating a messy block index (CBI) section. A hash block index section (CBI section) containing an index for each sector mapped to a cluttered update block within a logical group that defines within the cluttered update block or within its associated original block The location of each section of the logical group. A CBI section includes: a messy block index field for tracking valid sectors within the messy block; a messy block information field for tracking address parameters for the messy block; A segment index field that is used to track valid CBI segments within a metablock (CBI block) that stores CBI segments. Figure 16B illustrates an example of such a Scrambled Block Index (CBI) section to be recorded in a dedicated metablock. This exclusive metablock will be referred to as CBI block 620. When a CBI section is updated, it is written to the next available physical sector location in the CBI block 620. Multiple copies of a CBI segment may exist in the CBI block, but only the last written copy is valid. For example, the CBI section of the logical group LG! has been updated to the second most recent version to be a valid version. The location of each valid segment in the CBI block is identified by an index set in the last written CBI section in the block. In this example, the last CBI segment written in the block is the CBI segment of LGn6 and its index set replaces the valid index set for all previous index sets. When the CBI block eventually completely fills the CBI section, the block is compressed during a control write operation by rewriting all valid sections to a new block location. Then erase the full block. A messy block index field within a CBI section contains one of each logical section mapped to a cluttered update block within a logical group or subgroup. 124919.doc -43 - 200837562. Each index item represents the offset in which the valid data of the corresponding logical section is located within the messy update block. The reserved index value indicates that there is no valid data for the logical segment in the messy update block, and the corresponding segment in the associated original block is a valid segment. The cache of some messy block index block items is saved in the controller RAM. The messy block information block in a CBI section contains one of each of the messy update blocks present in the system, which records the address parameter information of the block. The information in this field is only valid in the last written section in the CBI block. This information also appears in the data structure in RAM. The project of the parent messy update block contains three address parameters. The first parameter is the logical address (or logical group number) of the logical group associated with the messy update block. The second parameter is the metablock address of the cluttered update block. The second parameter is the physical address offset of the last segment written in the hash update block. The offset information sets the starting point of the scan of the hash update block during initialization to reconstruct the data structure in RAM. The section index field contains items for each valid CBI section in the CBI block. It defines the offset within the CBI block that locates the most recently written CBI section associated with each approved messy update block. The reserved value of an offset in the index indicates that the approved cluttered update block does not exist. Figure 16C illustrates a flow diagram of accessing data for a logical segment in a given logical group that is undergoing a messy update. During the update process, the update data is recorded in the messy update block, while the unchanged data remains in the original metablock associated with the logical group. The procedure for accessing a logical section of a logical group under a messy update condition is as follows: 124919.doc -44- 200837562 Step 650: Start locating a given logical section of a given logical group. Step 652 · Locate the last written CBI section in the CBI block. Step 654: Locate the cluttered update block or the original block associated with the given logical group by looking up the messy block information block of the last written CBI section. This step can be implemented at any time prior to step 662. Step 658: If the last written CBI segment is for a given logical group, the CBI segment is located. Proceed to step 662. Otherwise, proceed to step 660. Step 660: Locate the CBI section of the given logical group by looking up the section index field of the last written CBI section. Step 662: locating a given logical segment among the hetero-IL block or the original block by looking up the hash block index field of the located CBI segment. Figure 16D illustrates a flow diagram of accessing a material of a logical segment in a given logical group that is being scrambled, according to an alternate embodiment, in which the logical group has been partitioned into a plurality of subgroups. The finite I capacity of a CBI segment can only track a predetermined maximum number of logical segments. When a logical group has more logical segments than a logical segment of a single CBI segment, the logical group is divided into a plurality of subgroups, and a CBI segment is assigned to each subgroup. In one example, each CBI section has sufficient capacity to track a logical group consisting of 256 sectors and up to 8 cluttered update blocks. If the logical group has a size of more than 256 segments, then there is a separate CBI segment for each 256 segment subgroup within the logical group. There may be a CBI section for up to 8 subgroups within a logical group to support a logical group of up to 2048 segments of size 124919.doc -45 - 200837562. In a preferred embodiment, an indirect indexing scheme can be used to facilitate index management. Each item of the section index has direct and indirect fields. The direct segment index defines the offset within the CBI block that locates all possible CBI segments associated with a particular hash update block. The information in this field is only valid in the last written CBI section associated with that particular messy update block. A reserved value of an offset in the index indicates that the CBI section does not exist because the corresponding logical subgroup associated with the cluttered update block does not exist or has not been updated because the updated block has been configured. The indirect section index defines the offset within the CBI block that locates the most recently written CBI section associated with each of the approved messy update blocks. The reserved value of an offset in the index indicates that the approved cluttered update block does not exist. Figure 16D shows the procedure for accessing a logical section of the logical group under a messy update. The steps are as follows: Step 670: Split each logical group into multiple subgroups and assign a cbi section to each subgroup. Step 680: Begin to locate a given logical segment of a given group of a given logical group. Step 682: Locate the last written CBI section in the CBI block. Step 684: Locate the cluttered update block or the original block associated with the given sub-group by looking up the messy block information block of the last written CBI section. This step can be performed at any time prior to step 696. Step 686 · If the last written CBI segment is for a given logical group, proceed to step 691. Otherwise proceed to step 690. 124919.doc -46- 200837562 Step 690: Locate the last written segment of multiple CBI segments of a given logical group by looking up the indirect segment index field of the last written CBI segment. Step 691: At least one CBI section associated with one of the subgroups of the given logical group has been located. carry on. Step 692: If the located CBI segment is related to a given subgroup, the CBI segment of the given subgroup is located. Proceed to step 696. Otherwise, proceed to step 694. Step 694: Locate the CBI section of the given subgroup by looking up the direct section index field of the currently located CBI section. Step 696: Locate the given logical segment among the hash block or the original block by looking up the messy block index field of the CBI section of the given subgroup. Figure 16E illustrates an example of a Scrambled Block Index (CBI) section and its functionality in a particular embodiment of partitioning each logical group into multiple subgroups. A logical group 700 initially stores its complete data in an original metablock 7 〇 2 . The logical group is then updated, which configures a dedicated messy update block 704. In these examples, the logical group 7〇〇 is divided into a plurality of subgroups (e.g., subgroups A, B, C, and D), each of which has 256 segments. First locate the CBI block 620

124919.doc 為在子群組B中定位第i個區段 的最後寫入之CBI區段。最後_ -47- 200837562 若最後寫入之CBI區段成為給定邏輯群組的四個CBI區 段之一,則將進一步決定其是否確實為包含第i個邏輯區 段之給定子群組B的CBI區段。若是,則CBI區段的雜亂區 塊索引將指向元區塊位置以儲存第i個邏輯區段的資料。 區段位置可以在雜亂更新區塊704或原始區塊702中。 假使該最後被寫入的CBI區段係該給定邏輯群之該等四 個CBI區段之一但卻並非確實針對該子群b,則會查找其 直接區段索引以定位該子群B的該CBI區段。一但定位此 確實的CBI區段之後,則可查找其雜亂區塊索引以便於該 雜亂更新區塊704與該原始區塊7〇2之中定位第i個邏輯區 若隶後寫入之CBI區段並非成為給定邏輯群組的四個 CBI區段之任個’則查找其間接區段索引以定位四個 CBI區段之一。於囷16E所示的範例中,會定位子群組c的 該CBI區段。接著,便可查找子群組c之此cbi區段的直接 區段索引以定位該子群組B的該確實的CBI區段。該範例 顯示出,§查找其雜亂區塊索引時,發現到第丨個邏輯區 段並未變更且其有效資料將會位於該原始區塊之中。 相同的考量適用於定位給定邏輯群組之子群組c中的第】 個邏輯區段。該範例顯示最後寫入之cm區段並非成為給 定邏輯群組的四個CBI區段之任_區段。纟㈣區段索引 指向給定邏輯群組的四個c職段之_。被指到的四個中 最後被寫入者同樣確實係該子群組C之該CBI區段。當查 找其雜亂區塊索引時,發現到第』個邏輯區段係位於該雜 124919.doc -48 - 200837562 亂更新區塊704中的指定位置處。 雜IL區段之清單存在於控制器RAM中用於系統中的每個 雜亂更新區塊。每個清單包含自於快閃記憶體中最後更新 相關CBI區段起在雜亂更新區塊中寫入的區段之記錄。一 特定雜亂更新區塊的邏輯區段位址的數量(其可能係保存 於一雜亂區段清單之中)係一項設計參數,其典型值為8至 16。該清單的最佳尺寸決定於其對雜亂資料寫入操作之額 外負擔以及初始化期間區段掃描時間兩者間效應的折衷。 於系統初始化期間,根據需要掃描每個雜亂更新區塊以 識別自其相關聯CBI區段之一的先前更新起所寫入的有效 區段。構造控制器RAM中用於每個雜亂更新區塊的雜亂區 段清單。每個區塊僅需要從於其最後寫入之CBI區段中的 雜亂區塊資訊欄位中界定之最後區段位址加以掃描。 當配置一雜亂更新區塊時,寫入一 CBI區段以對應於所 有更新的邏輯子群組。將雜亂更新區塊的邏輯與實體位址 寫入區段中的一可用雜亂區塊資訊欄位中,其中雜亂區塊 索引攔位中具有無效項目。於控制器RAM中開啟一雜亂區 段清單。 當關閉一雜亂更新區塊時,寫入一 CBI區段,其中從區 段中的雜亂區塊資訊攔位移除區塊之邏輯與實體位址。 RAM中的對應雜亂區段變成未使用。 修改控制器RAM中的對應雜亂區段清單以包含寫入一雜 亂更新區塊的區段之記錄。當控制器RAM中的雜亂區段清 單沒有可用空間用於寫入一雜亂更新區塊的另一區段之記 124919.doc -49- 200837562 錄時’寫入與清單中的區段相關之邏輯子群組的更新C b I 區段,並且清除清單。 當CBI區塊620變滿時,將有效的CBI區段複製到一配置 的抹除區塊中,並且抹除先前的CBI區塊。 位址表 圖2所示的邏輯至實體位址轉換模組14〇係負責將一主機 的邏輯位址和快閃記憶體中對應的實體位址產生關聯。邏 輯群組與實體群(元區塊)間的映射會被儲存在分散於該非 揮發性快閃圮憶體200與該揮發性但比較迅速的ram 130(參見圖1)之中的一組表格與清單之中。將一位址表維 持在快閃記憶體中,該表包含記憶體系統中的每個邏輯群 組之元區塊位址。另外,將最近寫入之區段的邏輯至實體 位址記錄暫時保存在RAM中。當於通電後初始化系統時, 可以從快閃記憶體中的區塊清單與資料區段標頭重新構造 該等揮發性記錄。因此’僅需报少地更新快閃記憶體中的 位址表’%而導致對控制資料的額外負擔寫入操作之低百 分比。 邏輯群組之位址記錄的階層包含開啟式更新區塊清單、 RAM中的關閉式更新區塊清單以及維持在快閃記憶體中的 群組位址表(GAT)。 開啟式更新區塊清單為當前開 卞~田月J间啟用於寫入更新之主機區 段資料的資料更新區塊之控制 枉市j态RAM中的清單。當關閉一 區塊時,將用於該區塊的項目蒋 月曰移至關閉式更新區塊清單。 關閉式更新區塊清單為已關閉 j才1的貝枓更新區塊之控制器 124919.doc -50- 200837562124919.doc is the last written CBI section of the i-th section in subgroup B. Finally _ -47- 200837562 If the last written CBI section becomes one of the four CBI sections of a given logical group, it will be further determined whether it is indeed a given subgroup B containing the ith logical section CBI section. If so, the clutter block index of the CBI section will point to the metablock location to store the data for the i th logical segment. The segment location may be in the messy update block 704 or the original block 702. If the last written CBI section is one of the four CBI sections of the given logical group but is not actually targeted to the subgroup b, then its direct section index is looked up to locate the subgroup B. The CBI section. Once the positive CBI segment is located, the hash block index can be searched for the CBI to be located after the messy update block 704 and the original block 7〇2 are located. A section is not one of the four CBI sections of a given logical group' then looks up its indirect section index to locate one of the four CBI sections. In the example shown in Figure 16E, the CBI section of subgroup c is located. Next, the direct segment index of this cbi segment of subgroup c can be found to locate the exact CBI segment of the subgroup B. This example shows that when § finds its messy block index, it finds that the third logical segment has not changed and its valid data will be in the original block. The same considerations apply to locating the first logical segment in subgroup c of a given logical group. This example shows that the last written cm segment is not part of the four CBI segments of a given logical group.纟 (4) Segment Index Points to the four c-segments of a given logical group. The last of the four referred to is also the CBI section of the subgroup C. When the hash block index is found, it is found that the ">th logical segment is located at the specified position in the mutated update block 704 of the 124919.doc -48 - 200837562. A list of miscellaneous IL segments is present in the controller RAM for each cluttered update block in the system. Each list contains a record of the extents written in the messy update block since the last update of the relevant CBI section in the flash memory. The number of logical sector addresses of a particular hash update block (which may be stored in a hashed list) is a design parameter with a typical value of 8 to 16. The optimal size of the list is determined by its trade-off between the extra burden of messy data write operations and the segment scan time during initialization. During system initialization, each cluttered update block is scanned as needed to identify the valid segment written since the previous update of one of its associated CBI segments. A list of messy sections in the controller RAM for each cluttered update block is constructed. Each block only needs to be scanned from the last sector address defined in the messy block information field in its last written CBI section. When a messy update block is configured, a CBI section is written to correspond to all updated logical subgroups. The logical and physical address of the messy update block is written into an available messy block information field in the section, wherein the messy block index block has an invalid item. A list of messy sections is opened in the controller RAM. When a messy update block is closed, a CBI section is written in which the logical and physical addresses of the block are removed from the messy block information block in the block. The corresponding cluttered section in the RAM becomes unused. A list of corresponding hashes in the controller RAM is modified to include a record of the extents in which a messy update block is written. When the list of cluttered sections in the controller RAM has no free space for writing another section of a cluttered update block 124919.doc -49- 200837562 Recording 'Write logic related to the section in the list The subgroup updates the Cb I section and clears the list. When CBI block 620 becomes full, the valid CBI section is copied into a configured erase block and the previous CBI block is erased. Address Table The logical-to-physical address translation module 14 shown in Figure 2 is responsible for associating the logical address of a host with the corresponding physical address in the flash memory. The mapping between logical groups and entity groups (metablocks) is stored in a set of tables dispersed among the non-volatile flash memory 200 and the volatile but relatively fast ram 130 (see Figure 1). With the list. The address table is maintained in flash memory, which contains the metablock address of each logical group in the memory system. In addition, the logical-to-physical address record of the most recently written sector is temporarily saved in RAM. When the system is initialized after power up, the volatile records can be reconstructed from the block list and data section headers in the flash memory. Therefore, it is only necessary to report the address table %% in the flash memory less frequently, resulting in a lower percentage of the write operation of the control data. The hierarchy of the address records of the logical group includes a list of open update blocks, a list of closed update blocks in RAM, and a group address table (GAT) maintained in the flash memory. The open update block list is the list of the data update block that is enabled for writing the updated host segment data between the current open and the next month. When a block is closed, the project for the block, Jiang Yuexi, is moved to the list of closed update blocks. The list of closed update blocks is the controller of the block update block that has been closed. j.1 124919.doc -50- 200837562

Ram中的清單。於控制寫入操作期間,將清單中的項目子 集移動至群組位址表中的一區段。 群組位址表(GAT)為s己丨思體系統中的主機資料之所有邏 輯群組的元區塊位址之清單。GAT包含依據邏輯位址按順 序排列的每個邏輯群組之一個項目。該GAT中的第n個項 目含有位址η之邏輯群的元區塊位址。於該較佳的具體實 施例中,其係一位於快閃記憶體中的表格,其包括一組區 段(稱為GAT區段),其中的項目定義該記憶體系統中每個 邏輯群的元區塊位址。將GAT區段定位在快閃記憶體中的 或多個專用控制區塊(稱為G AT區塊)中。 囷17A說明一群位址表(GAT)區段的資料攔位。一 QAT區 段可具有(例如)足夠的容量以包含128個連續邏輯群組之一 G AT項目集。母個G AT區段包含兩個成分,即用於某範圍 内的每個邏輯群組之元區塊位址的一 gAT項目集,以及一 GA丁區段索引。第一成分包含用於定位與邏輯位址相關聯 的元區塊之資訊。第二成分包含用於定位GAT區塊内的所 有有效GAT區段之資訊。每個GAT項目均具有三個攔位, 換吕之為:元區塊號碼;頁面標籤,如先前配合囷3A(in) 的疋義般,以及旗標,其表示的係該元區塊是否已經被重 新連結。GAT區段索引列舉一 GAT區塊中的有效GAT區段 之位置。此索引係在每個G AT區段中,但藉由GAT區塊中 的下一寫入GAT區段之版本所替代。因此,僅最後寫入之 GAT區段中的版本有效。 圖17B說明欲被記錄於一或多個GAT區塊中的該等群位 124919.doc -51 - 200837562 址表(GAT)區段的範例。GAT區塊為專門用於記錄gat區 段的元區塊。當更新一GAT區段時,其會被寫入該GAT區 塊720中的下個可用實體區段位置之中。所以,於該gat 區塊中可忐會存在一 gat區段的多個副本,僅有最後被寫 入的複製係有效的。舉例來說,GAT區段255(其含有邏輯 群組LG3968至LG4〇98的指標)便已經被更新至少兩次,最新 的版本才係有效的版本。可藉由區塊中最後寫入之GAT區 4又中的一索引集來識別GAT區塊中的每個有效區段之位 置。於此範例中,區塊中的最後寫入之gaT區段為gAT區 段236而且其索引集為替代所有先前索引集的有效索引 集。當G AT區塊最終完全充滿GAT區段時,藉由將所有有 效區段重新寫入一新的區塊位置而在一控制寫入操作期間 壓縮該區塊。接著抹除滿區塊。 如上文所說明,一 GAT區塊包含邏輯位址空間之區域中 的群、、且之一邏輯連續集的項目。一 GAT區塊内的GAT區段 刀另J匕δ用於128個連續邏輯群組的邏輯至實體映射資 訊。用於儲存藉由一 GAT區塊橫越之位址範圍内的所有邏 輯群組之項目所需要的GAT區段之數目僅佔用該區塊中的 總區段位置之一部分。因此可藉由將一GAT區段寫入區塊 勺下 了用區段位置處來更新該區段。將所有有效gat 區段及其在gat區塊中的位置之索引維持在最近寫入之 GAT區段中的一索引攔位中。一 GAT區塊中藉由有效gAT 區段所佔用的總區段之部分為一系統設計參數,其通常為 25/〇。然而,每個GAT區塊中存在最多64個有效GAT區 124919.doc -52- 200837562 段。在具有大邏輯容量的系統中,可能需要將gat區段儲 存於一個以上之GAT區塊中。在此情況下,每個GAT區塊 係與一固定範圍的邏輯群組相關聯。 GAT更新係控制寫入操作的一部分,當該abl用光配置 用的區塊時便會觸發該GAT更新(參見圖18)。其與ABL填 充及CBL清空操作同時加以實施。於GAT更新操作期間, 一個GAT區段具有採用自關閉式更新區塊清單中的對應項 目之貪訊加以更新的項目。當更新一 GAT項目時,可從關 閉式更新區塊清單(CUBL)移除任何對應的項目。例如, 可根據關閉式更新區塊清單中的第一項目選擇欲加以更新 的G AT區段。將更新的區段寫入gat區塊中的下一可用區 段位置。 當沒有區段位置可用於更新的GAT區段時,GAT重寫操 作會出現在一控制寫入操作期間。配置一新的GAT區塊, 並且按循序順序從滿GAT區塊複製如藉由GAT索引所界定 的有效GAT區段。接著抹除滿GAT區塊。 一 GAT快取為GAT區段中的128個項目之細分中的項目之 控制器ARM 130中的副本。GAT快取項目的數量係一項系 統設計參數,典型值為32個。每次從一 GAT區段中讀取— 項目時,便會為該相關區段部分建立一 GAT快取。維持多 個G AT快取。該數量係一項設計參數,典型值為4個。可 以最近最少被使用的方式為基礎,利用一不同區段部分的 項目來重寫一 GAT快取。 已抹除元區塊管理 124919.doc -53- 200837562 圖2所示之抹除區塊管理器1 60會利用一組清單來保存目 錄與系統控制資訊,用以管理抹除區塊。該等清單會被分 佈於該控制器RAM 130及快閃記憶體200之中。當必須配 置一已抹除元區塊來儲存使用者資料或是儲存系統控制資 料結構時’便要在被保留在控制器RAM中之配置區塊清單 (ABL)(參見圖15)中選出下個可用的元區塊號碼。同樣 地’當一元區塊於已經除役後被抹除時,其號碼便會被加 進同樣係被保留在控制器RAM中之已清除區塊清單(cbl) 中非$靜悲的目錄與糸統控制資料則會被儲存於快閃記 十思體之中。該些包含已抹除區塊清單,以及一列出該快閃 5己fe體中所有元區塊之已抹除狀態的位元映射(map)。該 等已抹除區塊清單及MAP均會被儲存於個別的區段之中並 且會被記錄至一專屬的元區塊(稱為MAP元區塊)之中。該 些清單係分佈於該控制器RAM與快閃記憶體之中,其會提 供一已抹除區塊記錄階層,以便有效地管理已抹除元區塊 的使用情形。 囷18為說明針對使用及循環使用已抹除區塊而言,該控 制與目錄資訊的分布與流動的示意性方塊圖。該控制與目 錄資料會被保存在複數個清單之中,該等清單則係被保留 於控制器RAM 13 0之中或是被保留於駐存在快閃記憶體 200中的MAP區塊750之中。 於該較佳的具體實施例中,該控制器RAM 13 0會保留該 配置區塊清單(ABL)610以及一份已清除區塊清單 (CBL)740。如先前配合圖15所述,該配置區塊清單(ABL) 124919.doc -54· 200837562 會追蹤最近被配置用於儲存使用者資料或是儲存系統控制 貧料結構的元區塊。當需要配置一新的已抹除元區塊時, 便要在該配置區塊清單(ABL)中選出下個可用的元區塊號 碼。同樣地’該已清除區塊清單(cbl)可用來追蹤已經被 解除配置且抹除的更新元區塊。該ABL與CBL均會被保留 在控制裔RAM 13 0 (參見囷1)之中,以便在追蹤該等非常活 動的更新區塊時可快速存取且容易操縱。 該配置區塊清單(ABL)會追蹤一已抹除的元區塊之集區 並且將該等已抹除的元區塊配置成一更新區塊。因此,可 由一項屬性來描述的該些元區塊中每一者均會指明其究竟 係該ABL即將進行之配置中的已抹除區塊、開放的更新區 塊、或是已關閉的更新區塊。圖18中顯示出該Abl含有一 已抹除ABL清單6 12、開放更新區塊清單6 14、以及關閉更 新區塊清單6 16。此外,和開放更新區塊清單6丨4相關的係 該相關聯的原始區塊清單615。同樣地,和該已關閉更新 區塊清單相關的係該相關的已抹除原始區塊清單6丨7。如 前面囷15所示,該些相關的清單分別係開放更新區塊清單 6 14及關閉更新區塊清單616的子集。該已抹除ABL區塊清 單612、該開放更新區塊清單614、以及該已關閉更新區塊 清單61 6全部都係該配置區塊清單(abl)6 10的子集,每一 者中的項目各具有對應的屬性。 MAP區塊750係快閃記憶體200中專門用來儲存抹除管理 記錄的元區塊。該MAP區塊會儲存一時間連續的複數個 MAP區塊區段,每個MAP區段均係一抹除區塊管理(ebm) 124919.doc -55- 200837562 區段760或是一 MAP區段780。當已抹除區塊已經配置殆盡 且於一元區塊除役時循環時,該相關的控制與目錄資料較 佳的係内含於一邏輯區段之中,該邏輯區段可於該MAP區 塊中進行更新,其每一更新資料實例則會被記錄至一新的 區塊區段之中。於該MAP區塊750之中可能存在複數個 EBM區段760與複數個MAP區段780的多個副本,僅有最新 的版本係有效的。一該等有效MAP區段之位置的索引係内 含於該EMB區塊的一欄位之中。於一控制寫入操作期間, 一有效的EMB區段必定係最後才被寫入該MAP區塊之中。 當該MAP區塊75 0滿載時,便可藉由將所有有效區段重寫 至一新的區塊位置以於控制寫入操作期間對其進行壓縮。 接著抹除滿區塊。 每個EBM區段760均含有已抹除區塊清單(EBL)770,該 等清單係由已抹除區塊集合而成的子集的位址的清單。該 等已抹除區塊清單(EBL)770可充當一緩衝器,其中含有已 抹除元區塊號碼,從中可週期性地取用元區塊號碼來重新 填充該ABL,並且可週期性地將元區塊號碼加入其中以重 新清空該CBL·。該EBL 770可充當緩衝器,用於作為可用 區塊緩衝器(ABB)772、已抹除區塊緩衝器(EBB)774、以 及已清除區塊緩衝器(CBB)776。 可用區塊緩衝器(ABB)772含有一由位於該ABL 610之中 緊跟在前次ABL填充操作後面之該等項目的副本。實際 上,其為ABL填充操作之後該ABL的備份副本。 該已抹除區塊緩衝器(EBB)774含有複數個已抹除區塊位 124919.doc -56- 200837562 址,該等位址係先前傳送自MAP區段78〇或該CBB清單 776(說明如下),並且可於一 ABL填充操作期間傳送給該 ABL 610 〇 孩已β除區塊緩衝器(CBB)776含有已抹除區塊的位址, 該等位址係於一 CBL清空操作期間傳送自該CBL 74〇,並 且梢後將會被傳送給MAP區段78〇或該EBB清單774。 該等MAP區段780之每個均含有一被稱為MAp的位元映 射結構。該MAP會針對快閃記憶體中的每個元區塊使用一 位兀來表示每個區塊的抹除狀態。對應於該EBM區段中該 等ABL、CBL、或是已抹除區塊清單中所列之區塊位址的 位元均不會於該MAP中被設定為已抹除狀態。 不含有有效資料結構且未被指定為該MAP内之一已抹除 區塊、已抹除區塊清單、ABL或CBL的任何區塊均不會被 該區塊配置演算法使用,所以無法存取用於儲存主機或控 制ί料結構。此提供一種簡單的機制,用以從可存取的快 閃記憶體位址空間中排除具有缺陷位置的區塊。 圖18所示之階層可有效地管理已抹除區塊記錄,並且對 被儲存於該控制器之RAM中的該等區塊位址清單提供完整 的安全性。可以不頻繁的方式在該些區塊位址清單及一或 多個的MAP區段780之間交換已抹除的區塊項目。可於電 源關閉之後,系統初始化期間,經由被儲存於快閃記憶體 中複數個區段中該等已抹除區塊清單及位址轉換表中的資 訊’以及有限地掃描快閃記憶體中少量被參照的資料區 塊,便可重建該些清單。 124919.doc -57- 200837562 用於更新已抹除元區塊記錄之階層所採用的該等演算法 可以下面的順序來配置使用已抹除區塊:將來自該MAP區 塊7 5 0的區塊叢發於位址順序中交錯來自該c B L 7 4 0的區塊 位址叢發,其反映的係區塊被該主機更新的順序。對大部 分的元區塊尺寸與系統記憶體容量而言,單一 MAP區段可 針對該糸統中的所有元區塊提供一位元映射。於此情況 中’已抹除的區塊必定會以和被記錄於此MAP區段中相同 的位址順序來配置使用。 抹除區塊管理操作 如前面所述,ABL 6 10係具有可被配置使用之已抹除元 區塊以及最近被配置為資料更新區塊之元區塊的位址項目 之清單。該ABL中的實際區塊位址數量係介於最大上限與 最小下限之間’上下限兩者均為系統設計變數。製造期間 被格式化的ABL項目數量則與卡片種類及容量成函數關 係。此外’該ABL中的項目數量於接近該系統的壽命終點 時可能會減少’因為可用的已抹除區塊的數量會因為其壽 命期間區塊發生故障而減少。舉例來說,於填充操作之 後,該ABL中的項目便可能會指明可用於下面用途的區 塊。部分被寫入之資料更新區塊的項目係每個區塊_個項 目,其並不會超過同時被開放之更新區塊最大值的系統限 制。已抹除區塊之一至二十個間項目用於可配置成資料更 新區塊。已抹除區塊之之四個項目用於可配置成控制區 塊。 ABL填充操作 124919.doc -58- 200837562 當該abl 610經過配置而耗盡時,其便必須進行再填 充。填充該ABL的其中-項操作係發生於控制寫入操作期 間。當必須配置一區塊,但該ABL所含的已抹除區塊項目 卻不足以配置成-貧料更新區塊或是特定其它的控制資料 更新區塊時便會觸發此項操作。於一控制寫入期間,該 ABL填充操作會與GAT更新操作同時進行。 於一 ABL填充操作期間會發生下面的動作: 1.保留具有目前資料更新區塊之屬性的ABL項目。 2·保留具有已關閉資料更新區塊之屬性的abl項目,除 非該區塊的某個項目正於該同時進行的⑽更新操作中被 寫入,於此情況中則會從該ABL中移除該項目。 3·保留未被配置之抹除區塊的abl項目。 4. 對該ABL進行壓縮,移除因項目移除所建立的間隙, 進而保持項目的順序。 5. 藉由附加來自該刪清單中下次可用的項目以完全填 充該ABL。 6. ABB清單將以ABL中目前的項目進行重寫。 CBL清空操作 之區塊位址的清單, 同。清空該CBL的其 CBL係一由控制器RAM之中已抹除 已抹除區塊項目之數量限制和abL相 中一項操作係發生於控制寫入操作期間。所以,其會與 ABL填充/GAT更新操作、或是⑽區塊寫人操作同時進 行。於一 CBL清空操作中,項目會從該CBl 並且寫入該CBB清單776之中。 740中被移除 124919.doc -59- 200837562 map交換操作 當該EBB清單774已經清空時,於一控制寫入操作期間 便會於該等MAP區段780及該等EBM區段760之抹除區塊資 訊之間週期性進行MAP交換操作。假使該系統中所有已抹 除的元區塊均被記錄於該EBM區段760之中,則沒有MAP 區段780存在且不用實施MAP交換。於一MAP交換操作期 間,一用於將已抹除區塊入給EBB 774的MAP區段會被視 為一來源MAP區段782。相反地,用於從該CBB 776中接收 已抹除區塊的MAP區段則會被視為一目的地MAP區段 784。假使僅有一 MAP區段存在,則其便同時充當來源與 目的地MAP區段,其定義如下。 於一 MAP交換期間會實施下面的動作。 1 ·以遞增指標的方式為基礎,選擇一來源MAP區段。 2·以不在該來源MAP區段中之第一 CBB項目中的區塊位 址為基礎來選擇一目的MAP區段。 3·如該CBB中相關項目所定義的方式來更新該目的map 區段,並且從該CBB中移除該等項目。 4 ·將該已更新的目的MAP區段寫入該MAP區塊之中,除 非沒有分離的來源MAP區段存在。 5.如該CBB中相關項目所定義的方式來更新該來源map 區段,並且從該CBB中移除該等項目。 6_將該CBB中剩餘的項目附加至該EBB之中。 7.利用該來源MAP區段所定義之已抹除區段位址儘可能 地填充該EBB。 124919.doc •60- 200837562 8·將該已更新的來源MAP區段寫入該MAP區塊之中。 9·將一已更新的EBM區段寫入該MAP區塊之中。 清單管理 圏18顯示該控制與目錄資訊於該等各種清單間的分佈與 流動情形。為方便起見,將圖18中用以於該等清單之元件 之間移動項目的操作或是改變項目之屬性的操作標示成下 面的[A]至[〇]。 [A] 當一已抹除區塊被配置成一更新區塊用於主機資料 日寸,位於該ABL中之其項目的屬性便會從已抹除ABl區塊 變成開放更新區塊。 [B] 當一已抹除區塊被配置成一控制區塊時,位於該abl 中之其項目便會被移除。 [c]當建立一具有開放更新區塊屬性的ABL項目時,便會 將-相關原始區塊攔位加入該項目之中,用以記錄欲被更 新之該邏輯群組的原始元區塊位址。此資訊可從該GAT中 取得。 [D]當關閉-更新區塊時,位於該胤中之其項目的屬性 便會從開放更新區塊變成已關閉更新區塊。 富關閉 · * I ^ \*fr4 -Ί7Γ 口Μ /Ψ I η. 塊,而且位於該ABL·中之”口 η <其項目中的相關元區塊攔位的屬 性便會變成已抹除元區塊。 [F]於一 ABL填充操作期p, _ 間 該 片/月間,於相同的控制寫入操作 於該GAT中位址被更新的 ’ 订已關閉更新區塊均會從 ABL中移除其項目。 胃 124919.doc -61 - 200837562 [G] 於一 ABL填充操作期間,當從該ABL中移除一已關閉 更新區塊的項目時,便會將其相關的已抹除原始區塊的項 目移至該CBL之中。 [H] 當抹除一控制區塊時,便會將其項目加入該CBL之 中〇 [I] 於一 ABL填充操作期間,已抹除的區塊項目會從該 EBB清單中被移至該ABL,並且被賦予已抹除ABL區塊的 屬性。 [J] 於一 ABL填充操作期間修改所有相關的ABL項目之 後,該ABL中的該等區塊位址便會替代該ABB清單中的該 等區塊位址。 [K] 於控制寫入期間和一 ABL填充操作同一時間,該CBL 中已抹除區塊的項目會被移至該CBB清單中。 [L] 於一 MAP交換操作期間,所有相關的項目均會從該 CBB清單移至該MAP目的地區段。 [M] 於一 MAP交換操作期間,所有相關的項目均會從該 CBB清單移至該MAP來源區段。 [N] 接續[L]與[M],於一MAP交換操作期間,所有剩餘的 項目均會從該CBB清單移至該EBB清單。 [O] 接續[N],於一 MAP交換操作期間,可能的話,於[M] 中被移動之項目以外的項目均會從該MAP來源區段中被移 動以填充該EBB清單。 邏輯至實艎位址轉換 為於快閃記憶體中定位一邏輯區段的實體位置,圖2所 124919.doc -62- 200837562 示之邏輯至實體位址轉換模組1 4〇會實施邏輯至實體位址 轉換。除了最近被更新的那些邏輯群以外,可利用駐存於 該快閃記憶體200中的群位址表(GAT)或是控制器RAM 130 中的GAT快取來實施整批轉換。對最近被更新的邏輯群進 行位址轉換將會需要查找主要駐存於控制器RAM 130中之 更新區塊的位址清單。所以,針對一邏輯區段位址所進行 的邏輯至實體位址轉換的程序會取決於和該區段所在之邏 輯群相關的區塊類型。區塊的類型如下··完整區塊、序列 資料更新區塊、雜亂資料更新區塊、已關閉資料更新區 塊。 圖19為顯示邏輯至實體位址轉換的程序之流程圖。基本 上’藉由先使用該邏輯區段位址來查找各個更新目錄(例 如該開放更新區塊清單及該關閉更新區塊清單)來定位該 對應的元區塊與該實體區段。假使該相關的元區塊並非係 一更新程序的一部分,則會由該GAT來提供目錄資訊。邏 輯至實體位址轉換的步驟如下: 步驟800 :提供一邏輯區段位址。 步驟810 :於控制器ram中該開放更新區塊清單614(參 見圖15與18)中查找給定邏輯位址。假使查找失敗的話, 便進入步驟820,否則便進入步驟830。 步驟820 :於該已關閉區塊清單616中查找給定邏輯位 址。若查找失敗的話,該給定邏輯位址便並非係任何更新 程序的一部分;進入步驟87〇,進行GAT位址轉換。否則 便進入步驟860,進行已關閉更新區塊位址轉換。 124919.doc -63- 200837562 步驟830 :假使含有該給定邏輯位址的更新區塊係循序 的話,進入步驟840,進行循序更新區塊位址轉換。否則 便進入步驟850,進行雜亂更新區塊位址轉換。 步驟840 ·•利用循序更新區塊位址轉換來取得該元區塊 位址。進入步驟880。 步驟850 :利用雜亂更新區塊位址轉換來取得該元區塊 位址。進入步驟880。 步驟860 :利用已關閉更新區塊位址轉換來取得該元區 塊位址。進入步称880。 步驟870 :利用群位址表(GAT)轉換來取得該元區塊位 址。進入步驟880。 步驟880 :將該元區塊位址轉換成一實體位址。該轉換 方法會取決於該元區塊是否已經被重新連結。 步驟890:已取得實體區段位址。 下文將更詳細說明該等各種位址轉換程序: 循序更新區塊位址轉換(步驟840) 從該開放更新區塊清單614(參見囷15與18)中之資訊便 T直接元成和一循序更新區塊相關的邏輯群組中之目標邏 輯區段位址的位址轉換,其方式如下。 1 ·從該清單中’’頁面標籤”與”已寫入的區段數,,等欄位中決 定該目標邏輯區段究竟係位於該更新區塊之中或是其相關 聯的原始區塊之中。 2. 從邊清單中碩取適合該目標邏輯區段的元區塊位址。 3. 從該適當的’’頁面標籤”攔位中決定該元區塊内之該區段 124919.doc -64- 200837562 位址。 雜亂更新區塊位址轉換(步驟850) 和一雜IL更新區塊相關的邏輯群組中之目標邏輯區段位 址的位址轉換序列如下。 1·假使從RAM中的雜亂區段清單中決定出該區段係一最 近被寫入的區段的話,從其在此清單中的位置便可直接完 成位址轉換。 2.遠CBI區塊中該最近被寫入的區段會於其雜亂區塊資 料爛位中含有和該目標邏輯區段位址有關的該雜亂更新區 塊的實體位址。其還會於其間接區段索引攔位中含有和此 雜亂更新區塊有關的最後被寫入的CBI區段的cbi區塊内 的偏移(參見圖16A-16E)。 3·該些欄位中的資訊均會被快取於ram之中,而不需要 於後續的位址轉換期間來讀取該區段。 4·項取於步驟3處由該間接區段索引欄位識別的CBI區 段。 5 ·將最近被存取之雜亂更新子群的直接區段索引欄位快 取於RAM之中,而不需要實施步驟4處的讀取以重複存取 相同的雜亂更新區塊。 6·於步驟4或步驟5處所讀取的直接區段索引欄位接著便 可識別和含有该目標邏輯區段位址之該邏輯子群有關的該 C BI區段。 7·從於步驟6中所識別的CBI區段中讀取該目標邏輯區段 位址的雜亂區塊索引項目。 124919.doc -65- 200837562 8 ·該最近被讀取之雜亂區塊索引欄位可被快取於控制器 RAM之中,而不需要實施步驟4與步驟7處的讀取以重複存 取相同的邏輯子群。 9·該雜亂區塊索引項目會於該雜亂更新區塊或該相關聯 的原始區塊中定義該目標邏輯區段的位置。假使該目標邏 輯區段之有效副本係位於該原始區塊中的話,便可使用該 原始元區塊與頁面標籤資訊來定位該有效副本。 已關閉更新區塊位址轉換(步驟860) 從該已關閉區塊更新清單(參見圖18)中之資訊便可直接 完成和一已關閉更新區塊相關的邏輯群組中之目標邏輯區 段位址的位址轉換,其方式如下。 1 ·從該清單中讀取被指派給該目標邏輯群組的元區塊位 址0 2 ·>[足该清單的π頁面標籤”攔位中決定該元區塊内之該區 段位址。 GAT位址轉換(步驟87〇) 假使一邏輯群組未被該開放更新清單或已關閉更新清單 參照’則’其在該GAT中的項目便係有效的。被該GAT參 照的邏輯群組中之目標邏輯區段位址的位址轉換序列如 下。 1·估算RAM中該等可用的gat快取的範圍,用以決定該 目標邏輯群組的一項目是否内含於一 gat快取之中。 2·假使於步驟1中發現該目標邏輯群組,則該GAT快取便 含有完全的群位址資訊,其同時包含元區塊位址和頁面標 124919.doc -66 - 200837562 籤在内,允許進行該目標邏輯群組位址的轉換。 3 ·假使該目標位址並不位於一 G AT快取之中,則必須讀 取該目標G AT區塊的G AT索引,以便識別和該目標邏輯群 組位址有關之G AT區段的位置。 4·將最後被存取之GAT區塊的GA丁索引保存在控制器 RAM之中,並且可進行存取而不需要從快閃記憶體中讀取 一區段。 5 .將每個GAT區塊之元區塊位址及被寫入每個gat區塊 之中的區段數量的一清單保存在控制器RAM之中。假使步 驟4處無法取得必要的GAT索引的話,便可立刻從快閃記 憶體之中讀取。 6 ·從步驟4或步驟6處所獲得的GAT索引所定義的G AT區 塊中的區段位置中讀取和該目標邏輯群位址有關的GAT區 段。利用含有該目標項目之區段的一部分來更新一 GAT快 取。 7·從該目標GAT項目内的元區塊位址攔位與”頁面標籤” 攔位中取得該目標區段位址。 元區塊至實體位址轉換(步驟880) 假使和該元區塊位址相關的旗標表示該元區塊已經被重 新連結,則從該BLM區中讀取相關的LT區段,以便決定該 目標區段位址的抹除區塊位址。否則,便從該元區塊位址 中直接決定該抹除區塊位址。 控制資料管理 囷20說明於該記憶體管理操作進程中對控制資料結構所 124919.doc -67· 200837562 實施的知作的階展-立 白s不忍圖。資料更新管理操List in Ram. During the control write operation, the subset of items in the list is moved to a section in the group address table. The Group Address Table (GAT) is a list of metablock addresses for all logical groups of host data in the system. The GAT contains one item for each logical group arranged in order according to logical addresses. The nth item in the GAT contains the metablock address of the logical group of the address η. In the preferred embodiment, it is a table in flash memory that includes a set of segments (referred to as GAT segments), wherein the items define each logical group in the memory system. Metablock address. The GAT segment is located in one or more dedicated control blocks (referred to as G AT blocks) in the flash memory. Figure 17A illustrates the data block of a group of address table (GAT) segments. A QAT segment may have, for example, sufficient capacity to contain one of 128 consecutive logical groups of G AT items. The parent G AT segment contains two components, a gAT project set for the metablock address of each logical group within a certain range, and a GA Ding segment index. The first component contains information for locating metablocks associated with logical addresses. The second component contains information for locating all valid GAT segments within the GAT block. Each GAT project has three barriers, which are replaced by: metablock number; page label, as previously matched with 囷3A(in), and flag, which indicates whether the metablock is Has been reconnected. The GAT sector index lists the location of a valid GAT segment in a GAT block. This index is in each G AT segment, but is replaced by the version of the next write GAT segment in the GAT block. Therefore, only the version in the last written GAT section is valid. Figure 17B illustrates an example of such a group location 124919.doc - 51 - 200837562 address table (GAT) section to be recorded in one or more GAT blocks. The GAT block is a metablock dedicated to recording the gat section. When a GAT segment is updated, it is written to the next available physical segment location in the GAT block 720. Therefore, there may be multiple copies of a gat section in the gat block, and only the copy that was last written is valid. For example, the GAT segment 255 (which contains the metrics for logical groups LG3968 through LG4 〇 98) has been updated at least twice, with the latest version being a valid version. The location of each active segment in the GAT block can be identified by an index set in the last written GAT region 4 in the block. In this example, the last written gaT segment in the block is gAT segment 236 and its index set is a valid index set that replaces all previous index sets. When the G AT block is finally fully filled with the GAT segment, the block is compressed during a control write operation by rewriting all valid segments to a new block location. Then erase the full block. As explained above, a GAT block contains a group of logical address spaces, and one logically contiguous set of items. The GAT segment within a GAT block is used for logical-to-entity mapping of 128 consecutive logical groups. The number of GAT segments required to store an item of all logical groups within the address range traversed by a GAT block occupies only a portion of the total segment location in the block. Therefore, the section can be updated by writing a GAT section to the block and using the section location. The index of all valid gat segments and their locations in the gat block is maintained in an index block in the most recently written GAT segment. The portion of the total segment occupied by a valid gAT segment in a GAT block is a system design parameter, which is typically 25/〇. However, there are up to 64 valid GAT zones in each GAT block 124919.doc -52- 200837562. In systems with large logical capacity, it may be desirable to store the gat section in more than one GAT block. In this case, each GAT block is associated with a fixed range of logical groups. The GAT update controls a portion of the write operation that is triggered when the abl is used to configure the block (see Figure 18). It is implemented simultaneously with the ABL filling and CBL emptying operations. During the GAT update operation, a GAT segment has items that are updated with the greed of the corresponding item in the self-closing update block list. When updating a GAT project, any corresponding project can be removed from the Closed Update Block List (CUBL). For example, the G AT segment to be updated may be selected according to the first item in the closed update block list. The updated section is written to the next available location in the gat block. When no segment location is available for the updated GAT segment, the GAT rewrite operation occurs during a control write operation. A new GAT block is configured, and the valid GAT segment as defined by the GAT index is copied from the full GAT block in a sequential order. Then erase the full GAT block. A GAT cache is a copy of the controller ARM 130 of the item in the breakdown of 128 items in the GAT segment. The number of GAT cache items is a system design parameter with a typical value of 32. Each time a project is read from a GAT session, a GAT cache is created for that section. Maintain multiple G AT caches. This number is a design parameter with a typical value of four. Based on the least recently used method, a GAT cache is rewritten using a different section of the project. Metablock Management has been erased 124919.doc -53- 200837562 The erase block manager 1 60 shown in Figure 2 uses a list of directories to store directory and system control information for managing erase blocks. The lists are distributed among the controller RAM 130 and the flash memory 200. When it is necessary to configure an erased metablock to store user data or store the system control data structure, it is selected in the configuration block list (ABL) (see Figure 15) that is retained in the controller RAM. Available metablock numbers. Similarly, when a unary block is erased after it has been decommissioned, its number is added to the list of cleared blocks (cbl) that are also retained in the controller RAM. The control data will be stored in the Flash. The list includes the erased block list, and a bit map listing the erased states of all the metablocks in the flash. The erased block list and MAP are stored in individual segments and recorded in a dedicated metablock (called a MAP metablock). These lists are distributed among the controller RAM and flash memory, which provides an erased block record hierarchy to effectively manage the use of erased metablocks.囷18 is a schematic block diagram illustrating the distribution and flow of control and catalog information for the use and recycling of erased blocks. The control and directory data will be stored in a plurality of lists that are retained in the controller RAM 130 or retained in the MAP block 750 resident in the flash memory 200. . In the preferred embodiment, the controller RAM 130 retains the configuration block list (ABL) 610 and a cleared block list (CBL) 740. As previously described in connection with Figure 15, the configuration block list (ABL) 124919.doc -54· 200837562 tracks the metablocks that were recently configured to store user data or storage system control lean structures. When a new erased metablock needs to be configured, the next available metablock number is selected in the configuration block list (ABL). Similarly, the cleared block list (cbl) can be used to track updated metablocks that have been deconfigured and erased. Both the ABL and CBL are retained in the Control RAM 13 0 (see 囷1) for quick access and easy manipulation while tracking these very active update blocks. The configuration block list (ABL) tracks the pool of an erased metablock and configures the erased metablocks into an update block. Thus, each of the metablocks that can be described by an attribute indicates whether it is an erased block, an open update block, or a closed update in the upcoming configuration of the ABL. Block. It is shown in Fig. 18 that the Abl contains an erased ABL list 6 12, an open update block list 614, and a closed update block list 6 16 . In addition, associated with the Open Update Block List 6.4 is the associated original block list 615. Similarly, the associated erased block list 6丨7 is associated with the list of closed update blocks. As shown in the previous section 15, the related lists are a subset of the open update block list 614 and the closed update block list 616, respectively. The erased ABL block list 612, the open update block list 614, and the closed update block list 61 6 are all a subset of the configured block list (abl) 6 10, in each Projects each have corresponding attributes. The MAP block 750 is a metablock for flash memory 200 dedicated to storing erase management records. The MAP block stores a plurality of consecutive MAP block segments, each of which is an erase block management (ebm) 124919.doc -55-200837562 segment 760 or a MAP segment 780 . When the erased block has been configured and looped when the unary block is decommissioned, the related control and directory information is preferably included in a logical segment, and the logical segment is available in the MAP. The block is updated, and each updated data instance is recorded into a new block segment. There may be multiple copies of the plurality of EBM segments 760 and the plurality of MAP segments 780 among the MAP blocks 750, only the latest version is valid. An index of the location of the valid MAP segments is included in a field of the EMB block. During a control write operation, a valid EMB section must be written to the MAP block at the end. When the MAP block 75 0 is fully loaded, it can be compressed during control of the write operation by overwriting all active sectors to a new block location. Then erase the full block. Each EBM section 760 contains an erased block list (EBL) 770, which is a list of the addresses of the subset of the erased blocks. The erased block list (EBL) 770 can serve as a buffer containing the erased metablock number from which the metablock number can be periodically re-populated to refill the ABL, and periodically The metablock number is added to re-empt the CBL. The EBL 770 can act as a buffer for use as an available block buffer (ABB) 772, an erased block buffer (EBB) 774, and a cleared block buffer (CBB) 776. The Available Block Buffer (ABB) 772 contains a copy of the items located in the ABL 610 immediately following the previous ABL fill operation. In fact, it is a backup copy of the ABL after the ABL fill operation. The erased block buffer (EBB) 774 contains a plurality of erased block bits 124919.doc - 56 - 200837562, which were previously transmitted from the MAP segment 78 or the CBB list 776 (description As follows, and can be transferred to the ABL 610 during an ABL fill operation. The beta divide block buffer (CBB) 776 contains the address of the erased block, which is during a CBL flush operation. It is transmitted from the CBL 74〇 and will be transmitted to the MAP section 78 or the EBB list 774. Each of the MAP segments 780 contains a bit map structure called MAp. The MAP uses a bit for each metablock in the flash memory to indicate the erase status of each block. Bits corresponding to the block addresses listed in the ABL, CBL, or erased block list in the EBM section are not set to the erased state in the MAP. Any block that does not contain a valid data structure and is not designated as one of the erased block, erased block list, ABL or CBL in the MAP will not be used by the block configuration algorithm, so it cannot be saved. Take to store the host or control the structure. This provides a simple mechanism for excluding blocks with defective locations from the accessible flash memory address space. The hierarchy shown in Figure 18 effectively manages the erased block records and provides complete security for the list of block addresses stored in the controller's RAM. The erased block items can be exchanged between the block address list and one or more MAP segments 780 in an infrequent manner. After the power is turned off, during the system initialization, the information in the erased block list and the address translation table stored in the plurality of sectors in the flash memory is 'limitedly scanned in the flash memory. A small number of referenced data blocks can be used to reconstruct these lists. 124919.doc -57- 200837562 The algorithms used to update the hierarchy of erased metablock records can be configured in the following order using the erased block: the region from the MAP block 7 50 The block plexes are interleaved in the address sequence from the chunk address of the cBL 704, which reflects the order in which the tiers are updated by the host. For most metablock sizes and system memory capacities, a single MAP segment can provide a one-bit map for all metablocks in that system. In this case, the erased block must be configured for use in the same address order as recorded in this MAP segment. Erase Block Management Operations As mentioned earlier, the ABL 6 10 has a list of address locations that can be configured to use erased metablocks and metablocks that have recently been configured as data update blocks. The actual number of block addresses in the ABL is between the upper and lower limits. Both upper and lower limits are system design variables. The number of ABL items formatted during manufacturing is a function of card type and capacity. In addition, the number of items in the ABL may decrease near the end of the life of the system' because the number of available erased blocks is reduced due to the failure of the block during its lifetime. For example, after the fill operation, the items in the ABL may indicate the blocks available for the following purposes. The items of the data update block that are partially written are each block_item, which does not exceed the system limit of the maximum number of update blocks that are simultaneously open. One of the blocks has been erased to twenty items for configurable data update blocks. The four items of the erased block are used to be configurable as control blocks. ABL Fill Operation 124919.doc -58- 200837562 When the abl 610 is configured to run out, it must be refilled. The one-of-item operation that populates the ABL occurs during the control write operation. This operation is triggered when a block must be configured, but the erased block item contained in the ABL is not sufficient to be configured as a poor block update block or a specific other control data update block. During a control write, the ABL fill operation is performed concurrently with the GAT update operation. The following actions occur during an ABL fill operation: 1. Keep the ABL project with the attributes of the current data update block. 2. Keep the abl item with the attributes of the closed data update block, unless an item of the block is being written in the simultaneous (10) update operation, in which case it will be removed from the ABL. this project. 3. Keep the abl item of the unconfigured erase block. 4. Compress the ABL to remove the gap created by the item removal, thus maintaining the order of the items. 5. Completely fill the ABL by appending the next available item from the deleted list. 6. The ABB list will be rewritten with the current project in ABL. The list of block addresses for the CBL clear operation, the same. The CBL system that empties the CBL is erased by the controller RAM. The number of erased block items and the one of the abL phases occur during the control write operation. Therefore, it will be performed simultaneously with the ABL fill/GAT update operation or (10) block write operation. In a CBL flush operation, the project will be from the CBl and written to the CBB list 776. Removed from 740 124919.doc -59- 200837562 map exchange operation When the EBB list 774 has been emptied, the MAP segments 780 and the EBM segments 760 are erased during a control write operation. The MAP exchange operation is periodically performed between the block information. If all erased metablocks in the system are recorded in the EBM section 760, then no MAP section 780 exists and no MAP exchange is required. During a MAP exchange operation, a MAP segment for entering the erased block into EBB 774 is considered a source MAP segment 782. Conversely, the MAP segment used to receive the erased block from the CBB 776 is considered a destination MAP segment 784. If only one MAP segment exists, it acts as both the source and destination MAP segments, as defined below. The following actions are performed during a MAP exchange. 1 • Select a source MAP segment based on the incremental indicator. 2. Select a destination MAP segment based on the block address in the first CBB project that is not in the source MAP segment. 3. Update the destination map section in the manner defined by the relevant project in the CBB and remove the items from the CBB. 4. Write the updated destination MAP segment to the MAP block unless there is no separate source MAP segment. 5. Update the source map section in the manner defined by the relevant project in the CBB and remove the items from the CBB. 6_Add the remaining items in the CBB to the EBB. 7. Fill the EBB as much as possible with the erased sector address defined by the source MAP section. 124919.doc •60- 200837562 8·Write the updated source MAP segment into the MAP block. 9. Write an updated EBM section into the MAP block. Inventory Management 圏18 displays the distribution and flow of this control and catalog information between these various lists. For the sake of convenience, the operations for moving items between components of the list or changing the attributes of the items in Fig. 18 are indicated as follows [A] to [〇]. [A] When an erased block is configured as an update block for host data, the attributes of its items in the ABL will be changed from the erased AB1 block to the open update block. [B] When an erased block is configured as a control block, its items in the abl are removed. [c] When an ABL project with open update block attributes is created, the associated original block block is added to the project to record the original metablock of the logical group to be updated. site. This information can be obtained from this GAT. [D] When the block is closed-updated, the properties of its project located in the file change from the open update block to the closed update block. Rich off · * I ^ \*fr4 -Ί7Γ 口Μ /Ψ I η. Block, and located in the ABL·“口η< the attributes of the related metablocks in the project will become erased [F] In an ABL fill operation period p, _ between the pieces / month, in the same control write operation in the GAT address is updated 'book closed closed update block will be from the ABL Remove the item. Stomach 124919.doc -61 - 200837562 [G] During an ABL fill operation, when an item that has closed the update block is removed from the ABL, its associated erased original is The block project is moved to the CBL. [H] When a control block is erased, its project is added to the CBL. [I] Blocks that have been erased during an ABL fill operation. The item will be moved from the EBB list to the ABL and assigned the attributes of the erased ABL block. [J] After modifying all relevant ABL items during an ABL fill operation, the blocks in the ABL The address will replace the block address in the ABB list. [K] The CBL is controlled at the same time as an ABL fill operation. Items in the erased block will be moved to the CBB list. [L] During a MAP exchange operation, all related items will be moved from the CBB list to the MAP destination section. [M] Yu Yi During the MAP exchange operation, all related items will be moved from the CBB list to the MAP source section. [N] Continue [L] and [M], during the MAP exchange operation, all remaining items will be from this The CBB list is moved to the EBB list. [O] Next [N], during a MAP exchange operation, if possible, items other than the item moved in [M] will be moved from the MAP source section. Populate the EBB list. The logical-to-real address is converted to the physical location of a logical segment in the flash memory. Figure 2: 124919.doc -62- 200837562 shows the logical-to-physical address translation module 1 4 Logic-to-physical address translation is implemented. In addition to those logical groups that have been recently updated, the group address table (GAT) resident in the flash memory 200 or the GAT in the controller RAM 130 can be utilized. Take the implementation of the batch conversion. Address translation of the recently updated logical group will It is necessary to look up the address list of the update block that is mainly resident in the controller RAM 130. Therefore, the logic-to-physical address conversion procedure for a logical sector address depends on the logical group in which the sector is located. Related block types: The types of blocks are as follows: • Complete block, sequence data update block, messy data update block, closed data update block. Figure 19 shows the flow of the program showing logical to physical address translation. Figure. Basically, the corresponding metablock and the physical section are located by first using the logical sector address to find each update directory (e.g., the open update block list and the closed update block list). If the associated metablock is not part of an update procedure, the catalog information will be provided by the GAT. The procedure for logical to physical address translation is as follows: Step 800: Provide a logical sector address. Step 810: Look up the given logical address in the open update block list 614 (see Figures 15 and 18) in the controller ram. If the search fails, then step 820 is entered, otherwise step 830 is entered. Step 820: Look up the given logical address in the closed block list 616. If the search fails, the given logical address is not part of any update procedure; go to step 87 and perform a GAT address translation. Otherwise, proceeding to step 860, the updated update block address translation is performed. 124919.doc -63- 200837562 Step 830: If the update block containing the given logical address is sequential, proceed to step 840 to perform sequential update block address translation. Otherwise, proceed to step 850 to perform a messy update block address translation. Step 840 ·• Use the sequential update block address translation to obtain the metablock address. Proceed to step 880. Step 850: Acquire the metablock address by using a hash update block address translation. Proceed to step 880. Step 860: Acquire the metablock address by using the closed update block address translation. Enter the step called 880. Step 870: The group address table (GAT) conversion is used to obtain the metablock address. Proceed to step 880. Step 880: Convert the metablock address into a physical address. The conversion method will depend on whether the metablock has been rejoined. Step 890: The physical sector address has been obtained. The various address translation procedures are described in more detail below: Sequential Update Block Address Translation (Step 840) From the Open Update Block List 614 (see 囷 15 and 18), the information is directly converted into a sequence. The address translation of the target logical sector address in the logical group associated with the block is updated in the following manner. 1 · From the list of ''page tags' and 'number of segments written, and other fields determine whether the target logical segment is in the update block or its associated original block Among them. 2. From the side list, retrieve the metablock address that is appropriate for the target logical section. 3. Determine the sector 124919.doc -64-200837562 address in the metablock from the appropriate 'Page Label' block. The messy update block address translation (step 850) and a miscellaneous IL update The address translation sequence of the target logical sector address in the logical group associated with the block is as follows: 1. If it is determined from the list of messy sectors in the RAM that the sector is a recently written sector, The location in this list can directly complete the address translation. 2. The most recently written segment in the far CBI block will contain the target logical segment address in its messy block data corruption. The physical address of the hash update block. It also contains an offset in the cbi block of the last written CBI segment associated with the hash update block in its indirect segment index block (see figure) 16A-16E) 3. The information in these fields will be cached in the ram without reading the segment during the subsequent address conversion. The indirect section index field identifies the CBI section. 5 · The recently accessed messy update subgroup The direct segment index field is cached in RAM without the need to perform the read at step 4 to repeatedly access the same cluttered update block. 6. Direct segment index read at step 4 or step 5. The field can then identify the C BI section associated with the logical subgroup containing the target logical sector address. 7. Read the target logical sector address from the CBI section identified in step 6. The messy block index item 124919.doc -65- 200837562 8 · The recently read messy block index field can be cached in the controller RAM without performing the steps 4 and 7 The same logical subgroup is repeatedly accessed. 9. The hash block index item defines the location of the target logical segment in the hash update block or the associated original block. If the target logical segment The valid copy is located in the original block, and the original metablock and page tag information can be used to locate the valid copy. The updated block address translation is closed (step 860). The list is updated from the closed block. (See Figure 18) Directly completing the address translation of the target logical sector address in the logical group associated with the closed update block, as follows: 1) Reading the metablock assigned to the target logical group from the list The address of the sector in the metablock is determined in the address 0 2 ·>[the π page label of the list]. GAT Address Translation (Step 87) A project in the GAT is valid if a logical group is not referenced by the Open Update List or the Closed Update List. The address translation sequence of the target logical sector address in the logical group referenced by the GAT is as follows. 1. Estimate the range of such available gat caches in the RAM to determine if an item of the target logical group is contained within a gat cache. 2. If the target logical group is found in step 1, the GAT cache contains the complete group address information, which includes both the metablock address and the page label 124919.doc -66 - 200837562. The conversion of the target logical group address is allowed. 3. If the target address is not located in a G AT cache, the G AT index of the target G AT block must be read to identify the G AT segment associated with the target logical group address. position. 4. The GA-butyl index of the last accessed GAT block is stored in the controller RAM and can be accessed without having to read a segment from the flash memory. 5. A list of the metablock addresses of each GAT block and the number of extents written into each of the gat blocks is stored in the controller RAM. If the necessary GAT index cannot be obtained at step 4, it can be read from the flash memory immediately. 6. Read the GAT segment associated with the target logical group address from the segment location in the G AT block defined by the GAT index obtained at step 4 or step 6. A GAT cache is updated with a portion of the section containing the target item. 7. Obtain the target segment address from the metablock address block and the "page tag" block in the target GAT project. Metablock to physical address translation (step 880). If the flag associated with the metablock address indicates that the metablock has been rejoined, the associated LT segment is read from the BLM region to determine The erase block address of the target sector address. Otherwise, the erase block address is directly determined from the metablock address. Control Data Management 囷20 describes the implementation of the knowledge structure of the control data structure in the process of the memory management operation - the singularity of the white paper. Data update management

Ram之巾的各個 ▼作處置駐存在 等各個;h: w 作處置㈣記憶體中該 寺各個控制貧料區段 莖生〜u X及專屬&塊’而且亦與RAM中的該 # h早父換資料。 針對ABL、CBL、以及該雜亂區段清單來實施 男枓更新管理操作。當—已抹除區塊被配置為―更新區塊 或控制區塊時’或是關閉—更新區塊時更新該ABL。當抹 除-控制區塊時,或是將一已關閉的更新區塊的一項:寫 入至該GAT之中時,更新該CBL。當一區段被寫入至一雜 亂更新區塊之中時,更新該更新雜亂區段清單。 一控制寫入操作使得來自Ram中之控制資料結構的資訊 被寫入至快閃記憶體中的控制資料結構之中,必要時會隨 之更新快閃記憶體與RAM之中其它支援的控制資料結構。 當該ABL不含欲被配置為更新區塊的已抹除區塊的任何項 目時,或是重寫該CBI區塊時,便會觸發該項操作。 於該較佳的具體實施例中,該ABL填充操作、該CBL清 空操作、以及該EBM區段更新操作均會在每個控制寫入操 作期間實施。當含有該EBM區段的MAP區塊變成滿載時, 便會將有效的EBM與MAP區段複製至一已配置的已抹除區 塊之中,並且抹除該先前的MAP區塊。 在每個控制寫入操作期間寫入一 GAT區段,並且相應地 修改該已關閉更新區塊清單。當一 GAT區塊變成滿載時, 便會實施一 GAT重寫操作。 如先前所述’特定雜亂區段寫入操作之後’便會寫入一 124919.doc -68- 200837562 CBI區段。當該CBI區塊變成滿載時,便會將有效的cbj區 段複製至一已配置的已抹除區塊之中,並且抹除該先前的 CBI區塊。 如先前所述,當該EBM區段中的EBB清單中沒有任何其 它已抹除區塊項目時,便會實施一 MAP交換操作。 於該MAP區塊被重寫的每個時機,一 MAp位址(MApA) 區段(其A錄该MAP區塊的目前位址)被寫入至一專屬的 MAPA區塊之中。當該MAPA區塊變成滿載時,便會將有 效的MAPA區段複製至一已配置的已抹除區塊之中1並且 抹除該先前的MAPA區塊。 於該MAPA區塊被重寫的每個時機,一開機(b〇叫區段 被寫入至-目前的開機區塊之中。當該開機區塊變成滿載 時,便會將有效的開機區段從該開機區塊的目前版本中複 製至備份版本,接著該備份版本便會成為目前的版本。先 前的目前版本會被抹除並且成為該備份版本,而該有效的 開機區段則會被寫回其中。 / K 控制資料完整性及管理 控制資料範例係和該記憶體區塊管理系統相關的 --一小、Τ«開以;/日琢貝 ,與區:鬼配置資訊,例如結合圓2〇所述者。如先前所述, 讀:貝料會同時被保留在高速㈣細與較慢速的非揮發 ^己fe、體區塊之中。任何頻繁改變的控制資料均會被保留 f :中,其會進行週期性控制寫心用以更新被儲存 在一非揮發性元區 眘粗伟“ 貧訊。依此方式,該控制 ^ θ ?料於非揮發性但較慢速的㈣記憶體之中, 124919.doc •69- 200837562Each of the Ram's towels is used for disposal, etc.; h: w for disposal (4) in the memory, the temple controls the lean section of the temple to produce ~u X and exclusive & block 'and also with the #h in RAM Early father changed the information. A male update management operation is implemented for the ABL, CBL, and the list of messy sections. The ABL is updated when the erased block is configured as an "update block or control block" or when the block is closed. The CBL is updated when the control block is erased, or when an item of a closed update block is written into the GAT. The updated hashed list is updated when a sector is written into a messy update block. A control write operation causes information from the control data structure in the Ram to be written into the control data structure in the flash memory, and if necessary, the flash memory and other supported control data in the RAM are updated accordingly structure. This operation is triggered when the ABL does not contain any items of the erased block that are to be configured to update the block, or when the CBI block is overwritten. In the preferred embodiment, the ABL fill operation, the CBL clear operation, and the EBM sector update operation are all performed during each control write operation. When the MAP block containing the EBM section becomes full, the valid EBM and MAP segments are copied into a configured erased block and the previous MAP block is erased. A GAT zone is written during each control write operation and the closed update block list is modified accordingly. When a GAT block becomes full, a GAT rewrite operation is performed. A 124919.doc -68-200837562 CBI section is written as described previously for the 'special hash sector write operation'. When the CBI block becomes full, the valid cbj segment is copied into a configured erased block and the previous CBI block is erased. As previously described, a MAP exchange operation is performed when there are no other erased block items in the EBB list in the EBM section. At each timing when the MAP block is rewritten, a MAp address (MApA) sector (whose A records the current address of the MAP block) is written into a dedicated MAPA block. When the MAPA block becomes full, the valid MAPA segment is copied into a configured erased block 1 and the previous MAPA block is erased. At each timing when the MAPA block is rewritten, a boot (b squad section is written to the current boot block. When the boot block becomes full, a valid boot area is used. The segment is copied from the current version of the boot block to the backup version, and then the backup version becomes the current version. The previous current version will be erased and become the backup version, and the valid boot sector will be Write back to it. / K Control data integrity and management control data examples related to the memory block management system - a small, Τ « open; / day mussel, and district: ghost configuration information, such as combined Round 2〇. As mentioned earlier, reading: the bait material will be retained in the high-speed (four) fine and slower non-volatile ^fe, body block. Any frequently changed control data will be In the case of retaining f:, it will periodically control the writing core to update the stored in a non-volatile meta-area. "In this way, the control ^ θ is expected to be non-volatile but slower. Among the (four) memories, 124919.doc •69- 200837562

無需進行頻繁存取。複數個控制資料結構(例如囷2〇中所 不的gat、CBI、MAP、以及MAPA)的—階層會被保留在 快閃記憶體之中。因此’ 一控制寫入操作便會讓來自RAM 中之控制資料結構的資訊去更新快閃記憶體中等效的控制 資料結構。 ' 如配合囷2G所述般,該區塊管理系、統於其操作期間會在 陕閃圯憶體中保存一控制資料集。此控制資料集會以類似 主機資料被儲存於該等元區塊之中。就此而言,該控制資 料本身將會進行區塊管理,而且將會進行更新,從而會進 行廢棄項目收集操作。 前面還提及有-控制資料階層存在,其中較低階層中的 控制資料的更新會高於上層。舉例來說,假設每個控制區 塊均具有N個控制區段來寫入,那麼通常會發生下面的控 制更新與控制區塊再配置序列。再度參考囷2〇,㈣: CBI更新便會填滿該CBI區塊且觸發一 cbi再配置(重寫)與 一 MAP更新。假使該雜亂區塊關閉,則其還會觸發gat更 新。每次GAT更新均會觸發一 MAP更新。每n&gAT更新 便會填滿該區塊且觸發一 GAT區塊再配置。此外,當一 MAP區塊滿載時,其還會觸發一 MAp區塊再配置與一 MAPA區塊(若存在的話,否則開機區塊便會直接指向 map)更新。此外,當— MAPA區塊滿载時,其還會觸發一 MAPA區塊再配置、一開機區塊更新與_ MAp更新。此 外’當一開貞區塊滿載時,其便會觸發將一作用中開機區 塊再配置成另一開機區塊。 124919.doc -70- 200837562 更新區塊替代方案 依據本發明之另一方面,在採用區塊管理系統之非揮發 性記憶體中,針對支援同時開啟用於記錄資料的最多第一 預定最大數目之更新區塊的系統實施改良區塊管理方案。 更新區塊主要係循序更新區塊,其中以邏輯循序順序記錄 資料’但允許最多第二預定最大數目之更新區塊係雜亂更 新區塊’其中未以邏輯循序順序記錄資料。無論何時更新 區塊之新配置可使更新區塊之集區超過第一或第二預定最 大數目’將關閉及移除集區内現有更新區塊之一,以便符 合限制。關閉更新區塊前,其資料係合併成循序區塊。改 良方案係避免循序更新可導致額外數目之雜亂區塊合併的 情況。此係藉由將循序更新區塊及雜亂更新區塊分離至個 別替換或組合集區内而完成。特定言之,當循序更新使新 更新區塊之配置超過第一預定最大數目時,集區之最近最 少使用之循序更新區塊係優先挪出空間。 當前系統中,一般存在兩種類型之資料:使用者資料及 控制資料。通常以邏輯循序順序將使用者資料從主機傳送 至記憶體系統。循序更新區塊係配置成最佳地程序來自主 機之循序寫入操作。使用者資料亦可呈邏輯非循序順序, 特別係在隨後更新邏輯資料時。雜亂更新區塊係建立成以 非循序順序最佳地程序資料。另一雜亂或非循序資料之來 源係藉由檔案系統或記憶體系統保持之控制資料,例如在 儲存使用者資料過程中產生的檔案及目錄資訊。 符合支援最多最大數目之同時開啟更新區塊的實際系統 124919.doc -71 - 200837562 限制的先前方案係關閉集區内之最近最少使 塊,無論其係循序或雜亂。 ’區 本方案改善先前方案,其中本質上若循序寫人操作期間 集區中之更新區塊需要關閉以挪出空間給新配置, 集區内之最近最少使用之循序更新區塊。此確保各種更: =塊有效地用於程序循序寫人操作及隨機寫人操作。特— B之’其避免主機執行之較大循序寫人操作可強制包含 FAT及目錄資訊之雜亂更新區塊的過早關閉的無效情況。 可極快地有效建立另一雜亂區塊,以儲存fat及目錄資 訊,:旦完成較大循序寫入操作即再次將其更新。改良= 代政策之建立強制替代及合併集區之分離,以防止在:序 寫入期間合併雜亂區塊的新増額外請,以及潛在的開啟 循序或開啟雜I區塊之合併,以f理隨後fat及目錄資訊 更新。 先前已說明支援最多最大數目之同時開啟更新區塊之實 務系統限制。例如,結合圖1()說明之—項具體實施例中, 步称410測試新配置是否超過更新區塊之最大數目Umax, 其可㈣開啟以便接收更新f料。若將超過lx,更新區 A攻低作用中者’無論係循序或雜亂更新區塊’將在步 称420内關閉,以將系統保持在規定限制内。 圈21示意性地說明用於區塊管理系統之更新區塊的數目 /兩種規定限制。更新區塊總數('Αχ)存在總體限制,其 係藉由雜亂更新區塊數目Ng與循序更新區塊數目Ns之和給 出由於雜亂更新區塊資源密集性更高,其需要雜亂區塊 124919.doc •72· 200837562 索引(CBI)之額外維護’雜亂區塊索引之最大數目 ("uCMAX’,m佳的係亦存在限制。目此,第—限制需要更新 區塊之總數Ne+NS<=UMAX。第二限制需要雜亂更新區塊數 目 nc<=ucmax。 圖22說明針對各種記憶體裝置最佳化之兩種限制的組合 之典型耗例。給定組合由Umax_Uc_指定。例如,n 指定區塊管理系統,其允許更新集區内的最多三個更新區 ,塊’其中僅一個係雜亂更新區塊。同樣,"7_3,,指定支援最 乡七個更新區塊之區塊管理系統,其中最多三個可係雜亂 更新區塊 般而吕,具有較小記憶體容量的更簡單之記 憶體系統限制將更多,從而具有更小最大數目。 囷23A、囷23B及囷23C示意性地說明事件序列,其用於 依據第一ί青況按1前替卩$案將新更新區塊引入更新區塊 之集區。 囷23Α不意性地說明採用如圖22所述之,,5_2,,組態的更新 集區此範例中’更新集區充滿最大五個允許更新區塊。 更新集區進一步係分割成循序集區丨2〇〇,其包含三個循序 更新區塊SI、S2及S3,以及雜亂集區13〇〇,其包含最大兩 個雜亂或非循序更新區塊,以及C5。該範例顯示第一情 況’其中最低作用中區塊正巧為循序更新區塊,例如S3 1201 〇 在需要配置新的更新區塊時,更新集區内現有更新區塊 之一需要關閉以挪出空間。例如,當主機針對並非藉由集 區内之現有更新區塊服務的邏輯區段群組寫入循序資料, 124919.doc -73 - 200837562 將需要配置新的更新區塊以便記錄資料。 圖23B不意性地說明依據先前方案的最低作用中更新集 區之關閉,以便挪出空間給新更新區塊。此情形中,最低 作用中更新區塊正巧為S3 1201,並且將其關閉以及從更 新區塊集區移除。 囷23C示意性地說明在已移除關閉之更新區塊以挪出空 間後將新配置之更新區塊引入集區。此情形中,將新配置 的更新區塊S6 m2引入循序集區1200,以便以邏輯循序 順序記錄資料。依此方式,不超過允許的最大更新區塊數 目 UMAX。 圏24Α、囷24Β及圖24C示意性地說明事件序列,其用於 依據第二情況按先前替代方案將新的更新區塊引入更新區 塊之集區。 囷24Α示意性地說明採用如圖22所述之,,5_2"組態的更新 木區此範例中,更新集區充滿最大五個允許更新區塊。 更新集區進一步係分割成循序集區丨2〇〇,其包含三個循序 更新區塊SI、S2及S3,以及雜亂集區13〇〇,其包含最大兩 個雜亂或非循序更新區塊,以及C5。該範例顯示第二情 況,其中最低作用中區塊正巧為雜亂更新區塊,例如C4 1 3 0 1 〇 圖24B示意性地說明依據先前方案的最低作用中更新集 區之關閉,以便挪出空間給新更新區塊。此情形中,最低 作用中更新區塊為S3 13〇1,並且將其關閉以及從更新區 塊集區移除。 124919.doc -74- 200837562 圖2 4 C示意性地說明在已移除關閉之更新區塊以挪出空 間後將新配置之更新區塊引入集區。此情形中,將新配置 的更新區塊S6 1212引入循序集區1200,以便以邏輯循序 順序記錄資料。依此方式,不超過允許的最大更新區塊數 目 Umax 0 圖25A及圖25B分別說明FIG 10、FIG 23B及FIG 24B先 鈾所述方案内的Umax及UCMAX之維持。該等兩個限制通常 係同時施加。 圖25Α說明先前圓1〇、步驟41〇及囷23Β及圖24Β内所述 方案’其中無論何時新配置超過預定限制,關閉最近最少 存取之更新區塊。 步驟1252 :將一非揮發性記憶體組織成區塊,各區塊用 於儲存可一起抹除之資料。 步驟1254 ·配置最多第一預定數目之更新區塊,其係同 時開啟以便儲存邏輯資料單位之更新。 / ㈣1256:無論何時配置新更新區塊將超過預定數目, 、關閉取近最少存取之更新區塊以挪出空間給新的更新區 塊0 圖25Β說明先前囷1〇之步赚q 心少鄉370内所述方案,其中無論何 日$雜亂更新區塊數目超過子舊中 、迫預疋限制,關閉最近最少存取之 雜亂(非循序)更新區塊。 步驟1354 :在用於以 之该專開啟更新區塊中 塊0 邏#非循序順序儲存邏輯資料單位 配置最多第二預定數目之更新區 124919.doc -75- 200837562 步驟1356 ··無論何時非循序更新區塊之數目將超過第二 預定數目,關閉最近最少存取之非循序更新區塊之一,以 便不超過第二預定數目。 此先前方案之一缺點係其在某些情形下可導致雜亂更新 區塊之過多關閉。在循序寫入使包含控制資料之雜亂區塊 過早結案以在集區内挪出空間給新配置之循序區塊的情形 中,該方案效率尤其低。例如,若結案雜亂更新區塊C4 13 10記錄FAT及目錄資訊,將立即需要配置替代,以在完 成循序寫入後儘快運行該功能。此需要集區内當前最低作 用中更新區塊之另一輪關閉,以便挪出空間給用於記錄控 制資料之替代更新區塊。 依據本發明之當前方面,關閉更新區塊以便不超過預定 最大更新區塊數目進一步從僅選擇最近最少使用之更新區 塊細化至減小雜亂更新區塊之過多關閉的實例。較佳具體 貝施例中’若將更新區塊配置成記錄循序資料並且需要關 閉更新區塊集區内之一以挪出空間,則關閉集區内最低作 用中循序更新區塊。 圖26A、囷26B及圖26C示意性地說明事件序列,其用於 依據本改良替代方案將新的更新區塊引入更新區塊之集 區〇 圖26A示意性地說明採用如圖22所述之,,5-2"組態的更新 集區。此範例中,更新集區充滿最大五個允許更新區塊。 更新集區進一步係分割成循序集區12〇〇,其包含三個循序 更新區塊SI、S2及S3,以及雜亂集區13〇〇,其包含最大兩 124919.doc -76- 200837562 個雜亂或非循序更新區塊’以及。。該範例顯示類似於 囫24A之情況,其中最低作用中區塊正巧為雜亂更新區 塊,例如C4 1301。$夕卜,其顯示作為循序集區12〇〇内最 低作用中者的循序區塊S3 1202。 囷26B示意性地說明依據本改良方案的更新區塊集區中 一更新區塊之關閉,以便挪出空間給新更新區塊。若與循 序更新及集區内更新區塊數目相關聯的新配置已處於最大 ^ 值,必須結案集區内更新區塊之一以挪出空間給新配置之 ' 更新區塊。然而,在此最低作用中區塊係C4 1301之情形 中,因為其係雜亂區塊,將其忽略。相反,將結案循序集 區1200内之最低作用中更新區塊。此範例,將結案及從更 新區塊集區移除的係S3 1202。 囷26C示意性地說明在已移除關閉之更新區塊以挪出空 間後將新配置之更新區塊引入集區。此情形中,將新配置 的更新區塊S6 1212引入循序集區1200,以便以邏輯循序 順序記錄資料。依此方式,不超過允許的最大更新區塊數 (目 UMAX。 圖27A、圖27B及囷27C示意性地說明事件序列,其用於 依據本改良替代方案將新的雜亂更新區塊引入更新區塊之 集區。 囷27A示意性地說明採用如囷22所述之”弘2"組態的更新 集區。此範例中,更新集區充滿最大五個允許更新區塊。 更新集區進一步係分割成循序集區12〇〇,其包含三個循序 更新區塊SI、S2及S3,以及雜亂集區13〇〇,其包含最大兩 124919.doc -77- 200837562 個雜亂或非循序更新區塊,C4及C5。該範例顯示最低作 用中區塊正巧為循序更新區塊,例如S6 1201。另外,其 顯示作為雜亂集區13〇〇内最低作用中者的雜亂區塊C4 1302 〇 囷27B示意性地說明依據本改良方案的更新區塊集區中 一更新區塊之關閉,以便挪出空間給新更新區塊。若將新 雜亂更新區塊引入已充滿雜亂集區1300,必須結案雜亂集 區内之更新區塊之一以挪出空間。該範例中,雜亂集區 13 00已包含最大兩個雜亂更新區塊。當建立另一雜亂更新 區塊時’例如當現有循序更新區塊S 1 1220已轉換為雜亂 區塊’將超過最大雜亂區塊數目,除非已將區塊之一移 除此丨月形中’結案並從雜亂集區13 0 0移除最低作用中雜 亂區塊C4 1302,以挪出空間。 圖27C示意性地說明在已關閉及移除另一雜亂更新區塊 以挪出空間後將新雜亂更新區塊引入集區。此情形中,已 將S1從循序集區丨2〇〇内之循序更新區塊122〇轉換至雜亂集 £•1300内之雜亂更新區塊C6 1320。依此方式,不超過允 許的最大雜亂更新區塊數目UCMAX。 圖28係流程圖’其說明依據第一具體實施例在循序更新 期間管理一組有限更新區塊之本改良方案。 步称1400 :將一非揮發性記憶體組織成區塊,各區塊用 於儲存可一起抹除之資料。 步驟1402 :配置最多第一預定數目之更新區塊,其係同 時開啟以便儲存邏輯資料單位之更新。 124919.doc -78- 200837562 步驟1406 ··回應用以寫入循序資料之寫入命令,以循序 順序將邏輯資料單位寫入至更新區塊上。 步称1408:回應針對欲關閉之該更新區塊滿足該等循序 α輯貝料單位之進一步寫入的一預定條件,配置一新的更 新區塊以繼續寫入,並且若該新配置超過該第一預定數 目’優先於非循序順序的任何最近最少存取之更新區塊而 關閉循序順序的一最近最少存取之更新區塊。 圖29係流程圖,其說明依據第二具體實施例管理具有兩 : 個預定限制之一組有限更新區塊的本改良方案。 步称1410 :將一非揮發性記憶體組織成區塊,各區塊用 於儲存可一起抹除之資料。 步驟1412 ··配置最多第一預定數目之更新區塊,其係同 時開啟以便儲存邏輯資料單位之更新。 步驟1416 ·在用於以邏輯非循序順序儲存邏輯資料單位 之該等開啟更新區塊中配置最多第二預定數目之更新區 塊。 、 步驟1418 :無論何時用於以邏輯循序順序儲存資料之更 新區塊的引入可超過第一預定數目,以邏輯循序順序關閉 包含資料之最近最少存取之更新區塊,以挪出空間給引入 之更新區塊。 步驟1420 :無論何時用於以邏輯非循序順序儲存資料之 一更新區塊的引入可超過該第二預定數目,以邏輯非猶序 順序關閉包含資料之一最近最少存取之更新區 ^ Μ娜出 空間給該引入之更新區塊。 124919.doc -79- 200837562 本方案之一般化係根據一組屬性分類更新區塊,例如更 新區塊係儲存循序或非循序資料,或者其儲存某一預定類 型之系統資料。在實施有限數目之更新區塊的集區時,各 層級之更新區塊在超過該層級支援之最大數目時將具有其 本身之替代規則。 ^ 例如,循序更新區塊及非循序更新區塊係兩種不同層 級。該等層級之各個的替代規則相同,即採用新的區塊替 ^代最低作用中之區塊。因此當超過循序更新區塊之集區 { 時,在將新區塊引入集區前將關閉及移除集區内之最低作 用中區塊。對於非循序更新區塊之集區也是如此。 一般而言,各層級具有獨立於其他層級的其本身之替代 規則。替代規則之範例係根據對應層級替代最近最少存 取、最近最多存取、最小頻率存取、最大頻率存取等。 囷30係流程圖,其說明管理具有以層級為基準之替代規 則的一組有限更新區塊之本改良方案。 ^ 步驟1430 :將一非揮發性記憶體組織成區塊,各區塊用 % 於儲存可一起抹除之資料。 步驟1432 ·•提供同時開啟的最多第一預定最大數目之更 新區塊的一集區,以用於儲存邏輯資料單位之更新。 步称1436 :提供一組預定義層級以用於根據一組屬性來 7刀類更新區塊’各層級支援最多相關聯預定最大數目之更 新區塊的一子集區。 步驟1438 :提供一組對應替代規則給該組預定義層級, 以指定欲替代之該等個別子集區内的該更新區塊。 124919.doc 200837562 步驟1438 ·藉由層級將該集區内之該等更新區塊分組至 對應子集區内。 步驟14401無論何時引入相同層級之另-更新區塊’關 ,及移除包含相關聯預定最大數目更新區塊之子集區内的 最低作用中更新區塊。 本文所引用的全部專利、專利中請案、論文、書籍、說 明書、其他公開案、文件及内容皆出於各種目的而以引用 的方式王文併入本文中。就任何併入的公開案、文件或事 件與本文件文字之間的定義或術語之使用方面的任何矛盾 或衝突而言’以本文件之定義或術語之使用為準。 雖然已經針對特定具體實施例說明本發明之各方面,不 過應瞭解,本發明係受到隨附中請專利範圍之完整範嗨的 保護。 【圖式簡單說明】 围1示意性說明一適合實現本發明之記憶體系統的主硬 體組件。 % 囷2說明根據本發明一較佳呈體訾你〃丨 1 一體貝施例的記憶體,其係 被組織成複數個實體區段群(或元區 岬塊)並且由該控制器的 記憶體管理器來管理。 一較佳具體實施 複數個元區塊間 圖3A⑴至3 A(iii)示意性說明根據本發明 例介於一邏輯群組與一元區塊間之映射。 囷3B示意性說明介於複數個邏輯群組與 之映射。 圖4說明一 元區塊於實體記憶體中和各 種結構的對準。 124919.doc -81 - 200837562 囷5A說明連結不同平面的最小抹除單位所構成的元區塊 的示意圖。 囷s B說明其中會從每個平面中選出一最小抹除單位 (MEU)用以連結成一元區塊之一具體實施例。 囷5C說明其中會從每個平面中選出一個以上的用 以連結成一元區塊之另一具體實施例。 囷6為該元區塊管理系統被設計在該控制器與快閃記憶 體中時的示意性方塊圖。 ° " 囷7A說明依序被寫入一循序更新區塊中的一邏輯群組之 中的複數個區段的範例。 圖7B說明以雜亂順序被寫入一雜亂更新區塊中的一邏輯 群組之中的複數個區段的範例。 囷8說明進行兩次具有不連續邏輯位址的分離主機寫入 操作而依序被寫入一循序更新區塊中的一邏輯群組之中的 複數個區段的範例。 圖9為說明根據本發明一通用具體實施例,由該更新區 、 塊管理器所實施之用於更新一邏輯資料群的程序之流程 圖。 囷10說明根據本發明一較佳具體實施例,由該更新區塊 管理器所實施之用於更新一邏輯資料群的程序之流程圖。 圖11A為說明關閉囷10所示之雜亂更新區塊的合併程序 的更詳細流程圖。 圖11B為說明關閉囷10所示之雜亂更新區塊的壓縮程序 的更詳細流程圖。 124919.doc •82- 200837562 圖u錢明—邏輯群組的所有可能狀態,以及於各種操 作下该等狀態間可能的轉換情形。 圖咖為-列出一邏輯群組之該等可能狀態的表格。 圖13A說明—元區塊的所有可能狀態,以及於各種操作 下該等狀態間可能的轉換情形。—元區塊係—對應於—邏 輯群組的一實體群。 圖13B况明一列出一元區塊之可能狀態的表格。 f 圖14(A)至14(J)為顯示對該邏輯群組之狀態以及該實體 元區塊所進行之各項操作的效果。 圖15說明用於追蹤已開放及已關閉之更新區塊與已抹除 區塊以進行配置的配置區塊清單(ABL)的結構的較佳具體 實施例。 囷16A說明一雜亂區塊索引(CBI)區段的資料欄位。 囷16B說明欲被記錄於一專屬元區塊中的該等雜亂區塊 索引(CBI)區段的範例。 圖16C為說明存取一正在進行雜亂更新之假定邏輯群組 v 中一邏輯區段的資料的流程圖。 圖16D為說明根據一替代具體實施例,其中邏輯群組已 經被分割成複數個子群,存取一正在進行雜亂更新之假定 邏輯群組中一邏輯區段的資料的流程圖。 圖16E說明於將每個邏輯群組分割成多個子群的具體實 施例中的雜亂區塊索引(CBI)區段的範例及其功能。 囷17A說明一群位址表(GAT)區段的資料欄位。 圖17B說明欲被記錄於一 GAT區塊中的該等群位址表 124919.doc -83- 200837562 (GAT)區段的範例。 圖18為朗針對使用及循環使用已抹除區塊而言,該控 制與目錄育訊的分佈與流動的示意性方塊圖。 圓19為顯示邏輯至實體位址轉換的程序之流程圖。 囷20顯示於該記憶體管理操作進程中對控制資料結構所 實施的操作的階層。 囷21示意性地說明用於區塊管理系統之更新區塊的數目 之兩種規定限制。 囷22說明針對各種記憶體裝置最佳化之兩種限制的組合 之典型範例。 囷23Α示意性地說明採用如囷22内所說明之”5_2"組態的 更新集區。 圖23Β不意性地說明依據先前方案的最低作用中更新集 區之關閉,以便挪出空間給新更新區塊。 圓23C示意性地說明在已移除關閉之更新區塊以挪出空 間後將新配置之更新區塊引入集區。 圖24Α示意性地說明採用如圖22内所說明之”5-2,,組熊的 更新集區。 囷24B示意性地說明依據先前方案的最低作用中更新集 區之關閉,以便挪出空間給新更新區塊。 圖24C示意性地說明在已移除關閉之更新區塊以挪出空 間後將新配置之更新區塊引入集區。 圖25A說明先前圖10之步驟410及囷23B及圖24B内所述 方案,其中無論何時新配置超過預定限制,關閉最近最少 124919.doc -84 - 200837562 存取之更新區塊。 圖25B說明先前圖10之步驟370内所述方案,其中無論何 時雜亂更新區塊數目超過預定限制,關閉最近最少存取之 雜亂(非循序)更新區塊。 圖26A示意性地說明採用如囷22内所說明之,,5_2,f組態的 更新集區。 圖26B示意性地說明依據本改良方案的更新區塊集區中 一更新區塊之關閉,以便挪出空間給新更新區塊。No frequent access is required. The hierarchy of a plurality of control data structures (e.g., gat, CBI, MAP, and MAPA not included in 囷2〇) is retained in the flash memory. Thus, a control write operation causes information from the control data structure in RAM to update the equivalent control data structure in the flash memory. As described in 囷2G, the block management system will maintain a control data set in the Shaanxi flash memory during its operation. This control data set is stored in the metablocks in a similar host data. In this regard, the control data itself will be managed in blocks and will be updated to allow for the collection of obsolete items. It is also mentioned above that there is a - control data hierarchy, in which the control data in the lower hierarchy is updated higher than the upper layer. For example, assuming each control block has N control segments to write, then the following control update and control block reconfiguration sequences typically occur. Referring again to 囷2〇, (4): The CBI update will fill the CBI block and trigger a cbi reconfiguration (rewrite) with a MAP update. If the messy block is closed, it will also trigger a catch update. A MAP update is triggered each time the GAT update is made. Each n&gAT update fills the block and triggers a GAT block reconfiguration. In addition, when a MAP block is fully loaded, it also triggers an MAp block reconfiguration and a MAPA block (if present, the boot block will point directly to the map) to update. In addition, when the MAPA block is fully loaded, it also triggers a MAPA block reconfiguration, a boot block update, and a _ MAp update. In addition, when an open block is fully loaded, it will trigger the reconfiguration of an active boot block into another boot block. 124919.doc -70- 200837562 Update Block Alternative According to another aspect of the present invention, in the non-volatile memory using the block management system, at most the first predetermined maximum number for simultaneously enabling the recording of data is supported. The system of the updated block implements an improved block management scheme. The update block is mainly a sequential update block in which data is recorded in a logical sequential order 'but allows at most a second predetermined maximum number of update blocks to be messy update blocks' where the data is not recorded in a logical sequential order. Whenever the new configuration of the update block can cause the set of update blocks to exceed the first or second predetermined maximum number, one of the existing update blocks in the set will be closed and removed to meet the limit. Before closing the update block, its data is merged into sequential blocks. Improvements are made to avoid sequential updates that can result in an additional number of cluttered blocks being merged. This is accomplished by separating the sequential update blocks and the cluttered update blocks into individual replacement or combination sets. Specifically, when the sequential update causes the configuration of the new update block to exceed the first predetermined maximum number, the most recently used sequential update block of the set area preferentially moves the space. In the current system, there are generally two types of data: user data and control data. User data is typically transferred from the host to the memory system in a logical sequential order. The sequential update block is configured to optimally program sequential write operations from the host. User data can also be in a logical, non-sequential order, especially when the logic is subsequently updated. The messy update block is built to best program data in a non-sequential order. Another source of clutter or non-sequential data is control data maintained by the file system or memory system, such as file and directory information generated during the process of storing user data. The actual system that supports the maximum number of simultaneous updates while opening the update block 124919.doc -71 - 200837562 The restricted previous plan is to close the least recent block in the set, whether it is sequential or cluttered. This scenario improves the previous scenario, where essentially the updated block in the pool during the sequential write operation needs to be closed to move the space to the new configuration, the least recently used sequential update block in the collection. This ensures a variety of more: = block is effectively used for program-by-sequence writer operations and random writer operations. In particular, the large sequential write operation of the host to prevent the host from executing may force the premature closure of the FAT and directory information to be prematurely closed. Another messy block can be created very quickly to store fat and directory information: once the large sequential write operation is completed, it is updated again. Improvement = generation of policy-based mandatory substitution and separation of merged pools to prevent new additions to the cluttered blocks during the sequential writes, and the potential to open sequential or open mixed I blocks. Subsequent fat and catalog information updates. The practical system limitations for enabling the update block at the same time as the maximum number of maximums have been previously described. For example, in conjunction with FIG. 1(), in step specific embodiment, step 410 tests whether the new configuration exceeds the maximum number of update blocks Umax, which can be turned on to receive updates. If it exceeds lx, the update zone A attacker's 'on-the-fly or messy update block' will be closed within step 420 to keep the system within the specified limits. Circle 21 schematically illustrates the number of update blocks for the block management system / two specified limits. The total number of update blocks ('Αχ) has an overall limit, which is given by the sum of the number of messy update blocks Ng and the number of sequential update blocks Ns. Because the resource of the chaotic update block is more dense, it needs a messy block 124919 .doc •72· 200837562 Indexing (CBI) Additional Maintenance 'The maximum number of messy block indexes ("uCMAX', there are limits to the good system. For this reason, the first limit needs to update the total number of blocks Ne+NS<;=UMAX. The second limitation requires a random update block number nc<=ucmax. Figure 22 illustrates a typical consumption of a combination of two limitations optimized for various memory devices. A given combination is specified by Umax_Uc_. n Specify the block management system, which allows up to three update areas in the update set area, and only one of them blocks the update block. Similarly, "7_3, specifies the block that supports the seven most updated blocks in the hometown. Management systems, where up to three can be as messy as update blocks, and simpler memory systems with smaller memory capacity will have more restrictions, resulting in smaller maximum numbers. 囷23A, 囷23B, and 囷23C Signal Describe the sequence of events, which is used to introduce the new update block into the episode of the update block according to the first case of the first case. 囷23Α Unintentionally stated as shown in FIG. 22, 5_2 , the configured update pool In this example, the 'update pool is filled with the maximum five allowed update blocks. The update pool is further divided into sequential sets 丨2〇〇, which contains three sequential update blocks SI, S2 And S3, and the cluttered area 13〇〇, which contains the largest two cluttered or non-sequential update blocks, and C5. This example shows the first case where the lowest active block happens to be a sequential update block, such as S3 1201时 When a new update block needs to be configured, one of the existing update blocks in the update set needs to be closed to move out of space. For example, when the host targets a logical segment group that is not served by an existing update block in the set. The group writes the sequential data, 124919.doc -73 - 200837562 will need to configure a new update block to record the data. Figure 23B unintentionally illustrates the closure of the update zone in the lowest role according to the previous scenario, in order to move the space to the new New block. In this case, the lowest active update block happens to be S3 1201 and is closed and removed from the update block pool. 囷23C schematically illustrates the removal of the closed update block to remove After the space, the newly configured update block is introduced into the pool. In this case, the newly configured update block S6 m2 is introduced into the sequence set area 1200 to record the data in a logical sequential order. In this way, the maximum allowed update is not exceeded. The number of blocks UMAX 圏 24 Α, 囷 24 Β and Fig. 24C schematically illustrate a sequence of events for introducing a new update block into the set of update blocks according to the previous alternative in accordance with the second case.囷24Α Schematically illustrates the use of the 5_2" configuration update as described in Figure 22. In this example, the update pool is filled with up to five allowed update blocks. The update pool is further divided into a sequenced area 丨2〇〇, which includes three sequential update blocks SI, S2 and S3, and a cluttered area 13〇〇, which contains the largest two chaotic or non-sequential update blocks. And C5. This example shows a second case in which the lowest active block happens to be a cluttered update block, such as C4 1 3 0 1 Figure 24B schematically illustrates the closing of the lowest active update pool according to the previous scheme in order to move out of space Give the new update block. In this case, the lowest active update block is S3 13〇1 and is closed and removed from the update block aggregate. 124919.doc -74- 200837562 Figure 2 4C schematically illustrates the introduction of a newly configured update block into the pool after the closed update block has been removed to move the space. In this case, the newly configured update block S6 1212 is introduced into the sequence set area 1200 to record the data in a logical sequential order. In this manner, the maximum number of update blocks allowed is not exceeded. Umax 0 Figures 25A and 25B illustrate the maintenance of Umax and UCMAX in the schemes of FIG 10, FIG 23B, and FIG 24B, respectively. These two restrictions are usually applied simultaneously. Figure 25 illustrates the previous circle 1, step 41 and block 23, and the scheme described in Figure 24, where the least recently accessed update block is closed whenever the new configuration exceeds the predetermined limit. Step 1252: Organizing a non-volatile memory into blocks, each block for storing data that can be erased together. Step 1254: Configure up to a first predetermined number of update blocks, which are simultaneously opened to store updates of logical data units. / (4) 1256: Whenever the new update block is configured to exceed the predetermined number, close the update block that is close to the least access to move the space to the new update block. Figure 25Β illustrates that the previous step is less The scheme described in the township 370, in which the number of messy update blocks exceeds the old one, and the pre-emptive limit is closed, and the recent least-accessed messy (non-sequential) update block is closed. Step 1354: In the block 0 logic to store the logical data unit in the exclusive open update block, configure the logical data unit to configure a maximum second predetermined number of update areas 124919.doc -75- 200837562 Step 1356 ··Whenever non-sequence The number of update blocks will exceed the second predetermined number, and one of the least recently accessed non-sequential update blocks is closed so as not to exceed the second predetermined number. One of the disadvantages of this prior scheme is that it can lead to excessive shutdown of cluttered update blocks in certain situations. This scheme is particularly inefficient in the case of sequential writes that cause a messy block containing control data to be prematurely closed to move space within the pool to a newly configured sequential block. For example, if the closed messy update block C4 13 10 records FAT and directory information, an alternate configuration will be required immediately to run the function as soon as possible after completing the sequential write. This requires another round of closing of the update block in the current minimum usage in the collection area to move the space to the alternate update block for recording control data. In accordance with the current aspect of the present invention, closing the update block so as not to exceed the predetermined maximum number of update blocks further refines from only selecting the least recently used update block to reducing the number of excessively closed instances of the cluttered update block. Preferably, in the case of the embodiment, if the update block is configured to record the sequential data and one of the update block sets needs to be closed to move the space, the sequential update block in the lowest role in the set is closed. 26A, 26B, and 26C schematically illustrate an event sequence for introducing a new update block into a set of update blocks in accordance with the improved alternative. FIG. 26A schematically illustrates the use of FIG. ,, 5-2" configured update pool. In this example, the update pool is filled with up to five allowed update blocks. The update pool is further divided into a sequenced area 12〇〇, which includes three sequential update blocks SI, S2 and S3, and a cluttered area 13〇〇, which contains a maximum of two 124919.doc -76-200837562 clutter or Non-sequential update block 'and. . This example shows a situation similar to 囫24A, where the lowest active block happens to be a clutter update block, such as C4 1301. $, which is shown as a sequential block S3 1202 as the lowest active player in the sequenced area 12〇〇.囷26B schematically illustrates the closing of an update block in the update block pool in accordance with the present modification to move the space to the new update block. If the new configuration associated with the sequential update and the number of updated blocks in the set is already at the maximum value of ^, one of the updated blocks in the closed set area must be moved to the newly configured 'update block'. However, in the case of the lowest active block C4 1301, it is ignored because it is a cluttered block. Instead, the block will be updated in the lowest role in the sequence set 1200. In this example, the system S3 1202 will be closed and removed from the update block pool.囷 26C schematically illustrates the introduction of the newly configured update block into the pool after the closed update block has been removed to move the space. In this case, the newly configured update block S6 1212 is introduced into the sequence set area 1200 to record the data in a logical sequential order. In this way, the maximum number of allowed update blocks is not exceeded (UMAX. Figures 27A, 27B and 27C schematically illustrate sequence of events for introducing new clutter update blocks into the update area in accordance with the improved alternative Blocks of blocks 囷27A schematically illustrates the use of the “Hong 2" configured update pool as described in 囷22. In this example, the update pool is filled with a maximum of five allowed update blocks. Divided into a sequential set area 12〇〇, which includes three sequential update blocks SI, S2 and S3, and a cluttered set area 13〇〇, which contains a maximum of two 124919.doc -77-200837562 chaotic or non-sequential update blocks , C4 and C5. This example shows that the lowest-acting block happens to be a sequential update block, such as S6 1201. In addition, it shows the clutter block C4 1302 〇囷 27B as the lowest-acting person in the cluttered area 13〇〇 Optionally, the closing of an updated block in the update block set according to the improvement scheme is performed, so as to move out the space to the newly updated block. If the new messy update block is introduced into the already filled messy area 1300, the messy set must be closed. District One of the update blocks is to move out the space. In this example, the messy pool area 13 00 already contains the largest two messy update blocks. When another messy update block is created, for example, when the existing sequential update block S 1 1220 Converted to a messy block 'will exceed the maximum number of cluttered blocks, unless one of the blocks has been removed from this moon's case and the minimum active messy block C4 1302 is removed from the cluttered zone 130 0 0, Figure 27C schematically illustrates the introduction of a new clutter update block into the pool after another messy update block has been closed and removed to move the space. In this case, S1 has been taken from the sequence set area. The sequential update block 122 in 2〇〇 is switched to the clutter update block C6 1320 in the messy set £1300. In this way, the maximum number of allowed random update blocks UCMAX is not exceeded. A modification of a set of limited update blocks during a sequential update according to the first embodiment is illustrated. Step 1400: Organizing a non-volatile memory into blocks, each block being used for storage and erasing together Information. Step 1402: Configure the most And a first predetermined number of update blocks, which are simultaneously opened to store the update of the logical data unit. 124919.doc -78- 200837562 Step 1406 ··Respond to the write command for writing the sequential data, the logic is sequentially executed The data unit is written to the update block. Step 1408: Respond to a predetermined condition that the update block to be closed satisfies the further write of the sequential alpha-bubble units, and configure a new update block to continue Write, and if the new configuration exceeds the first predetermined number 'priority to any least recently accessed update block in a non-sequential order, closes a least recently accessed update block in the sequential order. Figure 29 is a flow chart illustrating the present modification of managing a limited set of limited update blocks having two predetermined limits in accordance with a second embodiment. Step 1410: Organize a non-volatile memory into blocks, each of which is used to store data that can be erased together. Step 1412: Configure up to a first predetermined number of update blocks, which are simultaneously opened to store updates of logical data units. Step 1416: Configure a maximum of a second predetermined number of update blocks in the open update blocks for storing logical data units in a logical, non-sequential order. Step 1418: whenever the introduction of the update block for storing the data in the logical sequential order may exceed the first predetermined number, the latest least-accessed update block containing the data is closed in a logical sequential order to move the space for introduction. Update block. Step 1420: whenever the introduction of the update block for storing the data in a logical non-sequential order may exceed the second predetermined number, the update area of the least recently accessed one of the included data is closed in a logical non-sequential order. The space is given to the introduced update block. 124919.doc -79- 200837562 The generalization of this scheme is to update blocks based on a set of attributes, such as updating block files to store sequential or non-sequential data, or storing a predetermined type of system data. When implementing a pool of a limited number of updated blocks, the updated blocks of each level will have their own alternative rules when they exceed the maximum number of levels supported by the level. ^ For example, sequential update blocks and non-sequential update blocks are two different levels. The replacement rules for each of these levels are the same, that is, the new block is used to replace the block in the lowest role. Therefore, when the cluster { of the sequential update block is exceeded, the lowest-function block in the collection area will be closed and removed before the new block is introduced into the collection area. The same is true for the episodes of non-sequential update blocks. In general, each level has its own alternative rules that are independent of the other levels. An example of an alternative rule is to replace the least recent access, the most recent access, the least frequency access, the maximum frequency access, etc., according to the corresponding level. Figure 30 is a flow diagram illustrating the improvement of a set of limited update blocks that have a hierarchically based alternative rule. ^ Step 1430: Organize a non-volatile memory into blocks, each block storing % of the data that can be erased together. Step 1432: • Provide an aggregate of up to the first predetermined maximum number of update blocks simultaneously opened for storing updates of logical data units. Step 1436: A set of predefined levels is provided for updating the block based on a set of attributes. Each level supports a subset of the updated blocks of the associated maximum number of associated blocks. Step 1438: Provide a set of corresponding substitution rules to the group of predefined levels to specify the updated blocks within the individual subsets to be replaced. 124919.doc 200837562 Step 1438 - Grouping the update blocks within the set into the corresponding subset by level. Step 14401 whenever the other level of the other-update block 'off' is introduced, and the lowest active update block within the subset area containing the associated predetermined maximum number of updated blocks is removed. All patents, patents, papers, books, books, other publications, documents and contents cited herein are hereby incorporated by reference in their entirety for all purposes. In the event of any contradiction or conflict between the definitions or terms used in any incorporated publications, documents or events and the text of this document, the definition or terminology of this document shall prevail. Although the various aspects of the invention have been described in terms of specific embodiments, it should be understood that the present invention is protected by the full scope of the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS A housing 1 schematically illustrates a main hardware component suitable for implementing the memory system of the present invention. % 囷 2 illustrates a memory according to a preferred embodiment of the present invention, which is organized into a plurality of physical segment groups (or meta-blocks) and is memoryd by the controller. Body manager to manage. A preferred embodiment of the plurality of metablocks Figures 3A(1) through 3A(iii) schematically illustrate the mapping between a logical group and a metablock in accordance with an embodiment of the present invention.囷 3B schematically illustrates the mapping between a plurality of logical groups. Figure 4 illustrates the alignment of a unitary block in physical memory and various structures. 124919.doc -81 - 200837562 囷5A shows a schematic diagram of a metablock composed of the minimum erasing units connecting different planes.囷s B illustrates a specific embodiment in which a minimum erase unit (MEU) is selected from each plane for joining into a unitary block.囷5C illustrates another embodiment in which one or more of the planes are selected to be joined into a unitary block.囷6 is a schematic block diagram of the metablock management system being designed in the controller and the flash memory. ° " 囷7A illustrates an example of a plurality of segments that are sequentially written into a logical group in a sequential update block. Figure 7B illustrates an example of a plurality of segments among a logical group that are written in a cluttered update block in a cluttered order.囷8 illustrates an example of performing a separate host write operation with discontinuous logical addresses and sequentially writing a plurality of sectors among a logical group in a sequential update block. Figure 9 is a flow diagram showing a procedure for updating a logical data group implemented by the update area and block manager in accordance with a general embodiment of the present invention. 10 is a flow chart showing a procedure for updating a logical data group implemented by the update block manager in accordance with a preferred embodiment of the present invention. Figure 11A is a more detailed flow chart illustrating the merge procedure for closing the cluttered update block shown by 囷10. Figure 11B is a more detailed flow chart illustrating the compression procedure for closing the cluttered update block shown by 囷10. 124919.doc •82- 200837562 Figure u Qianming—all possible states of a logical group, and possible transitions between those states under various operations. The graph is a table that lists the possible states of a logical group. Figure 13A illustrates all possible states of the metablock and possible transitions between the states under various operations. - metablock system - corresponds to an entity group of the logical group. Figure 13B shows a table listing the possible states of a metablock. f Figures 14(A) through 14(J) show the effect of the state of the logical group and the operations performed on the physical block. Figure 15 illustrates a preferred embodiment of a structure for a configuration block list (ABL) for tracking open and closed update blocks and erased blocks for configuration.囷16A illustrates the data field of a messy block index (CBI) section. Figure 16B illustrates an example of such a Scrambled Block Index (CBI) section to be recorded in a dedicated metablock. Figure 16C is a flow diagram illustrating the access to a logical section of a logical group v of a hypothetical logical group v that is undergoing a messy update. Figure 16D is a flow diagram illustrating the material of a logical segment in a hypothetical logical group that is being scrambled to update, in accordance with an alternate embodiment, in which a logical group has been partitioned into a plurality of subgroups. Figure 16E illustrates an example of a Scrambled Block Index (CBI) section and its functionality in a particular embodiment of partitioning each logical group into multiple subgroups.囷17A illustrates the data fields of a group of address table (GAT) sections. Figure 17B illustrates an example of the group address table 124919.doc -83 - 200837562 (GAT) section to be recorded in a GAT block. Figure 18 is a schematic block diagram of the distribution and flow of this control and directory education for the use and recycling of erased blocks. Circle 19 is a flow chart showing the procedure for logical to physical address translation.囷20 shows the hierarchy of operations performed on the control data structure during the memory management operation.囷21 schematically illustrates two specified limits for the number of update blocks for the block management system.囷22 illustrates a typical example of a combination of two limitations for optimizing various memory devices.囷23Α schematically illustrates the use of the “5_2" configured update pool as described in 囷22. Figure 23 Β Unexplained to illustrate the closure of the minimum active update pool according to the previous scheme, in order to move the space to the new update. The circle 23C schematically illustrates the introduction of the newly configured update block into the pool after the closed update block has been removed to move the space. Figure 24 is a schematic illustration of the use of "5 as illustrated in Figure 22]. -2,, the update zone of the group bear.囷 24B schematically illustrates the closing of the update set in the lowest action according to the previous scheme to move the space to the new update block. Figure 24C schematically illustrates the introduction of a newly configured update block into a pool after the closed update block has been removed to move the space. Figure 25A illustrates the previously described schemes of steps 410 and 23B and Figure 24B of Figure 10, wherein the most recent update block of at least 124919.doc -84 - 200837562 is closed whenever the new configuration exceeds the predetermined limit. Figure 25B illustrates the scenario previously described in step 370 of Figure 10, in which the least recently accessed messy (non-sequential) update block is closed whenever the number of cluttered update blocks exceeds a predetermined limit. Figure 26A schematically illustrates an update pool configured using 5_2, f as illustrated in 囷22. Fig. 26B schematically illustrates the closing of an update block in the update block pool in accordance with the present modification to move the space to the new update block.

圖26C示意性地說明在已移除關閉之更新區塊以挪出空 間後將新配置之更新區塊引入集區。 囷27A示意性地說明採用如圖22内所說明之"5_2 ”組態的 更新集區。 圖27B示意性地說明依據本改良方案的更新區塊集區中 一更新區塊之關閉,以便挪出空間給新更新區塊。 囷27C示意性地說明在已關閉及移除另__㈣更新區塊 以挪出空間後將新雜亂更新區塊引入集區。 囷28係流程圖,其說明依據第一具體實施例在循序更新 期間管理一組有限更新區塊之本改良方案。 圖29係流程圖,其說明依據第二具體實施例管理具有兩 個預定限制之一組有限更新區塊的本改良方案。 圖30係流程圖,其說明普 “理具有以層級為基準之替代規 則的一組有限更新區塊之本改良方案。 【主要元件符號說明】 10 主機 ^4919^00 -85- 200837562 / 20 記憶體系統 100 控制器 110 介面 120 程序器 121 共程序器 122 ROM 124 可程式化非揮發性記憶體 130 RAM 134 配置區塊清單 136 清除區塊清單 140 邏輯至實體位址轉換模組 150 更新區塊管理器模組 160 抹除區塊管理器模組 170 元區塊鏈路管理器 180 元區塊鏈路管理器 200 記憶體 210 群組位置表 220 雜亂區塊索引 230 抹除區塊清單 240 MAP 255 GAT區段 610 配置區塊清單 612 已抹除ABL清單 614 開放更新區塊清單 124919.doc -86- 200837562 / l 615 原始區塊清單 616 關閉更新區塊清單 617 已抹除原始區塊清單 620 CBI區塊 700 邏輯群組 702 元區塊 704 雜亂更新區塊 720 GAT區塊 740 已清除區塊清單 750 MAP區塊 760 抹除區塊管理區段 770 已抹除區塊清單 772 可用區塊緩衝器 774 已抹除區塊緩衝器 776 已清除區塊緩衝器 780 MAP區段 782 來源MAP區段 784 目的地MAP區段 1200 循序集區 1201 循序更新區塊 1202 循序區塊 1212 更新區塊 1220 循序更新區塊 1300 雜亂集區 124919.doc -87 - 200837562 1301 雜亂更新區塊 1302 雜亂區塊 1310 結案雜亂更新區塊 1320 雜亂更新區塊 C4 雜亂更新區塊 C5 雜亂更新區塊 SI 循序更新區塊 S2 循序更新區塊 S3 循序更新區塊 124919.doc -88-Figure 26C schematically illustrates the introduction of a newly configured update block into a pool after the closed update block has been removed to move the space.囷 27A schematically illustrates an update pool using the "5_2" configuration as illustrated in Figure 22. Figure 27B schematically illustrates the closure of an update block in the update block pool in accordance with the present modification, so that The space is moved to the new update block. 囷27C schematically illustrates the introduction of the new messy update block into the pool after the other __(4) update block has been closed and removed. 囷28 Series Flowchart, Description The present improvement is directed to managing a set of limited update blocks during a sequential update in accordance with the first embodiment. Figure 29 is a flow diagram illustrating the management of a limited set of update blocks having two predetermined limits in accordance with a second embodiment. The improvement scheme. Fig. 30 is a flow chart illustrating the present modification of a limited set of update blocks having a hierarchy-based alternative rule. [Main component symbol description] 10 Host ^4919^00 -85- 200837562 / 20 Memory system 100 Controller 110 Interface 120 Programmer 121 Common programmer 122 ROM 124 Programmable non-volatile memory 130 RAM 134 Configuration block Listing 136 Clear Block List 140 Logical to Physical Address Translation Module 150 Update Block Manager Module 160 Erase Block Manager Module 170 Metablock Link Manager 180 Metablock Link Manager 200 Memory Body 210 Group Location Table 220 Scramble Block Index 230 Erase Block List 240 MAP 255 GAT Section 610 Configuration Block List 612 ABL List Erased 614 Open Update Block List 124919.doc -86- 200837562 / l 615 Original Block List 616 Close Update Block List 617 Erased Original Block List 620 CBI Block 700 Logical Group 702 Meta Block 704 Clutter Update Block 720 GAT Block 740 Cleared Block List 750 MAP Block 760 Erase block management section 770 erased block list 772 free block buffer 774 erased block buffer 776 cleared block buffer 780 MAP Segment 782 Source MAP Section 784 Destination MAP Section 1200 Sequential Set Area 1201 Sequential Update Block 1202 Sequential Block 1212 Update Block 1220 Sequential Update Block 1300 Cluttered Set Area 124919.doc -87 - 200837562 1301 Miscellaneous Update Block 1302 messy block 1310 closed messy update block 1320 messy update block C4 messy update block C5 messy update block SI sequential update block S2 sequential update block S3 sequential update block 124919.doc -88-

Claims (1)

200837562 十、申請專利範圍·· κ 一種在組織成複數個區塊之一非揮發性記憶體内將資料 儲存於該記憶體内之方法,各區塊用於儲存可一起抹除 之邏輯資料單位,該方法包含·· 配置最多卜預定數目之區塊作為㈤時開啟更新區 塊,以用於儲存邏輯資料單位之更新; r 2. 回應用以寫入處於邏輯循序之資料的一寫入命令,以 邏輯循序順序將資料寫入至-更新區塊上;以及 时°應針對<關閉之这更新區塊滿足該等循序邏輯資料 …^進乂寫入的一預定條件,配置一新更新區塊以 = ’、〇亥寫人’並且若該新配置超過該第―預^數目,優 =非循序儲存資料的任何最近最少存取之更新區塊 一=循序儲存資料的-最近最少存取之更新區塊。 料計:織成複數個區塊之—非揮發性記憶體内中將資 該記憶體内之方法’各區塊用於儲存可一起抹 除之邏輯貧料單位,該方法包含·· 配置最多第一預定數 ..v 之區塊作為同時開啟更新區 ▲,1用於儲存邏輯資料單位之更新· 新= 輯非循序儲存邏輯資料單位之該等開啟更 仏塊中配置最多第二預定數目之更新區塊,· 無論何時用於以邏輯循序順 的引入可超過該第_預定數目更新區塊 含資料之-最近最少存取輯循序順序關閉包 引入之更新區塊;以及 更新£塊’以挪以間給該 124919.doc 200837562 無論何時用於以邏輯非循序順序儲存資料之一更新區 塊的引入可超過該第二預定數目’以邏輯非循序關閉包 含資料之一最近最少存取之更新區塊,以挪出空間給該 引入之更新區塊。 3. 如請求項2之方法,其中用於以邏輯非循序儲存資料之 該更新區塊係轉換自以邏輯循序順序儲存資料者。 f 4. 一種在組織成複數個區塊之一非揮發性記憶體内中將資 料儲存於該記憶體内之方法,各區塊用於儲存可一起抹 除之邏輯資料單位,該方法包含·· 配置最多第一預定數目之區塊作為同時開啟更新區 塊,以用於儲存邏輯資料單位之更新; —提供同時開啟的最多第―敎最大數目之更新區塊的 一集區,以用於儲存邏輯資料單位之更新; 曰i、、、且預疋義層級以用於根據一組屬性來分類更新 區塊’各層級支援最多相關聯預定最大數目之更新區塊 的一子集區; 捉i、一對應替代規則集給該 替代之S亥專個別子章F向6A — » * ^ 丁果&内的該更新區塊; 藉由層級將該隹P 4 ^内之該等更新區塊分組至對應子集 區内;以及 無論何時引入該 除包含該等相關聯 内之一最低作用中 用於該相同層級之 才目同層級之另一更新區塊,關閉及移 預定最大數目之更新區塊的一子集區 更新區塊,該移除之更新區塊係根據 "亥對應替代規則加以選擇。 124919.doc 200837562 5 ·如清求項4之方法,其中該組屬性包括以邏輯循序順序 儲存資料之一區塊。 6·如請求項4之方法,其中該組屬性包括以邏輯非循序儲 存資料之一區塊。 如明求項4之方法,其中該組屬性包括儲存與操作該記 憶體相關聯之系統資料的一區塊。 8.如請求項4之方法,其中該記憶體係一快閃EEPR〇m。 9·如請求項4之方法,其中該記憶體具有一NAND結構。 1〇·如請求項4之方法,其中該記憶體係在一可卸除式記憶 卡上。 11 ·如睛求項4之方法,其中該非揮發性記憶體具有採用一 浮動閘極結構之記憶體單元。 12·如請求項4之方法,其中該非揮發性記憶體具有採用一 介電層結構之記憶體單元。 13·如凊求項丨至12中任一項之方法,其中該記憶體具有各 儲存一位元之資料的記憶體單元。 14·如請求項丨至12中任一項之方法,其中該記憶體具有可 各儲存一位元以上之資料的記憶體單元。 15· —種非揮發性記憶體,其包含: 一記憶體,其係組織成區塊,各區塊係分割成可一起 :除的記憶體單位,各記憶體單位用於儲存一邏輯資料 單位;以及 ’包括: 時開啟更新區 —控制器,其用於控制該等區塊的操作 配置最多第一預定數目之區塊作為同 124919.doc 200837562 塊’以用於儲存邏輯資料單位之更新; 回應用以寫入處於邏輯循序之資料的一寫入命令,以 邏輯循序順序將資料寫入至一更新區塊上;以及 回應針對欲關閉之該更新區塊滿足該等循序邏輯資料 進步寫入的一預定條件,配置一新更新區塊以 繼績該寫入,並且若該新配置超過該第一預定數目,優 先於以非循序儲存資料的任何最近最少存取之更新區塊 關閉以循序儲存資料的一最近最少存取之更新區塊。 16 · 一種非揮發性記憶體,其包含: 一 c憶體,其係組織成區塊,各區塊係分割成可一起 抹除的圮憶體單位,各記憶體單位用於儲存一邏輯資料 單位;以及 一控制器,其用於控制該等區塊的操作,包括: 配置最多第一預定數目之區塊作為同時開啟更新區 塊’以用於儲存邏輯資料單位之更新; 在用於以邏輯非循序儲存邏輯資料單位之該等開啟更 新區塊中配置最多第二預定數目之更新區塊; 無論何時用於以邏輯循序順序儲存資料之一更新區塊 的引入可超過該第一預定數目,以邏輯循序順序關閉包 含資料之-最近最少存取之更新區塊,以挪出空間給該 引入之更新區塊;以及 無論何時用於以邏輯非循序順序儲存資料之一更新區 塊的引人可超過該第二預定數目,以邏輯非循序關閉包 含資料之-最近最少存取之更新區塊,以挪出空間給該 124919.doc 200837562 引入之更新區塊。 士明求項16之,己憶體,丨中用於以邏輯非循序儲存資料 之該更新區塊係轉換自以邏輯循序順序儲存資料者。 1 8 · 一種非揮發性記憶體,其包含: 忑體,其係組織成區塊,各區塊係分割成可一起 抹除的記憶體單位,各記憶體單位用於儲存一邏輯資料 單位; ' 一含同時開啟的最多第一預定最大數目之更新區塊的 集區’以用於儲存邏輯資料單位之更新; 一組預定義層級,其用於根據一組屬性分類更新區 塊’各層級支援最多相關聯預定最大數目之更新區塊的 一子集區; 一對應替代規則集,其用於該組預定義層級,以指定 欲替代之該等個別子集區内的該更新區塊; 一組子集區,其按層級包含更新區塊;以及 一控制器,其用於控制該等區塊之操作,包括: 無論何時引入該相同層級之另一更新區塊,關閉及移 除包含該等相關聯預定最大數目之更新區塊的一子集區 内之一更新區塊,該移除之更新區塊係根據用於該相同 層級之該對應替代規則加以選擇。 19·如請求項18之記憶體,其中該組屬性包括以邏輯循序順 序儲存資料之一區塊。 20·如請求項18之記憶體,其中該組屬性包括以邏輯非循序 儲存資料之一區塊。 124919.doc 200837562 21.如請求項18之記憶體,其中該組屬性包括儲存與操作該 記憶體相關聯之系統資料的一區塊。 22·如請求項18之記憶體,其中該記憶體係一快閃 EEPR〇m。 23·如請求項18之記憶體,其中該記憶體具有一 結 構。 ° 24.如請求項丨8之記憶體,其中該記憶體係在一可卸除式記 憶卡上。 25·如請求項18之記憶體,其中該非揮發性記憶體具有採用 一浮動閘極結構之記憶體單元。 26·如明求項丨8之記憶體,其中該非揮發性記憶體具有採用 一介電層結構之記憶體單元。 27· 一種非揮發性記憶體,其包含: σ己憶體,其係組織成區塊,各區塊係分割成可一起 抹除的記憶體單位,各記憶體單位用於儲存一邏輯資料 單位; 含同時開啟的最多第一預定最大數目之更新區塊的 集區,以用於儲存邏輯資料單位之更新; 一組預定義層級,其用於根據一組屬性來分類更新區 塊,各層級支援最多相關聯預定最大數目之更新區塊的 一子集區; 、ΐ應曰代規則集’其用於該紐預定義層級,以指定 欲替代之該等個別子集區内的該更新區塊; —組子集區’其按層級包含更新區塊;以及 124919.doc 200837562 關閉及移除構件,i 。 件纟用於無淪何時弓丨入該相同層級之 斤區塊關閉及移除包含該等相闕聯預定最大數 目之更新區塊的一子集區内之一更新區塊,該移除之更 新區塊係根據用於該相同層級之該對應替代規則加以選 擇。 28·如請求項15至27中任一項之記憶體,其中該記憶體具有 各儲存一位元之資料的記憶體單元。 29.如請求項1 5至27中任一項之記憶體,其中該記憶體具有 各儲存一位元以上之資料的記憶體單元。 124919.doc200837562 X. Patent Application Scope κ A method of storing data in the memory in a non-volatile memory organized into a plurality of blocks, each block is used to store logical data units that can be erased together. The method includes: configuring a maximum number of blocks as (5) to open an update block for storing updates of logical data units; r 2. responding to a write command for writing data in logical order , the data is written to the update block in a logical sequential order; and the time interval should be adjusted for the <closed update block to satisfy the predetermined condition of the sequential logic data, and a new update is configured. The block is = ', 〇海写人' and if the new configuration exceeds the first-pre-number, excellent = any least-accessed update block of non-sequentially stored data - one of the sequentially stored data - the least recently stored Take the update block. Material meter: woven into a plurality of blocks - methods in the non-volatile memory that will be used in the memory - each block is used to store logical lean units that can be erased together, the method includes ·· The first predetermined number of ..v blocks is used as the simultaneous update area ▲, 1 is used to store the update of the logical data unit, and the new = non-sequential storage logical data unit is configured to open up the second predetermined number in the block. The update block, whenever the logic block is introduced, the update block may be exceeded by the latest predetermined number of update blocks - the latest least-access sequence sequence closes the update block introduced by the package; and the update block is ' To give the 124919.doc 200837562 whenever an update block is used to store data in a logically non-sequential order, the introduction of the update block may exceed the second predetermined number of 'closest accesses to the logically non-sequentially closed one of the contained data. The block is updated to move the space to the introduced update block. 3. The method of claim 2, wherein the update block for storing data in a logical non-sequential manner is converted from a data store in a sequential order. f 4. A method of storing data in the memory in a non-volatile memory organized into a plurality of blocks, each block for storing logical data units that can be erased together, the method comprising · Configuring up to a first predetermined number of blocks to simultaneously open update blocks for storing updates of logical data units; - providing one set of up to - maximum number of updated blocks simultaneously for use Storing an update of the logical data unit; 曰i, , and pre-depreciation levels for classifying the update block according to a set of attributes 'each level supports a subset of the updated block of the maximum associated number of updated blocks; i, a corresponding substitution rule set for the replacement S Hai individual sub-chapter F to 6A - » * ^ Dingguo & the update block; by the level of the update area within the 隹P 4 ^ Blocks are grouped into corresponding subsets; and whenever a new block containing the same level of the same level in the lowest role of the associated ones is introduced, the maximum number of closed and moved orders is closed A subset of the update block updates the block, and the removed update block is selected according to the "Hai corresponding replacement rule. 124919.doc 200837562 5 The method of claim 4, wherein the set of attributes comprises storing a block of data in a logical sequential order. 6. The method of claim 4, wherein the set of attributes comprises a block of logically non-sequentially stored data. The method of claim 4, wherein the set of attributes comprises a block storing system data associated with operating the memory. 8. The method of claim 4, wherein the memory system flashes EEPR 〇m. 9. The method of claim 4, wherein the memory has a NAND structure. The method of claim 4, wherein the memory system is on a removable memory card. 11. The method of claim 4, wherein the non-volatile memory has a memory cell using a floating gate structure. 12. The method of claim 4, wherein the non-volatile memory has a memory cell using a dielectric layer structure. The method of any one of the preceding claims, wherein the memory has a memory unit that stores data of one bit. The method of any one of the preceding claims, wherein the memory has a memory unit that can store more than one bit of data. 15. A non-volatile memory comprising: a memory, the system is organized into blocks, and each block is divided into two groups: a memory unit, and each memory unit is used to store a logical data unit. And 'including: when the update area is turned on - the controller is used to control the operation of the blocks to configure up to the first predetermined number of blocks as the same 124919.doc 200837562 block for updating the logical data unit; Responding to a write command for writing data in logical order, writing data to an update block in a logical sequential order; and responding to the update block that is to be closed to satisfy the sequential logic data advance write a predetermined condition, configuring a new update block to continue the write, and if the new configuration exceeds the first predetermined number, prioritize any recent least-accessed update blocks that are stored in a non-sequential manner to be closed A recently accessed least updated update block of data. 16 · A non-volatile memory, comprising: a c memory, which is organized into blocks, each block is divided into memory units that can be erased together, and each memory unit is used to store a logical data And a controller for controlling operations of the blocks, comprising: configuring a maximum of a first predetermined number of blocks as simultaneously opening an update block for updating an update of the logical data unit; Up to a second predetermined number of update blocks in the open update blocks of the logically non-sequential storage logical data unit; the introduction of the update block may be exceeded by the first predetermined number whenever used to store the data in a logical sequential order , in the logical sequential order, close the update block containing the least recently accessed data to move the space to the introduced update block; and whenever the block is used to store the data in a logically non-sequential order The person may exceed the second predetermined number to logically and non-sequentially close the updated block containing the data - the least recently accessed to move the space to the 124919.doc 200837562 Introduced update block. In the case of Shiming, the memory block is used to store data in a logically non-sequential manner. The update block is converted from data stored in a logical sequential order. 1 8 · A non-volatile memory comprising: a carcass, the system is organized into blocks, each block is divided into memory units that can be erased together, and each memory unit is used to store a logical data unit; 'a pool containing up to a first predetermined maximum number of update blocks simultaneously opened for storing updates of logical data units; a set of predefined levels for updating blocks 'levels' according to a set of attribute classifications Supporting a subset of the most associated predetermined maximum number of update blocks; a corresponding replacement rule set for the set of predefined levels to specify the updated block within the individual subsets to be replaced; a set of subsets, which include update blocks by level; and a controller for controlling the operations of the blocks, including: whenever and when another update block of the same level is introduced, closing and removing the inclusion The associated update blocks of a predetermined subset of the maximum number of update blocks are selected, the selected update blocks being selected according to the corresponding replacement rule for the same level. 19. The memory of claim 18, wherein the set of attributes comprises a block of data stored in a logical sequential order. 20. The memory of claim 18, wherein the set of attributes comprises a block of data stored in a logically non-sequential manner. 124. The method of claim 18, wherein the set of attributes comprises a block storing system data associated with operating the memory. 22. The memory of claim 18, wherein the memory system flashes EEPR 〇m. 23. The memory of claim 18, wherein the memory has a structure. ° 24. The memory of claim 8, wherein the memory system is on a removable memory card. 25. The memory of claim 18, wherein the non-volatile memory has a memory cell employing a floating gate structure. 26. The memory of claim 8, wherein the non-volatile memory has a memory cell using a dielectric layer structure. 27· A non-volatile memory, comprising: σ hexamor, which is organized into blocks, each block is divided into memory units that can be erased together, and each memory unit is used to store a logical data unit. a pool containing up to a first predetermined maximum number of update blocks simultaneously opened for storing updates of logical data units; a set of predefined levels for classifying update blocks according to a set of attributes, each level Supporting a subset of up to a predetermined maximum number of updated blocks; and a rule set for the new predefined level to specify the updated area within the individual subsets to be replaced Block; - group subset area 'which contains update blocks by level; and 124919.doc 200837562 Close and remove components, i . The piece is used for when the door is broken into the same level and the block is closed and the one of the subsets of the updated block containing the maximum number of updated blocks is removed. The update block is selected according to the corresponding replacement rule for the same level. The memory of any one of claims 15 to 27, wherein the memory has a memory unit each storing data of one bit. The memory of any one of claims 1 to 5, wherein the memory has a memory unit each storing more than one bit of data. 124919.doc
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