TW200727303A - A method and memory capable of improving the endurance of memory - Google Patents

A method and memory capable of improving the endurance of memory

Info

Publication number
TW200727303A
TW200727303A TW095119870A TW95119870A TW200727303A TW 200727303 A TW200727303 A TW 200727303A TW 095119870 A TW095119870 A TW 095119870A TW 95119870 A TW95119870 A TW 95119870A TW 200727303 A TW200727303 A TW 200727303A
Authority
TW
Taiwan
Prior art keywords
record
memory
cells
record cell
endurance
Prior art date
Application number
TW095119870A
Other languages
Chinese (zh)
Inventor
Ching-Yuan Lin
Yen-Tai Lin
Original Assignee
Ememory Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ememory Technology Inc filed Critical Ememory Technology Inc
Publication of TW200727303A publication Critical patent/TW200727303A/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/349—Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/349—Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
    • G11C16/3495—Circuits or methods to detect or delay wearout of nonvolatile EPROM or EEPROM memory devices, e.g. by counting numbers of erase or reprogram cycles, by using multiple memory areas serially or cyclically
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/102—External programming circuits, e.g. EPROM programmers; In-circuit programming or reprogramming; EPROM emulators

Landscapes

  • Read Only Memory (AREA)

Abstract

A method capable of improving the endurance of memory includes: detecting whether a record cell is the last record cell of a set of record cells it belongs to or not; and erasing the data of a corresponding set of multiple-time programmable memory blocks and erasing the set of record cells if the record cell is the last record cell of the set of record cells it belongs to. The method further includes programming a record cell corresponding to the first non-programming one in the set of record cells if the record cell is not the last record cell of the set of record cells it belongs to.
TW095119870A 2006-01-08 2006-06-05 A method and memory capable of improving the endurance of memory TW200727303A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US76628806P 2006-01-08 2006-01-08

Publications (1)

Publication Number Publication Date
TW200727303A true TW200727303A (en) 2007-07-16

Family

ID=38251539

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095119870A TW200727303A (en) 2006-01-08 2006-06-05 A method and memory capable of improving the endurance of memory

Country Status (3)

Country Link
US (2) US20070159883A1 (en)
CN (1) CN1996497A (en)
TW (1) TW200727303A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI470429B (en) * 2009-01-15 2015-01-21 Seiko Instr Inc Memory device and memory access method

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3648245A (en) * 1970-01-30 1972-03-07 Burroughs Corp Time-shared apparatus for operating plural display media, and display methods including paging, displaying special forms and displaying information in tabulated form
DE3315047A1 (en) * 1983-04-26 1984-10-31 Siemens AG, 1000 Berlin und 8000 München INTEGRATED CIRCUIT WITH AN APPLICATION MEMORY DESIGNED AS A NON-VOLATILE WRITE-READ MEMORY
JPH0635227B2 (en) * 1985-07-31 1994-05-11 トツパン・ム−ア株式会社 IC card having means for reading update information and history information
US4752871A (en) * 1985-09-30 1988-06-21 Motorola, Inc. Single-chip microcomputer having a program register for controlling two EEPROM arrays
US5353256A (en) * 1993-06-30 1994-10-04 Intel Corporation Block specific status information in a memory device
US5485572A (en) * 1994-04-26 1996-01-16 Unisys Corporation Response stack state validation check
US5642311A (en) * 1995-10-24 1997-06-24 Advanced Micro Devices Overerase correction for flash memory which limits overerase and prevents erase verify errors
US5982665A (en) * 1999-03-29 1999-11-09 Silicon Storage Technology, Inc. Non-volatile memory array having a plurality of non-volatile memory status cells coupled to a status circuit
US6396741B1 (en) * 2000-05-04 2002-05-28 Saifun Semiconductors Ltd. Programming of nonvolatile memory cells
US6522580B2 (en) * 2001-06-27 2003-02-18 Sandisk Corporation Operating techniques for reducing effects of coupling between storage elements of a non-volatile memory operated in multiple data states
US6728137B1 (en) * 2003-04-29 2004-04-27 Ememory Technology Inc. Method for programming and reading a plurality of one-time programmable memory blocks
JP2004335056A (en) * 2003-05-12 2004-11-25 Sharp Corp Method of programming and erasing semiconductor memory having a plurality of memory cells
US7706183B2 (en) * 2005-07-27 2010-04-27 Spansion Llc Read mode for flash memory

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI470429B (en) * 2009-01-15 2015-01-21 Seiko Instr Inc Memory device and memory access method

Also Published As

Publication number Publication date
US20080056013A1 (en) 2008-03-06
CN1996497A (en) 2007-07-11
US20070159883A1 (en) 2007-07-12

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