TW200632658A - High-speed transmission memory module and method - Google Patents
High-speed transmission memory module and methodInfo
- Publication number
- TW200632658A TW200632658A TW094106572A TW94106572A TW200632658A TW 200632658 A TW200632658 A TW 200632658A TW 094106572 A TW094106572 A TW 094106572A TW 94106572 A TW94106572 A TW 94106572A TW 200632658 A TW200632658 A TW 200632658A
- Authority
- TW
- Taiwan
- Prior art keywords
- error correction
- memory access
- speed transmission
- direct memory
- buffer
- Prior art date
Links
Landscapes
- Read Only Memory (AREA)
Abstract
The present invention discloses a high-speed transmission memory module and method. The high-speed transmission method of the present invention is executed between a static memory and a flash memory for transmitting data from the static memory to the flash memory by means of a plurality of buffers so as to achieve a bi-directional high speed transmission mode. The method comprises: setting automatic direct memory access actions of the buffers; activating a direct memory access transmission mode; obtaining an error correction code from an error correction module; completing the direct memory access actions; placing the error correction code in the flash memory; and completing the automatic direct memory access actions of the buffers. The present invention also provides a high speed transmission memory module, which comprises a first buffer, a second buffer, an error correction circuit, a direct memory access unit and a microprocessor. The error correction circuit is electrically connected to the first buffer. The direct memory access unit is electrically connected to the second buffer. The microprocessor is electrically connected to the error correction circuit and the direct memory access unit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW094106572A TW200632658A (en) | 2005-03-04 | 2005-03-04 | High-speed transmission memory module and method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW094106572A TW200632658A (en) | 2005-03-04 | 2005-03-04 | High-speed transmission memory module and method |
Publications (1)
Publication Number | Publication Date |
---|---|
TW200632658A true TW200632658A (en) | 2006-09-16 |
Family
ID=57809233
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW094106572A TW200632658A (en) | 2005-03-04 | 2005-03-04 | High-speed transmission memory module and method |
Country Status (1)
Country | Link |
---|---|
TW (1) | TW200632658A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI476778B (en) * | 2007-08-21 | 2015-03-11 | Samsung Electronics Co Ltd | Ecc control circuits, multi-channel memory systems including the same, and related methods of operation |
-
2005
- 2005-03-04 TW TW094106572A patent/TW200632658A/en unknown
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI476778B (en) * | 2007-08-21 | 2015-03-11 | Samsung Electronics Co Ltd | Ecc control circuits, multi-channel memory systems including the same, and related methods of operation |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TW200707456A (en) | Wrapper circuit and method for interfacing between non-muxed type memory controller and muxed type memory | |
TWI266324B (en) | Page buffer having dual register, semiconductor memory device having the same, and program method thereof | |
TW200741461A (en) | Memory interface to bridge memory buses | |
WO2007078913A3 (en) | Cross-architecture execution optimization | |
TW200737756A (en) | An electronic device with dual antenna structures and their switching method | |
TW200609640A (en) | Electronic display system, electronic paper writing device, electronic paper display device and method for manufacturing the same | |
TW200506961A (en) | Memory channel with unidirectional links | |
TW200705938A (en) | Data transfer control device and electronic instrument | |
JP2012515377A5 (en) | ||
TW200723788A (en) | Single chip multimode baseband processing circuitry with a shared radio interface | |
GB2438116A (en) | Memory buffers for merging local data from memory modules | |
TW200705375A (en) | Display driver and electronic instrument | |
TW200620127A (en) | Memory card, card controller installed in memory card, and processing unit of memory card | |
WO2008126755A1 (en) | Optical transmission module and electronic device | |
TW200518110A (en) | Semiconductor memory device capable of adjusting impedance of data output driver | |
US20120131247A1 (en) | Apparatus for peripheral device connection using spi in portable terminal and method for data transmission using the same | |
WO2010025205A3 (en) | Method and apparatus to combine power and control signals in a mobile computing device | |
RU2013120139A (en) | BASIC RADIO COMMUNICATION STATION (OPTIONS) AND METHOD FOR CARRYING OUT COMMUNICATIONS (OPTIONS) | |
TW200705265A (en) | A method and system for elastic signal pipelining | |
WO2008027792A3 (en) | Power line communication device and method with frequency shifted modem | |
WO2006116504A8 (en) | Changing transceiver module device addresses using a single host interface | |
TWI266479B (en) | High-voltage-tolerant feedback coupled I/O buffer | |
TW200639870A (en) | Method of specifying pin states for a memory chip | |
TW200639875A (en) | Configuration of memory device | |
EP2242265A4 (en) | A wireless communication receiver, a wireless communication receiving method and a television receiver |