SU873385A1 - Device for automatic adjustment of receiver sensitivity - Google Patents

Description

(54) DEVICE FOR AUTOMATIC ADJUSTMENT OF THE SENSITIVITY OF THE RECEIVER The invention relates to radio engineering and can be used in devices for technical diagnostics, radio astronomy and radio measurements. A device for automatically adjusting the sensitivity of a detector, comprising a linear attenuator, a preselectr, a barrier filter, detectors, and a selector, on which the largest of the control signals 1, is known, is known. . However, this device is mainly intended to prevent false alarms from intermodulation interference that is strong but not in the intermediate frequency path. The most technically closest to the proposed technical solution is a device for automatically adjusting the sensitivity of the receiver, containing the first amplitude detector, amplifier, and connected tunable attenuator, to the control input of which the attenuator control unit is connected, linear path, second amplitude detector and element of comparison 2. However, this device has insufficient noise immunity. The aim of the invention is to improve noise immunity. To do this, in the automatic sensitivity adjustment device of the receiver, which contains the first amplitude detector, an amplifier and a tunable attenuator connected in series, to the control input of which is connected, an attenuator control unit, a linear path, a second amplitude detector and a comparison element, the output of the tunable attenuator are connected to the amplifier input , between the output of which and the input of the first amplitude detector are connected in series the reference linear path and attenuator, the output of the first a plitudnogo detector connected to the other input of the comparison element, between whose output and a control input of the control unit included attenuator driver control voltage, the first and chtoroy additional inputs of which are connected to additional outputs of the tunable attenuator and the attenuator control unit, respectively.

The attenuator control unit contains a clock pulse connected in series, a time selector, the other input of which is an input, and the output an additional output of the attenuator control unit, a pulse counter and a decoder.

The control voltage driver contains three matching elements, between the input of the controlling voltage generator and the first inputs of the matching elements are connected in series the trigger signal and the first inverter, between the output of the Schmidt trigger and the second inputs of the first and second Elements of coincidence are connected in series D-type trigger, another input which is the second additional input of the control voltage generator for each voltage, and the second inverter, the output of the D-type trigger is connected to the input of the third element is the same and, the third inputs of the first and second coincidence elements are the first additional input of the control voltage generator, between the output of the second coincidence element and the fourth input of the first coincidence element is included-delay element, the OR element is connected to the outputs of the first and third match elements the output of the driver control voltage.

FIG. 1 shows a structural electrical circuit of the device of FIG. 2 is a graph of control kits voltage control versus interference level.

The device automatically adjusts the sensitivity of the P1H-temnik and contains the first amplitude detector 1 amplifier 2, tunable attenuator 3, attenuator control unit 4, linear path 5, second amplitude detector 6, reference element 7, reference linear path 8, attenuator 9, driver 10 control voltage clock generator, 11 clock pulses, time selector 12, pulse counter 13, decoder 14, Schmidt trigger 15, first inverter 16, first match element 17, second match element 18, third match element 19, D-type trigger 20, second inverter 21, delay element 22, and element OR 23.

The device works as follows.

The input signal, which is an additive mixture of the useful signal and interference, through a tunable attenuator 3 is fed to the input of the linear path 5 and to the input of the amplifier 2. The initial attenuation of the tested attenuator 3 is set arbitrarily. Line path 5 converts the input signal. Voltage

intermediate frequency, which, after detection, is fed to the input of the comparison element 7. The reference linear path B converts the input signal passed through amplifier 2, similar to the conversion in the linear path 5. The output signal from the reference linear path B is fed to the input of the attenuator 9. The attenuation of the signal in the attenuator 9 is equal to the gain in the amplifier 2. After the detection, the signal enters at the other entrance of the Element 7.

With a low level of interference in the input signal, the useful signal at the outputs of the linear path 5 and the reference linear path 8 is practically not distorted. At the output of element 7, there is no signal. As the input noise increases, the nonlinear distortion of the useful signal at the output of the reference linear path 8 becomes noticeable, while at the output of the linear path 5 there is no distortion. This is because the level of interference at the input of the reference linear path 8 is greater than that at the input of the linear path 5 by switching on the input of the reference linear path 8 of the amplifier 2. In this case, the output voltage of the element 7 is proportional to the signal distortion in reference linear path 8. With a further increase in input noise, the voltage at the output of element 7 increases. The increase occurs until the level of interference at the input of the linear path 5 reaches the value at which nonlinear distortions begin to appear in the linear path 5.

Control voltage from the element output. 7 enters the trigger input 15 of the driver 10. When the voltage from the output of the element 7 is exceeded and or, the corresponding interference voltage U value at the input of the linear path 5 (Fig. 2), Trigger 15 is set to state 1. From the trigger output 15 1 is transmitted to the inputs of the first inverter 16 and the trigger 20. The logical symbol at the output of the trigger 20 always lags behind the symbol at the output of the trigger 15 by one trigger step of the counter 13. The counter 13 and the trigger 20 are clocked by the grid 11, generated by the first inverter 16 O is transmitted to entrances of the first ele of the element 17, the second element 18 and the third element 19. In this case, in any state of the flip-flop 20, these elements are set to the state O, which through the element OR 23 is transmitted to the control input of the time selector 12. At this moment the temporal selector 12 pulse generator 11 to the input of the counter 13 and

trigger control input 20, causing them to fire. The pulse from the output of the counter 13 through the decoder 14 is fed to the control input of the tunable attenuator 3 ,. reducing its transmission coefficient (KP) by one step. With a decrease in the CW of the tunable attenuator 3, the level of interference at the inputs of the linear path 5 and the reference linear path 8 decreases, and the magnitude of the control voltage at the output of the reference element 7 changes. If the state of the trigger 15 does not change, then the control input of the temporary selector 12 is transmitted O again, the counter 13 is triggered, and the decrease in the CW of the tunable attenuator 3 is reduced by one more step. This reduces the level of interference at the inputs of the linear path 5 and the reference linear path 8. Through several paths of the generator 11, when the interference voltage at the input of the linear path 5 is less and. voltage at the output of the element. less (FIG. 3), the trigger 15 is set to the state O, while at the output of the trigger 20. - 1. At the same time, the output of the first inverter 16 1 goes to the first inputs of the first element 17, the second element 18 and the third element 19. To the second input of the third element 19 is transmitted 1 from the output of the trigger 20. From the third element output 19 1 through the OR element 23 enters the control input of the temporary selector 12, which does not pass the generator pulse 11 to the counter 13. At the same time, the KP of the tunable attenuator 3 is fixed. At the values of interferences, At the input of the path 5 Uy, U, the control voltage at the output of element 7 is smaller and then (Fig. 3). Trigger 15 and trigger 20 are set to state O. In this case 1 from the output of the first inverter 16 goes to the first the inputs of the first element 17, the second element 18 and the third element 19. O, are transmitted to the second input of the third element 17, and the second inputs of the second element 18 and the first element 17 are fed 1 at the output of the second inverter 21, 1 is formed at the additional output of the tunable attenuator 3 at the maximum transfer ratio and O at Cex other states. When O comes to the third inputs of the second element 18 and the first element 17, they are set to the state O, which is transmitted by the control input of the time selector 12, the time selector 12 passes a generator pulse 11 through the counter 13 to the decoder 14 to the control input of the tunable

attenuator 3, resulting in a decrease in KP one step. In the event that the state of the trigger 15 remains, a further decrease in the KP of the tunable attenuator 3 continues. With the values of and 2 (Fig. 3), after several clock cycles of the generator 11, the trigger 15 is switched to state 1 while O remains at the output of the trigger 20.

UH and j (FIG. 3) of the CP of the tunable attenuator 3 is reduced to the minimum value without changing the state of the trigger 15. The next pulse of the generator 11 converts the tunable attenuator .3 into the maximum CP status. At this point, the third inputs of the second element 18 and the first element 17 enter 1. At the output of the second element 18, 1 appears, which is transmitted to

0 input element 22 delay. The output logic function of the delay element 22 is delayed relative to the input logic function for the period of the complete reversal of the counter 13, Since

The 5 n control input of the time selector 12 is again formed O, then the pulse from the generator 11 is retained, the time selector 12 arrives at the counter 13, which again reduces

l KP tunable attenuator 3 on one level. After a period of complete inversion of the counter 11, when the switchboard of the tunable attenuator 3 again becomes maximum, and at the third inputs of the second element 18 and the first

5 of the element 17 enters .1, the fourth input of the first element 17 from the output of the delay element 22 also enters 1, In the first element 17, 1 is generated, which is transmitted to

0 control input of the time selector 12. In this case, the KP fixation of the tunable attenuator 3 occurs.

Claims (2)

Invention Formula 45 1, Automatic sensitivity adjustment device of the receiver, containing the first amplitude -Q detector, an amplifier and a tunable attenuator connected in series, an attenuator control unit, a linear path, a second amplitude detector, and an element of comparison, are connected to the control input, which, in order to improve noise immunity, the output of the tunable attenuator is connected to the amplifier input, between the output of which and the input of the first amplitude detector are connected in series the reference linear path and attenuator, the output of the first amplitude detector is connected to another input of the elec The comparison terminal, between the output of which and the –up.-equating input of the attenuator control unit, is connected to the control voltage driver, the first and second additional inputs of which are connected to the additional outputs of the tunable attenuator and the attenuator control unit, respectively. 2. The device according to Claim 1, that is, so that the attenuator control unit contains a clock pulse generator connected in series, a time selector, the other input of which is an input, and the output is an additional output of the attenuator control unit pulse counter and descrambler. 3. The device according to claim 1, characterized in that the control voltage driver contains three coincidence elements, between the input of the control voltage generator and the first inputs of the coincidence elements are connected in series with the Shmi / 1t trigger and the first inverter, between the output and the trigger The secondary and second inputs of the first and second coincidence elements are connected in series with an O-type trigger, the other input of which is the second auxiliary input of the control voltage generator, and the second inverter, the output of the O-type trigger Not with the second input of the third match element, the third inputs of the first and second connection elements are the first additional input of the control voltage generator, between the second match element at the # 1 input and the fourth input of the first match element the delay element is connected to the outputs. The first and third matching elements are connected to the OR element, the output of which is the output of the control voltage driver. Sources of information taken into account during the examination 1. USSR author's certificate 395966, cl. H 03 G 3/20, 1971. 2. Authors certificate of the USSR 557474, kl.N 03 G 3/20, 1975 (prototype).