SU849096A1 - Phase-meter - Google Patents

Description

(54) PHASOMETER

The invention relates to electrical measuring technology and can be used for; measurements of the phase shift coefficient between two harmonic signals.

A phase meter is known that contains the first and second input devices, the first and second forming circuits, a cascade of matches, an averaging unit and an indicator, the outputs of the input devices being connected to the inputs of the coincidence cascade through the forming circuits, and the output of the coincidence cascade to the output which indicator 1 is connected.

The disadvantage of this phase meter is the ambiguity of counting phase shifts in the range of 180-0- + 80 °.

A phase meter is also known, which contains drivers, delay lines, anti-coincidence blocks, averaging blocks, a subtraction block, indicators of the module, and the sign of the phase difference. This phase meter not only determines the modulus, but also the sign of the measured phase difference in the range -180-6- + 180 ° 12J.

The disadvantages of the known device are the error defined by the sign of the phase difference. when measuring phase shifts close to 0 °, t 180 °, arising due to the inequality of the delay times of the delay lines and the inequality of the coefficients of the second and the first averaging, the inertia & determining the sign of phase separation during its transition to 0 ° due to the 1st unit blocks averaged at the level of the phase difference, tigrescence due to the asymmetry of the levels limited in the forwarders, as well as the presence of the douh indicator, complicates the work of the operator and reduces the productivity of labor15

The purpose of this is to increase the accuracy of determining the sign of phase expansion when measuring phase differences close to values of 0 °, i 180 ° and displaying information about the measured phase shift using a single indicator.

This goal is achieved by the fact that a phase meter containing two formers, two delay elements, an averaging unit connected to the indicator, introduces two inverters, six coincidence elements, a logic block, a trigger, the first and second controlled keys, and a reference voltage block, block the same averaging is performed with differential inputs, the outputs of the first and second drivers are connected to the inputs of the first and second inverters, respectively, the output of the first inverter is connected to the first input of the first matching element and cutting the first delay element with the first input of the third match element, the output of the second inverter with the first input of the second match element and through the second delay element with the first input of the fourth match element, the second inputs of the first and second match elements are connected to the outputs of the second and first drivers, respectively , and the outputs - with the second inputs of the fourth and third match elements, respectively, and with the inputs of the logic addition unit, the output of which is connected to the second inputs of the fifth and sixth terminals matches, the first inputs of which, respectively, with single and zero trigger outputs, to the S-input of which the output of the third match element is connected, and to the R input - the output of the fourth match element, the output of the fifth coincidence element is connected to the first input of the first controlled key , and the output of the sixth element coincides with the first input of the second controlled key, to the second inputs of which the reference voltage block is connected, the outputs of the first and second controlled keys are connected to non-inverting and inverting m inputs of the averaging block, respectively. FIG. 1 shows a functional diagram of the phase meter; in fig. 2 and 3 are time diagrams that show his work. The phase meter contains the formers 1 and 2, the inverters 3 and the delay elements 5 and 6, the first four elements 7-10 matches, the logical addition unit 11, the trigger 12, the fifth coincidence element 13, the sixth element 14 matches, the control keys 15 and 16, averaging unit 17 with differential inputs, an indicator 18 and a reference voltage unit 19. The device works in the following way. The input voltages Ugx and UBX and the phase shift between which is measured are fed to the inputs of shaper 1 and 2, respectively, Shaper 1 and 2 encode the polarity of the input signals with a binary code, and inverted qpbi 3 and 4 form reverse codes (Fig. 2c, d , d, e; Fig. 3, c, d, d, e). The direct signal code and the reverse UBX signal code arrive at the inputs of the coincidence element 8. and the reverse code of the signal Ugx- and the direct code of the signal are available at the inputs of the coincidence element 7. At the outputs of elements 7 and 8, pulses are formed, the duration of which is proportional to the module of the measured phase shift and is uniquely associated with it within the phase angles O + 180 ° (Fig. 2, g, g; Fig. 3, g, g) where T is the period of the input signals UBX; PhmM2 - phase shift between UBX and in the Pulsed series at the outputs of elements 7 and 8, the coincidences are shifted relative to each other by half the period of the input signals, since there are mutually identical codes on their like inputs. These pulse series are summed up by a logical addition unit 11 (Fig. 2, and; Fig. 3, and). At the same time, the constant component of the resulting impulse series Uji will not depend on the asymmetry of the limiting levels of the formers I and 2, leading to a shift of the zero line. The inputs of the match element 9 receive the output of the match element 8 and the reverse code of the Ugx Signal. pre-delayed by time - using the delay element 5 (Fig. 2, g, k; Fig. 3, g, k,) the inputs of the coincidence element 10 receive the output signal of the coincidence element 7 and the reverse code of the Ugx signal. delayed by time and. using the delay element 6 (Fig. 2, h, l; fig. 3, 3, l). Depending on the sign of the phase difference between UBX and UBX, at the output of one of the elements 9 or Yu coincident, at the moments corresponding to the beginning of the next period of advanced voltage, short pulses will appear. If O, then the pulses of duration Tj, according to in at the output of the coincidence element 9 (Fig. 2, m), and at the output of the coincidence element 10 all the time will be zero potential (Fig. 2, n). If H Oh, i.e. the voltage UBX xj is ahead of the voltage UBX .., at the output of element 9 the coincidence potential is zero (Fig. 3), and at the output of element 10 coincidence at the moments corresponding to the beginning of the next period of the signal UBX o. short pulses of duration fe will appear (Fig. 3, n). The output signals of elements 9 and 10 of coincidence are given respectively to the S and R inputs of the trigger 12. If V o, the first pulse from the output of the coincidence element 9 sets the trigger 12 to one (Fig. 2, o, p), and element 13 will open matches and pulses from the output of the AND block add to start at the control input of the control key 15 (Fig. 2 p), the output of which is formed with duration pulses corresponding to the value of the module of the measured phase shift, the amplitude of which is equal to the stable VQ value specified by block The leg 19 supports the voltage (Fig. 2, t). These pulses are fed to the inverting input of the averaging block 17. The control key 16 at this time is closed by the zero signal of the coincidence element 14 (Fig. 2, c) and at its output is also a zero potential (Fig. 2, y). If f o, then the first pulse from the output of the coincidence element 10 sets the trigger 12 to the zero state (fig. 3, p), the coincidence element 14 opens, and the coincidence element closes and the pulses from the output of the logical addition unit 11 start to appear the control input of the control key 16 (Fig. 3, c), at the output of which pulses of stable amplitude VQ and duration € will be generated (Fig. 3, The pulses from the output of the control key arrive at the inverting input of the averaging unit 17. A control key 15 at the same time closed zero potential from the output of the coincidence element 13 (Fig. 3, p) and its output is also a zero signal (Fig. 3, t). At the output of the averaging block 17 there will be a constant signal whose modulus is equal to ("By transforming the expression (2), we find that the signal module at the output of the averaging unit 17 is proportional to the module of the measured phase shift V -H (t.) 17 TG. The polarity of this signal will be positive if the pulses come from the output of the key 15 to the non-inverting input of the averaging block 17, i.e. . when H About (fig.2f) and negative, if the pulses arrive at the inverting input of this block, i.e. when C O (Fig. 3, f). Thereby, an unambiguous connection between the measured phase shift and the constant signal at the output of the averaging block 17 in the phase shift range of 180-0-80 ° is achieved. This voltage is measured by indicator 18, at the output of which we obtain a count of exhausted phase shift. As follows from the above, the inequality of the delay times σ, c and b of the delay elements 5 and 6 does not affect the accuracy of determining the sign of the variable phase difference, since the sign of the phase difference is fixed by the state of trigger 12, and the duration pulses are cG /} and FB from the outputs of elements 9 and 10, matches are used only to set trigger 12 to the appropriate state. If the sign of the measured phase difference does not change, then one of the inputs of trigger 12 periodically, at the frequency of the input signals, triggers pulses that confirm the state of the trigger. When the sign of the phase difference changes, after a time that does not exceed the period of the input signals, the first pulse received at the other input of the trigger 12 sets it to the opposite state. This achieves greater noise immunity and high speed in measuring the phase difference. Invention formula A phase meter containing two formers, two delay elements, an averaging unit connected to an indicator, characterized in that, in order to increase accuracy and to display information about the measured phase shift, with one indicator, additionally contains two inverters, six elements of coincidence, the logical addition unit, the trigger, the first and second controlled keys, and the reference voltage block, the same average block is made with differential inputs, the outputs of the first and second drivers are connected to the input The first and second inverters are respectively, the output of the first inverter is connected to the first input of the first matching element and through the first delay element to the first input of the third matching element, the output of the second inverter to the first input of the second matching element and through the second delay element to the first input of the fourth the match element, the second inputs of the first and second match elements are connected to the outputs of the second and first drivers, respectively, and the outputs are connected to the second inputs of the fourth and third elements coincide respectively with the inputs of the logical addition unit, the output of which is connected to the second inputs of the fifth and sixth elements of the match, the first inputs of which are respectively the single and zero outputs of the trigger, the S input of which is connected to the output of the third coincidence element, and R- the input is the output of the fourth matching element, the output of the fifth coincidence element is connected to the first input of the first controlled key, and the output of the sixth matching element to the first input of the second controlled key, to the second inputs of which is under oedinen block of the reference voltage, the outputs of the first n uofavl second proxy keys are connected to the inverting inputs neinvertiruyushim n averaging unit respectively. 84 8 Sources of information taken into account during the examination 1.Galakhova O.P., Koltik. E. D. and Kravchenko S. A. Basics of phase metering. L., Energy, 1976, with. 140-141. 256. 2.Avtorskoe-certificate of the USSR N 214557, cl. G 01 R 25/00, 10.02.67.

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Claims (1)

Claim A phasometer containing two shapers, two delay elements, an averaging unit connected to an indicator, characterized in that, in order to increase the accuracy and output information about the measured phase shift using one indicator, it additionally contains two inverters, six coincidence elements, a logical unit addition, trigger, first and second controlled keys and a voltage reference block, the averaging block is made with differential inputs, and the outputs of the first and second shapers are connected to the inputs of the first and second about inverters, respectively, the output of the first inverter is connected to the first input of the first match element and through the first delay element to the first input of the third match element, the output of the second inverter to the first input of the second match element and through the second delay element to the first input of the fourth match element, the second inputs of the first and second matching elements are connected to the outputs of the second and first formers, respectively, and the outputs are connected to the second inputs of the fourth and 'third matching elements with correspondingly, with the inputs of the logical addition block, the output of which is connected to the second inputs of the fifth and sixth coincidence elements, the first inputs of which are respectively the single and zero outputs of the trigger, to the S-input of which the output of the third coincidence element is connected, and the output is connected to the R-input of the fourth matching element, the output of the fifth matching element is connected to the first input of the first managed key, and the output of the sixth 7 849096 8 elements of coincidence - with the first input of the second managed key, to the second inputs of which the reference voltage block is connected, the outputs of the first and second controlled keys are connected to the non-inverting and inverting inputs of the averaging block, respectively.