SU712953A1 - Multichannel frequency-to-code converter - Google Patents

Description

one

The invention relates to the field of information conversion and coding and can be used in multichannel information-measuring systems with automatic data processing on digital computers.

Multichannel converters are known that are used in test systems of complex technological objects for converting the frequency of an information signal to code 1.

Their disadvantage is complex structure.

Of the known multichannel converters, the closest to the invention in terms of technical support is a multichannel frequency converter into a code, each channel of which contains a logical element BAN, the first input of which is connected to the source of the signal being converted, and the output and second input are respectively to the input and output of the counting device , as well as a unit for setting the conversion factor, a memory unit, a measuring counter, a trigger and two generators of single pulses, as well as a logical element AND and a block management 2.

The disadvantages of the known device should include the complexity of the structure.

The aim of the invention is to simplify the structure of the converter and increase its reliability. The proposed multi-channel frequency converter in the code contains in each of the channels a logical element BANGE, the first input of which is connected to the source of the signal being converted, and the output and the second input - with the input and

the output of the counting device, the second input of which is connected with the unit for setting the conversion factor, the trigger connected by the input to the output of the BANNER element, and the output to the first input of the generator of single pulses. In this case, the outputs of the scaling devices of all channels are connected via a multi-input logic element I to the control unit, the output of which is connected to the second inputs

the trigger inputs, the third inputs of the counting devices and the first input of the measuring counter, and its second input with the first output of the calibrated frequency generator, the second output of which combines the second inputs of the single pulse generators, the outputs connected to the information inputs of the memory block. A feature of the proposed converter is

The fact that in it the outputs of the generators of single pulses through the logical element OR are connected to the recording input of the memory unit, the address inputs of which are connected to the outputs of the measuring counter, and the output of the (n-1) -th bit of each recalculator is connected to the input of the corresponding trigger.

The drawing shows a block diagram of a multi-channel frequency converter in the code.

The multichannel converter contains in each channel an element BANCH 1, a scaler 2, a block 3 for setting the scale factor, a trigger 4 for starting the count and a generator 5 for a single pulse. Common elements for all converter channels are calibrated frequency generator 6, measuring counter 7, logical element OR 8, memory block 9, AND 10 legic element, AND control block.

The device works as follows.

Before starting measurements, depending on the frequency range of the input signals and the required conversion accuracy in each channel, using the unit 3 for setting the conversion factors, the corresponding coefficients for the conversion devices 2 are set.

During each measurement cycle, the control unit 11 generates a signal that returns the recalculating devices 2 and the starting points 4 to the initial state. The measuring counter 7 begins to count the pulses of the generator 6 calibrated frequency.

Trigger trigger 4 captures the moment of occurrence of the first pulse at the output of the BANNER 1 element and is set to state "1", allowing pulses of the calibrated frequency generator 6, out of phase relative to the counting pulses, to pass through the generator 5 single pulses to the corresponding information input (each input channel corresponds to one bit of the memory block), as well as through the OR element 8 to the recording input of the memory block 9.

Thus, when a pulse appears in any measurement channel or in several channels at the same time, a sign (logical "1 or" O) of the appearance of a pulse in the corresponding discharge channel is recorded in memory block 9 at the address corresponding to the measuring counter code. corresponding channel (s).

After the n − 1 pulse arrives at the scaling device 2, the origin trigger 4 is reset to the state “O. After the arrival of the pth pulse in the scaler, the trigger is re-energized and corresponding to this moment.

The feature of this channel is again recorded in the corresponding bit of memory block 9 at the address corresponding to the meter code. The block of the conversion factor at the same time prohibits the passage of pulses through the element BANNER 1 of the corresponding channel.

At the time of the termination of the counting, on the scaling devices 2, a measurement termination signal is generated in all channels at the output of the element And 10, which is fed to the control unit 11.

When reading information from memory block 9, the codes of the addresses of the channel attributes are determined, corresponding to the codes of the measuring counter at the time of arrival of the 1st and nth counting pulses.

The calculation of the measured frequency values is performed by the formula

f F, -m

 ii-f, t,

where (fi is the measurement result in the i-th channel; RK is the calibrated frequency;

Pg is the conversion factor in the i-th channel;

Noi - measuring counter code (cell address in the memory block) at the moment of starting the countdown in the f-th channel;

NH is the code of the measuring counter (cell address in the memory block) after filling the counting device in the ith channel.

Claims (2)

1. Certificate of author No. 296051, cl. G 01R 23/02, 1971. 2. The author's certificate number 598237, cl. H OZK 13/24, 1976 (prototype).