SU415669A1 - - Google Patents

Description

one

The invention relates to the field of pulsed technology and can be used in synchronizers, frequency meters, executive control devices of discrete automatic control systems and other devices for multiplying the frequency of periodic pulses. It is especially advisable to use it in the range of low and infra-low frequencies with a large required multiplication factor, a high uniformity of the distribution of output pulses in time, and the need to maintain a given multiplication factor in a wide range of input frequencies.

It is known device auth. St. No. 337947. A disadvantage of the prototype is the presence of a cut-off frequency, above which a jump in the multiplication factors occurs.

The proposed device differs from the known one in that in order to expand the frequency range, an additional waiting multivibrator, a reversible counter, two "OR and two schemes" And, one of which is connected between the reference generator and the first counter, are entered into it, its second input is connected to by the addition bus of a reversible counter, in which the control trigger is connected by the subtraction input to the multiplier input, and by the addition input to the output of one of

additional circuits "OR, inputs connected to the outputs of the comparison device and the second circuit" AND, the inputs of which are connected to the outputs of the bits of the reversible counter, the counting input of the latter connected to the output of the reference oscillator, and the input of the zero setting to the output of the multivibrator connected to the output of the second additional circuit

“1-1LI, one of its inputs is connected to the input terminal of the multiplier, and the other is connected to the output of the comparison device.

The essence of the proposed device is illustrated in the drawing, which shows

block diagram of a device comprising the following nodes: reference generator 1; frequency divider 2; counter 3, 4, 5, storage device (memory) 6; delay line 7; comparison device 8; schemes “OR 9, 10, 11;

reversible counter 12; control trigger 13; schemes “i 14, 15; railway; general multivibrator 16; input 17 multiplier; output 18 multiplier. The output of the reference generator 1 is connected to a frequency divider 2, in which the division factor K is equal to the required multiplication factor, as well as an AND 15 circuit and a reversible counter 12, which contains a control trigger 13 and a counter 5. In the diagram, the summation input of triggering 13 and the input of the summation bus of the counter 5 is indicated by the sign "+", the input of the subtraction of the control of the trigger 13 and the input of the subtraction bus of the counter 5 are marked by the sign "-. The output of the divider 2 is connected to the input of the counter 3, the outputs of the cells of which are connected to the inputs of the cells of the memory 6. In addition, the output of the divider 2 is connected to the input of the zero setting of the counter 5. The outputs of the cells of the counter 5 are connected to the inputs of the AND 14 circuit so that The output signal appears only when the counter is empty. From the output of the circuit "And 14 through the circuit" OR 10, the signal is sent to the summing input of the control trigger 13. One of the outputs of this trigger is connected to the subtracting it, and the other to the folding bus of the counter 5 and the input of the circuit "And 15. whose output is to the keys the counting input of the counter 4. In the drawing, the inputs of the installation of the zero divider 2, the counters 3, 4, 5 and the memory 6 are indicated by the number “O, and the counting inputs of the counters 3 and 4 are marked with“ -f. From the input 17, the multiplier of the signal is fed to the input of the zero setting of the memory

6, to the delay line 7, to the boilout control input, its trigger 13, and through the scheme “OR 11 - start the waiting multifunction 16, the signal from which goes to the output 18 of the multiplier. From part of the delay line 7, the signal is input to the read input of counter 3, and from its end to pa inputs of the installation of zero divider 2, counter 3, and through the OR 9 circuit to the input of the nynq counter 4. The outputs of the storage unit 6 and counter 4 they are connected to a comparing device (device 8), the signal from which arrives at the inputs of the circuits “OR 9, 10, 11.

The device works as follows.

From the reference generator 1, the pulses are continuously fed to divider 2, the pulses from which are counted by counter 3. As this counter is reset to zero position, each pulse from input 17 of the multiplier that passes through the dead-down line

7, and the measurement process is immediately resumed there, then at the end of each period the input pulses of Gwh counter 3 will have a reading of fon / K-Tn, where fon is the frequency of the pulses of the reference generator 1. In addition, each pulse of the divider 2 is reset to a bullet the state of the counter 5. In this case, the output of the circuit "AND 14 is formed by an impulse, which is not accessed through the circuit" OR 10 to the input of the control of its trigger 13, which switches the reversible counter 12 into the addition mode. From the folding bus of the reversible counter 12, an unlocking potential is applied to the AND 15 circuit, and the pulses of the generator 1 are fed through this circuit to the counting input of the counter 4.

By the time of arrival of the next pulse to the input 17 of the multiplier, the counter 5 will accumulate the number of pulses, the arrival time of which is equal to the measurement error of the period of input pulses by the counter 3. With the arrival of the next pulse, the input 17 of the multiplier is set to the bullet position of the charger 6, and then the pulse arriving with part of the delay line 7, the number of fon / KT ,,: is read from counter 3 to the memory 6. In addition, the control trigger 13 of the reversible counter is transferred by a pulse from the input 17 of the multiplier and it is set to the subtraction mode . In this case, the unlocking potential is removed from the AND 15 circuit, and the arrival of pulses from the generator 1 to the counter 4

10 is terminated. A pulse from the end of the delay line 7, having a delay time shorter than one of the irregulars of the hegerator 1, is reset to zero positive counter 3, divider 2 and through the OR 9 counter 4 scheme.

15 At the same time, the measurement process immediately resumes in meter 3, and in meter 5, the pulses accumulated in it by the end of the previous multiplier input signal period are subtracted. At the time of emptying

20 of the counter 5, as described above, the reversible counter 12 switches to the adding mode and unlocks the < 13 > circuit through which the pulses of the generator 1 enter the counter 4. At some moment /; indication

25 counter 4, equal to fm: -t, comparing with the number stored in memory 6, and cf. CH / new device 8 gives impulse1) C. Equivalent to these

T

numbers, but as -. From Wed 30

Hiero device 8 through the scheme "OR 1 signal is fed to the launch of the waiting 1. its multivibrator 16, FORMATTING OUTPUT; IMPUL1) C

multiplier

5 Thus, jTOC.ie of the arrival of each successive impulse on the 15th turn 17 of the multiplier at the exit 18 of the multiplier, impulses appear through one L-th part of the neyrode of the input magnetic pulses. From the output sravnivaydego device

0 8 sial also enters through the RSHI 9 scheme to the input of the zero setting of the counter 4, dropping it to the iul field (, and the grinding process is immediately resumed in neN. Therefore, the output of the multiplier 18 of the multiplier with a period T:, / TO.

With the arrival of the next pulse on the inlet 17 of the multiplier, the processes in the circuit are repeated.

It follows from the above that after the pulse arrives on the input 17 of the multiplier, the first output pulse of the multiplier is delayed by pa prem, equal to the measurement of the counter 3. This eliminates the effect of its error associated with the counting resolution, pa factor

5 multiply the device. If we ignore the factors associated with the discreteness of the measured counter of 4, then the full time interval from the arrival of the pulse to the input 17 of the multiplier to the issuance of the ((th) pulse

A 0 by 18 multiplier is exactly equal to the OLD period of the multiplier input pulses. But since two adjacent measurements of the same time interval by counter 4 can differ by ± 1, the impulse

3 pa output comparison device 8 could

It may appear for one period of the pulses of the generator 1, sooner or later, of the next input pulse of the multiplier. An advance would not affect the multiplication factor, and the lag would cause the multiplication factor to jump by one. To eliminate this possibility, the output pulses of the multiplier are formed by a waiting multivibrator, generating pulses not shorter than two periods of the pulses of the generator 1. Therefore, the multiplier 18 either passes a pulse from the output of the comparison device 8, or from the input 17 of the multiplier, depending on which of them comes first. Thus, the pending multivibrator 16 eliminates the influence of the measurement error associated with the pulse counting counter of the counter 4 on the multiplication factor of the device.

Subject invention

Periodic pulse frequency multiplier by author St. No. 337947, characterized in that, in order to expand the ranges of frequencies, g, an additional waiting multivibrator, a reversible counter, two "OR and two" And, one

The CCs of which are connected between the reference generator and the first counter, its second input is connected to the folding bus of the reversible counter, to which the control trigger is connected to the subtracting input to the multiplier input, and to the addition input to the output of one of the additional OR circuits connected to the outputs device and the second circuit "And, the inputs of which are connected to the outputs of the bits of the reverse

the counter, the counting input of the latter is connected to the output of the reference generator, and the installation of the pool installation is connected to the output of the frequency divider, the input of its multivibrator is connected to the output of the second additional OR circuit, its input is connected to the input terminal y: with the output of the comparison device.

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