SU1706054A1 - Alarm device - Google Patents

Abstract

The invention relates to electronic equipment, in particular, to an alarm system, and can be used to protect apartments and other premises by transmitting messages over a telephone communication line. The purpose of the invention is to increase the reliability of the protection of the object. The device contains a phone 1, the first, second and third switching elements 2. 3, 13, amplifier 4 AC, sensor 6, drivers 5. 10, 12. 37 delay, elements 7, II, 43, elements OR 8, 16, 29. 23, 32. 41. triggers 9, 17, 26, 29, 35, shaper 14 of signal Reset, voltage divider 15, decimal counters 18, 28, clock generator 19. strobe shaper 21, binary counters 22, 24 27, 34, 36. 38. RAM memory unit 25, voltage decoder 39, information reproduction unit 40, single-vibrator 42, detector 45, and ground amplifier 46. 1 il.

Description

And the term refers to electronic lexHHKe in particular to burglar alarms. and can be used to protect apartments and other premises by sending messages over a telephone line.

A known device for burglar alarms, comprising a detector, a set of information, a radiotelephone, a signal receiving unit and a recording unit. When messages arrive, the recording unit fixes the coordinates of the location of the tool.

The disadvantage of the rolled device is due to its low reliability.

Closest to the proposed one is a device containing the first and second binary counters, a pause generator, a pulse generator, an information reproducing unit and a key.

The known device is also characterized by low reliability.

The purpose of the invention is to increase the reliability of the device.

This goal is achieved by heme, that a second switching e is introduced into the device containing the first and second binary counters, a clock generator, a first delay driver, a first switching element, an information reproducing unit. 1meng, second delay driver, sensor, first element AND, first element I.II, first trick, second element I., third delay driver, third switching element, shaper. Iel reset - Reset, voltage divider. vyureny element OR. second trigger, black decimal counter, third element PLI. gate shaper, fourth ele mesh mesh OR. RAM block, third trigger, third binary counter, fourth trigger, decoder, digital indicator. fifth element OR, buffer amplify and -, fourth binary counter, fifth ιριιιа ер. fifth binary counter, fourth delay driver, sixth binary counter, voltage switch, AC amplifier, sixth OR element, one-shot. The first element is an I. detector, a DC amplifier, the first inputs of the first and second switching elements being the inputs of the device. the second inputs of the first and second switching elements are connected to the telephone line, the output of the first switching element ;! connected to the reset input of the third binary counter, the output of the buffer amplifier is connected to the output of the information reproducing unit, the input of the AC amplifier, the third input of the second switching element, the output of which is connected to the input of the second (former (gate, first input of the first OR element. the output of which is connected to the zero input of the first trigger, the single input of which is connected to the output of the first element And, the first and second inputs of which are connected respectively to the outputs of the sensor and the second driver delay, the output of the third delay driver is connected to the single input of the second trigger, the inverse output of which is connected to the second input of the third delay driver, the reset inputs of the first binary and second decimal counters, the sync input of the second binary counter, the second output of the first binary counter is connected to the sync input of the decoder, the zero input the fourth trigger, the first input of the second OR element, the output of which is connected to the zero input of the second trigger, the sync input of which is connected to the reset input first decimal counter. the first input of the third OR element. the information input of the RAM block, the output of the voltage divider, the input of which is connected to the first output of the third switching element, the second output of which is connected to the first input of the gate former, the output of which is connected to the write-read input of the operable memory block, and whose crystal select input is connected to the second entrance to the formation of the strobe, the sync input of the first binary counter and the output of the third eleut-111 a I.'111. second in ,. which is connected to the output of the first decimal counter, the control input of which is connected to the direct output of the second trigger, the sync inputs of the first decimal and fourth bottom of the other counters are connected to the output of the young ι operator, the output of the fourth element I.'111 is connected to the control input of the second binary counter, the single input of the fourth trigger, the output of which is connected to the reference input of the mountain decryptor, the information input of which under the keys to the output of the second is decimal! about the nickname, the sync input of which is connected to the output of the RAM block and to the first \ input of the fifth OR element. the output of which is connected to the input of the buffer amplifier. the second output of the fifth OR element is connected to the first input of the third element I. by the zero inputs of the third and fifth triggers and with the output of a one-shot, the input of which is connected to the output of the sixth OR element, the second input of which is connected to the output of the fourth delay driver. the input of which is connected to the clock input of the sixth binary counter, the input of the voltage switch and the direct output of the fifth trigger, the single input of which is connected to the first output of the fourth binary counter, the reset input of which is connected to the second input of the second element I. the control input of the third binary counter and the inverse output of the third trigger , the output of the AC amplifier is connected to the input of the detector, the output of which is connected to the input of the force

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memory, the output of the decoder to the input of a digital indicator.

The drawing shows fu'ikhinonal · share scheme of the device

The device contains an I. aepBi-.iii 2 telephone and a second 3 switching elements, an AC amplifier 4, a second delay shielder 5 delay, dht .nk h w a single element And 7. the first element And · '! ·! Ker trigger 9, first shaper ·; Ι delay, second element AND 11.! [; eiHii if .р. the delay mediator 12, the third comm \ ι: ·; ιυ on element 13, driver 14 foreign exchange: “Reset-”, voltage divider 15, second element OR 16. second ιρπιιορ 17. first decimal counter 1'8. the clock gene: '. ·: "o ;. 19, | third element! 1, '! And 29. formed week, '21 strobe, the first schoichnp'. οιιτ'ΐ-κ 22. the fourth element And, 'П1 2 1, the second s .-' ч г1ЫЙ counter 24, block 2.5 will operate on the innovative llamagas, third flu 26, [horny binary counter 27, game ten ¹ ai.nt counter 28 fourth trigger 29, decoder 30. digital indicator 31. fifth buffer amplifier 33, new counter 34, fifth binary counter 37 delay, chic 38, playback switch 40 tape recorder, sixth Novibrator 42. third background line 44.

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NYA 1 all just simi, [hh: ¹ upayup! but ί: ·. · how he · is through telshsh'y nakhi (4 ¹ ) m · Ί. du is the _ι,: φ, peak iosteiae; series of impu lsoz i. those. ιυφοιιHc.it lines, forms, and roci ι in · governing s, .gnlav R / \ V. CS and counter state changes 22 are found in these nmps'. '.' N. soybeans At the same time, in boxes the blocks are 25 zi11 ιс 1.1 n; ιkotchch “О ί 1 after ιιο / τνη: yenich after ι of his impulse u ι telephone .ooihi · n.ch chho until ... counter 18 a and pf-> pma ι ::: / | io ·. · input · 'of current 25 \ sta in in n · on ··' s P and. 1st volna gelnio. I will follow ιοιι.ιιν ι rp.>Gi>'λ' \ V Goyan and I re: ch and k ,, 22. |>·; · neon, constant '.; whole 1 and g · .ι, ι netchika 1 I i 1 ri ·. p.m. a encl. pl; about s · about. (.

<| OMM II |. Yu I I. OSS! ‘- N.’I '! PD M 1' .: · and FF i O- 'o | n about. ·. LO11 ’? ' O. G '. /; / ’’ K. . r re “O” phone numbers. Upon completion of the recording of information in ten cells of the memory unit 25, a signal is generated at the second output of the counter 22, which, passing through the OR element 16, resets the trigger

17. The “1” level that appeared on the inverted output of the trigger 17 changes the state of the counter 24 and resets the counter 22. Similarly, information is recorded about the subsequent digits of the subscriber's phone number. Binary counter 24 - with pre-installation. and during the initial installation and after overflow, an add-on code of up to 16 is entered in accordance with the number of digits in the phone number. After recording the last digit of the phone number at the second output of the counter 24, an overflow signal is generated, which triggers the trigger 26. A negative voltage drop appearing on the inverse output of the trigger 26 changes the state of the binary counter 27.

Next, the element 13 is squeezed and the handset of telephone 1 is dropped. After this, the telephone number of the second subscriber is recorded in the same way as described. Simultaneously with the recording of information in the block 25 of the memory in order to ensure the reliability and elimination of malfunctions, the recorded information is monitored on the digital indicator 31.

When dialing the first digit of the phone number after the trigger 17 is cocked, the level “0” appears at the reset input of counter 28. allowing the counter to work. Since in the process of selecting the cells of the block 25 of the memory is recorded with subsequent reading of the information. then, therefore, a series of pulses are received at the clock input of the counter 28, which should quantitatively correspond to the dialed digit. When a signal appears on the second input of the counter 22, the status information of the counter 28 is recorded in the input memory register of the decoder 3.0. In addition, the trigger 29 is reset. “0”, which is input to the control input of the decoder 30. Allows the identification of information on the digital indicator 31. After resetting the trigger 17, the counter 28 is also reset.

After dialing the last digit of the subscriber's phone number, trigger 29 is set at input S to state “1”. the indicator goes off.

To transfer the device to the security state of the object, the switching element 3 is pressed. In this case, the telephone connection with the telephone line is disconnected, and the outputs of the buffer amplifier 33, tape recorder 40 and the input of the amplifier 4 are connected to it. Besides. the delay driver 5 starts. After 15 seconds, at the output of the delay driver 5, level “1” will be formed, allowing the device to work as an electronic watchman.

If after this someone enters the guarded object, sensor 6 is activated and a high voltage level appears at the output of the And 7 element, which triggers trigger 9. If, after entering the room, for 15 s switch the switching element 3 to the released position, then the level “ 1 ”from its output, passing through the element OR 8, it enters the input of zeroing trigger 9 and resets it. Otherwise, after 15 seconds the level 1 appears at the output of the delay driver 10, which goes to the first input of the AND element I. The trigger 26 is reset to zero in the initial state, therefore, the level 1 is also present at the second input of the AND element 11. This leads to the inclusion of the shaper 12 and the installation of the trigger 17 at the input S.

Since the switching element 13 is depressed, the voltage divider 15 is disconnected from the telephone line. At the sync input of the trigger 17, the input R of the counter 18, the first input of the OR element 20 and the data input of the block 25 there is a level of "0" and, in addition, at the input V of the shaper 21 - "0", which is a ban on the formation of the R / W signal. Thus, since the input V of the counter 18 receives the enable signal from the direct output of the trigger 17, and the clock input C has a frequency of 100 H from the output of the clock generator 19, pulses with a frequency of 10 Hz are formed at the output of the counter, which, passing through the OR element 20 are received at the input of the selection of the memory block 25 and the input from the binary counter 22. After the information on the first digit of the subscriber’s phone number is sampled from the memory block 25, the trigger 17 is reset to zero by the pulse from the second output of the counter 22. Level “I” from the inverted output of the trigger 17 starts Ripper 12 for a pause between a set of digits of a phone number (2-3 s), and also resets counter 22 and changes the state of counter 24. Upon completion of a pause, a trigger 17 is set by a signal from the output of shaper 12, after which information about the second digit of the telephone number .. Similarly, information is read about the subsequent digits of the telephone number of the first subscriber until the counter 24 overflows the number of digits. The overflow signal from the second output of the counter 24 cocks the trigger 26, which leads to a change in the state of the counter 27, the initial installation of the counter 24, the resolution of the counters 34 and 36 and the prohibition of the shaper 12.

In the process of reading information from a series of pulses from the output of the memory unit 25; / 06D54 ίο

through the tribes! 11 / 1M -12. buffer with enly gel 33 and contacts Utility a 3 nights to the telephone line After ssi ι ш у ';) (youth volume response ssh on. ι in the thread. bus sludge and short beeps and ί t and LINES lid · cry nit input \ si whether; ate 4 variable! about current 11sequential united l · amplifier

alternating current detector 15 and force gel 46 constant current osu / Pest vg, but d isolating the envelope of telephone lines and amplifying them to the level of logical signals

The counters 34 and 36 and rpnirej '35 nroi <lead the current selection of the received channels. The pulse sequence r of the output of the amplifier 46 goes to the reset input of the counter 34. and the clock input From the counter is supplied with an hour of UH Hz. In case the subscriber’s phone number is in the “Busy” state and short beeps are received, the counter has time in time for the 34th beep duration; ιτο, ιιιιιι ι „gy only until the discharge corresponding to the first output ('kg.t from the first output of the' counter 34 goes to the clock input / 'of the pilot 36, which produces a count of short beeps. After heating with the fourth short beep on counter-36 output appears to them 11u.11> <·, which starts the single-vibrator 42 la while immigrating the lowering of the telephone / cabin | 2 3 s). Signal with a single vibrator height of 42. going through

e. 1 element 32. turn off the buffer amplifier 33 and. besides this, I am observing triggers 35 and 26. This leads to the prohibition of the work of the chikov 34 and 36 and to the new one at the launch of the formronate, ia 12 checks. Then, similarly to the described wasp, the lasts are: ii> iBai: i'c from block 25 memory: -! phone background numbers ;, second caller. And if the subscriber’s number turned out to be free after the electronic call was connected to him, then after the TTL long beep the pulse appears at the second output, the binary counter 34. The driver starts the tripper 35 Level “П” from the inverted output of the trips 35 I block the counter 36. and the level -1 "from the direct output opens the voltage switch 3'4, which turns on the power of the recorder 40. It also starts the delay driver 37 and changes the state of the counter 3 <h The tape recorder is in the" Play "position. and after switching on the pi yuan, the message previously recorded on the magnetic tape, · from the output of the tape recorder, I have contact: "! Element 3 is issued at the bottom of the · fonghy line. After the output of the message at the output of the delay driver 37, the level “1” appears, which I launch the one-shot, after the gateway the trapper 35 is reset and. respectively. turns off m; knitophone 40.

After. goy. how the state of counter 38 will change. On this first exit. d · Nov, I’ll go to level 3 ”, which will block the delay of the counter '27. Further, the device will be removed from the first subscriber until "e \ pore." until the number is free.

After issuing messages to two subscribers, a high level appears at the second output of counter 38 and the trigger 9 is reset. At this, the device works as an electronic watchdog.

In the case of · using hstpoyuv as an electronic secretary, E.icmcht 2 is set to "Sec.> ·, While> telephone 1 remains connected to the telephone line permanently, and the level" 1 is sent to the counter zeroing input 27 “Further, the operation algorithm is similar to that described for the case the use of foliage, foliage as an electronic watchman, except that communication is with one subscriber. Sensor 6 may be absent, and instead of it, a timer can be used that allows you to contact the subscriber at a specific time.

Thus, the device allows me to reliably protect the facility by alerting subscribers in critical sign-ups, whose telephones are entered in the operational support unit. Using the device as an electronic secretary provides an extension of the potential.

Claims (1)

Φθ / ’3 (ί /.! Π Μ.ΙοΓψΐΊ I’Hll'l A device for security stitching, containing the first and second typical counters, a clock, the first delay driver, the first switching -. ' information reproducing unit. sensor, di. with u,! (> u to increase the reliability of the protection against |, ekg;!. the second switching element, the second delay formers, the first element I, the first element I. I11. the first rpiniep, the second element I. the third former delay are introduced into the device. third switching element, signal conditioner <('overrun ", voltage divider, second electric coils I, ^Г Н1. second tripper, first. seeing an ordinary counter, third element ΙΙ, ΊΗ, gate former, fourth element Η.ΊΗ, operating unit memory, third trigger, third binary counter, second decimal counter, fourth t rigger, deshi.rr.1tor. digital indicator, fifth Ashman! 11.Ί11. buffer boost. !! ,, fourth binary counter, fifth three! ger ιιπτπ, ίΐί two ¹ ·: / / counter, fourth driver with · sixth binary counter, voltage switch, alternating voltage! './ current, six I 111 elements, one-shot, third element 11. detector, constant current amplifier, moreover, the first inputs are u rg..GO AND G.TORO! Oh switching ”, TSUSh / ·. ! · H are the input of the device, the second vu ai of the first and second switching elements are connected to the telephone line, the output of the first switching element is connected to the reset input of the third binary counter, the output of the buffer amplifier is with the output of the information playback unit, the input of the AC amplifier and the third input the second switching element, the output of which is connected to the input of the second delay driver and the first input of the first OR element, the output of which is connected to the zero input of the first trigger, are single the first input of which is connected to the output of the first AND element, the first and second inputs of which are connected respectively with the outputs of the 15 sensor and the second delay driver, the output of the third AND element is connected to the second input of the first OR element, the output of the first trigger through the first delay driver is connected to the first the input of the second element And, the output of which is connected to the first input of the third delay driver, the output of which is connected to a single input of the second trigger, the inverse output of which is connected to the second input of the third the delay driver, the reset inputs of the first binary and second decimal counters, the sync input of the second binary counter, the second output of the first binary counter is connected to the sync input of the decoder, the zero input of the fourth trigger, the first input of the second OR, the output of which is connected to the zero input of the second trigger, whose sync input connected to the reset input of the first decimal counter, the first input of the third element AND, PI. the information input of the RAM block and the output of the voltage divider, the input of which is connected to the first output of the third switching element, the second output of which is connected to the first input of the gate former, the output of which is connected to the write-read input of the RAM block, the chip selection input of which is connected to the second input the gate driver, the sync input of the first binary counter and the output of the third OR element, the second input of which is connected to the output of the first decimal counter, the control input to which is connected to the direct output of the second trigger, the clock inputs of the first decimal and fourth binary counters are connected to the output of the clock generator, the input of the third switching element is connected to the telephone line, the third output of the third switching element is connected to the input of the “Reset” signal conditioner, the output of which is connected to the second input the second OR element, the first inputs of the fourth and sixth OR elements, the reset input of the sixth binary counter, the second output of the second binary counter is connected to m input of the third trigger) the direct output of which is connected to the control input of the fourth binary counter and the second input of the fourth OR element, the output of which is connected to the control input of the second binary counter and the single input of the fourth trigger, the output of which is connected to the control input of the decoder, the information input of which is connected to the output of the second decimal counter, the sync input of which is connected to the output of the RAM block and the first input of the fifth OR element, the output of which is connected to the buffer input a black amplifier, the second input of the fifth OR element is connected to the first input of the third AND element, the zero inputs of the third and fifth triggers and to the output of the one-shot, the input of which is connected to the output of the sixth OR element, the second input of which 25 is connected to the output of the fourth delay driver, the input of which is connected to the sync input of the sixth binary counter, the input of the voltage switch and the direct output of the fifth trigger, the single input of which is connected to the first output of the four36th binary counter, the second output of which is connected connected with the synchro input of the fifth binary counter, the reset input of which is connected to the second input of the second element And controlling the input of the third binary counter and the inverse output of the third tripper, the output of the AC amplifier is connected to the input of the detector, the output of which is connected to the input of the DC amplifier, the output of which is connected to the reset input of the fourth binary counter 40 peaks, the output of the voltage switch is connected to the input of the information playback unit, the second output of the sixth binary counter is connected to the second input retego AND gate and is connected to the clock terminal of the third binary counter, the output 45 of the fifth binary counter connected to the third input of the sixth OR gate, inverted output of the fifth flip-flop is coupled to a control input of the fifth binary counter, the first outputs of the first and second binary counters and the output of the third FEB ° ^and egg the counter is connected to the corresponding address inputs of the RAM block, the decoder output is connected to the digital indicator input.