SU1690133A1 - Method of regulation of frequency of resonance inverter - Google Patents

Abstract

The invention relates to electrical engineering and can be used to control high-frequency converters. The purpose of the invention is to increase reliability. The method is to divide the adjustment period into four intervals, during which the input current of the inverter is integrated and the integral value is summed with the extremum search signal, which is formed by converting the measured output current value. The invention allows for automatic adjustment of the operating frequency when the load parameters change. 1 il.

Description

The invention relates to electrical engineering and can be used to control transducers that supply ultrasonic and induction installations.

The purpose of the invention is to increase reliability.

The drawing shows a diagram of the device that implements the method.

The device contains a controlled master oscillator 1, a control unit 2 for an autonomous inverter 3, powered from the network through a power rectifier 4 and supplying a resonant load 5. In the DC circuit of inverter 3 an information sensor 6 is installed, which is connected to the output of unit 7 multiplying, inverting the information signal. Block 7 is controlled by the decoder 8. The output of block 7 is connected to the input of the integrator 9, the control inputs of which are connected to the first and third outputs of the decoder 8. The output of the integrator 9 is connected via key 10 to the input

the amplifier 11, the switch 10 is controlled by pulses from the second output of the decoder 8. The output of the amplifier 11 is connected via rectifier 12 to the input of the allocation unit 13, the output connected to the control input of the switch 14. The information input of the switch 14 is connected to the output of the amplifier 11, and the output is through the integrator 15 with the first input of the adder 16. The output of the adder 16 is connected to the control input of the master oscillator 1. The output of the information sensor 6 is connected to the input of the comparator 17, which is connected via the element 18 to the control input of the sample-storage unit 19. The second input of the element 18 is connected to the second output of the decoder 8. The information input of the block 19 is connected to the output of rectifier 12, and the output through the second adder 20 to the input of the analog splitter 21 (signal-divider input). Another input of the divider 21, corresponding to the signal-divisible, is connected to the first output of the decoder 8, and the output to the second input of the adder 16. All

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the synchronizer 22 is output coupled to counter 23 controlling the decoder 8.

The device works as follows.

When the supply voltage is supplied from the output of the synchronizer 22, the output of the counter 23 receives the clock pulses corresponding to the pulse frequency of the rectified voltage supplying the inverter 3. The outputs of the decoder 8 generate pulse signals, and the duration of the signal from the first output of the decoder corresponds to four clock cycles of the synchronizer 22, and the signals on the second and third outputs of the decoder 8, the duration of one clock cycle of the synchronizer, appear on the ninth and tenth clock cycles of the synchronizer. At the same time, the signal from the first output of the decoder 8 is fed simultaneously to the control input of the unit 7 and to the input of the divisible analog divider 21, the output of which is connected through the adder 16c to the input of the master oscillator 1, thereby ensuring synchronously changing the sign of the input signal from the sensor b Inverter 3. The information signal generated in this way is fed to the input of integrator 9, which integrates both the positive and negative parts of the signal from block 7, and the time is integrated positive and negative signals are the same and equal to four clock cycles of the synchronizer 22. By the signal of the second output of the decoder 8, the switch 10 is closed, connecting the output of the integrator 9 to the input of amplifier 11, the output signal from amplifier 11 is rectified by a rectifier 12 and is fed to the input of the block 13, which has a certain dead zone, at the output of the block 13 a positive polarity signal is generated, the closing key 14 through which the signal from the output of the amplifier 11 is fed to the input of the integrator 15, from the output of which the signal goes to the input of the adder 16, thereby causing the movement of the operating point on the load characteristic of the load 5 to the resonance.

In addition, the module amplified resonant signal from the output of the rectifier 12 is fed to the information input of block 19, and then fed to the adder 20, which sets the initial level of the amplitude of the search signal of the extremum. Since the amplitude of the signal at the output of the rectifier 12 is determined by the slope of the resonance characteristic of the load and the amplitude of the search signal for the extremum, the signal

from the output of the rectifier 12 to the input of the splitter of the analog splitter 21, the signal from the output of which is fed to the input of the adder 16, the amplitude of the search signal can be changed,

moreover, as the difference signal decreases (the flat part of the slope of the resonance characteristic), the signal at the input of the divider 21 decreases, which means that the output signal increases, which leads to an increase in the amplitude of the search signal, and vice versa.

When the information signal reaches a level that is equal to the information signal when operating near resonance, a comparator 16 is triggered,

block 19 through block 19, after which the amplitude of the search signal is determined by the last contents of block 19. Therefore, the device approaches the resonance with the amplitude of the search signal equal to the last memorized value, thus avoiding rocking the control system to a resonant one. The method provides high reliability of the converter operation due to the introduction of automatic adjustment of the amplitude of the search signal, since it is possible to preserve the information content of the automatic adjustment system operation throughout the entire range of the load characteristic. Moreover, since

the level of the differential signal at the output of the amplifier 11 stabilizes, which is proportional to the speed of the autoregulation system (the higher this signal is, the greater the integrator output voltage during the measurement period), the device moves along the resonant regulation characteristic evenly, which also increases the reliability of operation converter

Frequencies even when using alternating loads.

Claims (1)

Claims The method of adjusting the frequency of a resonant inverter, which consists in setting a control period that is a multiple of the ripple period of the supply voltage and consisting of four consecutive intervals, measures the input current of the inverter and in the first interval of the period integrates the measured current, in the second interval equal to first, invert the measured current and continue to integrate, in the third interval they integrate the integral signal obtained in the second interval, starting with the existing initial level of integration, over the entire period of operation, summarize the obtained integral value with the extremum search signal and use the total the signal for setting the frequency of the inverter operation; in the fourth interval, the value of the integral of the measured current is set to zero, characterized in that. in order to increase the reliability of the inverter, the measured value of the input current is compared with the set value and, if the measured value exceeds the set value, then the current value of the integral module of the measured current is memorized, the stored value is summed with the reference signal and the reciprocal of the sum is formed, which is used in the first interval as a signal to search for an extremum, which in the remaining intervals is assumed to be zero.