SU1628028A1 - An apparatus for determining a degree of attenuation of measuring magnetic electrical converters - Google Patents

Description

The invention relates to a measurement technique and can be used to calibrate seismic receivers and vibration transducers.

The purpose of the invention is to improve the accuracy of determining the degree of attenuation.

FIG. 1 is a block diagram of an apparatus for determining the degree of attenuation; in fig. 2 - timing diagrams illustrating the operation of the device; in fig. 3 is a block diagram of control and computing.

The device contains a converter excitation unit 1, an amplifier 2, a two-input analog integrator 3, consisting of resistors 4 and 5, an integrating capacitor 6 and an operational amplifier 7, comparators 8 and 9, two different voltage sources 10 and 11 threshold voltages 12, two timing triggers 13 and 14, pulse generator 15, clock generation unit 16, controlled pulse generator 17 counting pulses, 0 triggers 18 and 19, pulse switches 20 and 21, analog switches 22 and 23, reference sources 24 and 25 , counter 26 results ntegrirovani and control unit 27 and the computation, and

Also, a converter 28 on the base of the MEP includes a magnetic system 29 with a permanent magnet and a coil 30 on an elastic suspension 31. The timing diagrams 32, 33 and 34 correspond to the input and output signals of the device.

The control and computing unit 27 consists of a central processing unit 35, a random access memory (RAM) 36, a program memory block 37, a timer counter 38, an input / output unit 39, and an eight-bit internal data bus 40.

Test converter 28 is connected to the output of excitation unit 1 and the input of amplifier 2, the output of which is connected to one of the inputs of the analog integrator 3. The output of integrator 3 is connected to the inputs of comparators 8 and 9, the second inputs of which are connected to the outputs of sources 10 and 11 of different polarity thresholds zheniy. The outputs of the Comparators 8 and 9 are connected to the inputs of the RS-flip-flop 12 and the information inputs of the trigger 13 and 14 synchronization, the recording inputs of which are connected to the output of the generator 15 pulses. The outputs of the flip-flops 13 and 14 are connected to the inputs of the sync-pulse shaping unit 16 and the information inputs of the D-flip-flops 18 and 19. The output of the block 16 is connected to the control input of the controlled shaper 17 of the counting pulses, the counting input of which is connected to the output of the generator 15. The shaper 17 output is connected to the write inputs of D-flip-flops 18 and 19 and the inputs of pulse switches 20 and 21, the control inputs of which are connected to the outputs of D-flip-flops 18 and 19, also connected to the control inputs of analog switches 22 and 23. The outputs of keys 20 and 21 are connected to the inputs of the account The key 26, the analog inputs of the keys 22 and 23 are with the outputs of the sources 24 and 25 of the reference voltage, and the outputs of the keys 22 and 23 are with the second input of the integrator 3. The outputs of the counter 26 and the RS flip-flop 12 are connected to the inputs of the control and computing unit 27, the output of which is connected to the input of the excitation unit 1. The inputs and outputs of the I / O unit 39 are the inputs and outputs of the control and computing unit. To internal data bus 40

an I / O unit 39, a program memory block 37 are connected. A RAM 36, a timer counter 38 and a central processing unit 35, the outputs of which are connected to the inputs of the program memory block 37, the RAM 36 and the timer counter 38.

The device works as follows.

Due to the fact that the attenuation degree of the transducers is less than one, the output signal of the transducer body 28 after its excitation is the damped sinusoid U (t) (FIG. 2, time diagram 33), described by the expression

U (t) A-e

sin J 1p we (1)

where A is the signal amplitude;

C00 - natural frequency, fb attenuation j

t is the current time. As a result of the integration, a signal 34 is generated at the output of the integrator, described by the expression

thirty

  and „) n

- | 2.

one

(Jl -P2

SOL t + arc sin

infi),

(2)

where (Un) n is the limit value of the voltage at the integrator output.

The maximum value of Uh (t) is reached, as follows from (1), with

t

ff

(3)

f - | i U) 0

45 Thus, the maximum value of the signal at the integrator output reaches the value

50

(Un) n (1 + e

at the moment of zero crossing of the first half-wave of the signal at the output of the seismic receiver. In this case, (Un) n, as follows from (2), corresponds to the steady-state value at the integrator output after completion of transients in the mechanical system of the seismic receiver.

Therefore, the degree of attenuation b according to (4) is defined as

one

R

(five)

N

V

lnl ((u ,,) m / (b) n) -l +

The measurement of the initial parameters (U ,,) o 3 and (Un) n is provided as follows.

On a command to start, the control and computation unit 27, using an air force receiver excitation unit 1, performs a constant direct current drive 28. After the mechanical system of the converter 28 is calmed down, the pulse of the exciting current 32 stops and the integration process of the output signal of the coil 30 begins.

Digital integrator works as follows.

One of the inputs of the integrator 3 (resistance 5) is always connected to the source of the voltage being converted. When the output voltage of the integrator 3 reaches a certain value determined by the block 10 30 or 11, the comparator 8 or 9 is triggered, depending on the polarity of the measured voltage. The transformation is then carried out in one of two identical directions. Using the D-flip-flop 13 or 14, the timing of the operation of one of the comparators 8 and 9 with a clock frequency of 15 pulses is implemented. At the same time, a controlled pulse generator 17 generates pulses of stable duration using a clock generator 16 clock pulses at each response of one of the D-flip-flops 13 and 14. As a result, at the output of the D-flip-flop 18 or 19, pulses of a stable duration appear that control the key 22 or 23 connecting to the second: the integrator input 3 is a reference voltage, the polarity of which is opposite to the polarity of the voltage being converted and which discharges the integration capacitance 6.

The operation of the voltage converter - the frequency is described by the relation

but for something but about the same with op

8 de pr in

35

40

in va 1pr

nor yo ho

ds pu pr by you pho

5o vara pa one

swarm nose

KU, tn

(and

on

) tc Oh,

de u and u

on

3

(6 (

and

TO

follows f 1

- Respectively transformable and reference stresses;

- according to the integration time

Ux and x - iop,

-amp gain amplifier 2.

what

+ t.

(7)

50

50

Thus, at the output of the pulse key 20 or 21, a sequence of pulses is formed whose frequency is proportional to the input voltage Ux. The conversion factor of the voltage converter is the frequency of K / and p-t, s, determining the degree of attenuation.

The trigger levels of the comparators 8 and 9 are set by voltages at the output of the sources 10 and 11 of the threshold voltages, the magnitude of which is set within (0.6-1) Uon t l. This posOP-uc selects from the required accuracy.

five

0

on 1 s

It reduces the integration error of the first half-wave to the value of 12 quanta (pulses) and takes it into account when calculating using formula (5).

The trigger 12 is triggered by changing the polarity of the input voltage and signals this control unit 27 and calculating what is needed to measure the first peak value of the response integral after energizing the converter 28. The up / down counter performs algebraic summation of pulses entering it through direct and inverse inputs. The result of the calculation goes to block 27, where the attenuation degree is calculated using the formula (5).

The excitation unit 1 of converter 28 is a stable current generator, which makes it possible to excite a seismic receiver with current as one direction of the other.

The use of the proposed device provides an increase in the accuracy of determining the value of the attenuation degree by eliminating the errors inherent in analog integrators with a long integration time. In addition, the solution is the analog-to-frequency conversion of the variable signal and the selection of the extreme values of the integration result.

Claims (1)

Formula invented A device for determining the attenuation degree of measuring recorders of electrical converters, comprising a series-connected excitation unit, an amplifier, a digital integrator based on a voltage-frequency converter and counters, and a control and calculation unit, while the voltage-frequency converter contains a two-input analog integrator, comparator , D-flip-flop, counting pulse generator, pulse switch, analog switch connected to reference voltage source and integrator, different Note that, in order to improve the measurement accuracy, a second comparator was introduced into it, two different sources of threshold voltages. RS trigger, first and second synchronization triggers, sync pulse shaping unit, second counter, second D-trigger, second pulse key, second analog key, second reference voltage source, the output of the analog integrator is connected to one of the two inputs of each comparator, the other inputs of which are separately connected to the outputs of the threshold voltage sources, and the output of each of the comparators is connected to the inputs of the RS-trigger setup and the information input of one of the trigger sync trigger inputs records i which are connected to the output of the pulse generator, and the outputs of the synchronization triggers are connected to the inputs of the sync pulse shaping unit, as well as 5 are separately connected to the D-inputs of both D-flip-flops, the output of the sync pulse shaping unit is connected to the reset input of the second counter, the counting input of which is connected to the output of the pulse generator, and the output to the write inputs of the D-flip-flops and the inputs of the pulse keys, the control inputs of the latter , as well as analog keys are connected separately to the outputs 25 D-flip-flops, pulse key outputs are connected to the corresponding counting counter input, the output of the second reference voltage source is connected to the analog input of the second analog key, the output of which is connected to the output of the first analog key, and the RS trigger output, as well as the counter outputs and an input to the drive converter unit, connected to the control and calculation unit.