SU1474660A1 - Tape unit/computer interface - Google Patents

Abstract

The invention relates to the field of computer technology and can be used to interface a computer with a tape recorder. The purpose of the invention is to increase the reliability of information exchange due to the automatic preset of the input channel. A device comprising an output channel and an input channel performs the output and reception of information from a cassette tape recorder of a recording in a computer with preliminary self-tuning of the input channel. 1 hp f-ly. 1 il.

Description

The invention relates to computing and can be used to interface a computer with an audio tape recorder.

The aim of the invention is to increase the reliability of information exchange by automatically presetting the input channel.

The drawing shows the block diagram of the device.

The device comprises an output channel 1, an input channel 2, a serial asynchronous transmitter 3, an EXCLUSIVE OR 4 element, a converter of 5 rectangular pulses into a sine wave, a frequency divider 6, a comparator 7, a voltage divider containing the first and second resistors 8 and 9, element 10 delays, an EXCLUSIVE OR 11 element, the first one-shot 12, a serial asynchronous receiver 13, the second one-shot 14, a trigger 15, an input 16 of the device

computer clock output connections, informational output 17 of the output channel, informational input 18 of the input channel, output 19 of the output channel and output 20 of the input channel.

The device works as follows.

In the mode of outputting information from a computer, data formed in separate blocks are received via information input 17 of the output channel to the input of the serial asynchronous transmitter 3, the bytes have a frequency lower than the reference frequency supplied to the device input 16 by the division factor of the frequency divider 6. The said data are issued in the form of consecutive asynchronous parcels with start and stop bits from the output of the asynchronous transmitter 3 in series and fed to the second input of the EXCLUSIVE OR 4 element, to the first input of which

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the clock signal from the output of the divider 6 frequency. As a result, at the output of the EXCLUSIVE OR 4 element, a two-phase (Manchester) modulation signal is generated. From the output of the converter 5 square-wave pulses into a sinusoid, through the output 19 of the output channel, the information is fed to the input of a cassette tape recorder.

In the input mode, the processed information from the cassette recorder through the input 18 of the input channel enters the comparator 7, at the output of which pulses with steep edges are formed. These pulses are fed to the inputs of the EXCLUSIVE OR 11 element directly and through the delay element 10 and converted into short pulses corresponding to each front of the original signal at the output of the comparator 7. The duration of these pulses is equal to the delay time of the delay element 10. From the output of the EXCLUSIVE or 11 element, the pulses are fed to the input of the restartable first one-shot 12, the time setting circuit of which is set to 0.75 periods of changing one bit of consecutive asynchronous packages. At the output of the first one-shot 12, the pulses appear only when the bits of the consecutive asynchronous messages change and the trigger 15 is sent to the opposite state each time. From the single output of the trigger 15, the recovered sequence of asynchronous packages arrives at the information input of the serial asynchronous receiver 13. As a result, the output of the serial asynchronous receiver 13, synchronized by the signals of the reference frequency from the input 16 of the device, through the output 20 of the information from the input channel in the computer receives data read from the cassette recorder.

The initial state of the trigger 15 is set by the first start bit of each data block with a signal from the output of the second one-shot 14. Time sets the second circuit of the one-shot 14 to 12 or more periods of changing one bit of consecutive asynchronous messages. The maximum number of periods during which there is no change in the value of bits is 11 (for all ones

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Claims (2)

1. A device for interfacing a computer with a tape recorder containing an output channel and an input channel, the device input for connecting the digital output of a computer connected to the information input of the output channel, the output of which is connected to the device output for connecting to the analog input of a tape recorder, the device input for connecting the clock output of the computer is connected to the synchronization inputs of the output channel and input channel, whose information input is connected to the device input for connecting to the analog output of a tape recorder, the output of the input channel with The information input channel contains a comparator, a voltage divider, a delay element, an EXCLUSIVE OR element, the first one-shot and a serial asynchronous receiver, and the input channel information input channel is connected to the first input of the comparator, the second input of which is connected to the middle the output of the voltage divider, the first output of which is connected to the bus of zero potential of the device, the output of the comparator is connected to the first input of the EXCLUSIVE OR element, with the second output of the voltage divider via the delay element with the second input of the EXCLUSIVE OR element, the output of which is connected to the input of the first one-vibrator, the input input channel synchronization input is connected to the synchronization input of the serial asynchronous receiver, the output of which is connected to the output of the input channel, characterized in that, in order to increase the reliability of information exchange by automatically presetting the input channel, a second one-shot and a trigger are inputted to the input channel, and the output of the first one-shot is connected to the trigger input and through the second one in the input channel one-shot with a single trigger input, zero and single inputs of which are connected respectively to the information input of the trigger and to the information input of the serial asynchronously go receiver 2. The device according to claim 1, of which is that the channel is derived yes contains a serial asynchronous transmitter, a frequency divider, an EXCLUSIVE OR element and a converter of rectangular pulses into a sinusoid, and in the output channel the information input of the output channel is connected to the information input (serial asynchronous transmitter, the synchronization input of the output channel through the frequency divider is connected to the first input of the element EXCLUSIVE OR and with the synchronization input of the serial asynchronous transmitter, the output of which is connected to the second input of the EXCLUSIVE OR element, output D which through a converter of rectangular pulses into a sinusoid is connected to the output of the output channel.