SU1467705A1 - One-end a.c. voltage converter - Google Patents

Abstract

The invention relates to a converter technique. The purpose of the invention is to increase the efficiency due to the skill-1 dynamic losses in the demodulator keys. The device contains converter cells 1, 2, each of which contains a bridge inverter 3, with the transformer primary winding 15 included in its diagonal. The secondary winding 18 of the transformer is connected to the demodulator 12. The voltage regulation is specifically changed by changing the relative time and direction of switching on the secondary region 5

Description

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The invention relates to converter equipment and may find application in power supply systems of communications equipment, measuring and computing equipment.

The aim of the invention is to increase the efficiency factor by reducing the dynamic losses in the demodulator keys.

Fig, 1 shows a functional diagram of the device; Figures 2 and 3 are timing diagrams explaining the principle of operation of the device.

The functional diagram contains pre-education cells 1 and 2, each of which consists of a bridge inverter 3 with AC main switches 4 and 5 and degaussing keys 6 and 7, made in the form of counter-connected transistors 8 and 9 with reverse diodes 16 and 11, demodul torus 12 on alternating current keys 13 and 14 and an over-frequency transformer whose primary winding 15 is connected to the output pins 16 and 17 of the bridge inverter, 3, and the secondary winding 18 to the input pins 19 and 20 of demodulator 12. At the same time input pins 21 and 22 invest Rthors 3 of both cells 1 and 2 are combined and form the input terminals 23 and 24 of the device. The output pins 25 and 26 of the demodulators 12 of the converter cells 1 and 2 are also combined and form the output pins 27 and 28 of the converter cells 1 and 2. The output terminal 27 is connected to the input terminal 23 and the output terminal 28 is connected to the first input terminal 29 of the output filter 30 , the second output of which is connected to the output 24. The control inputs of the keys 4-7, the bridge inverter 3 and the keys 13 and 14 of the demodulator 12 of the converter cells 1 and 2

ten

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0

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connected respectively to the outputs 31-36 of two valve distributors 37 and 38 pulses, information input 39 of which is connected to information output 40 of control unit 41, and their address inputs 42 and 43 are connected to synchronization outputs 44-46 of block 41. Block 41 consists of input output 47 series-connected master oscillator 48, generator 49 sawtooth voltage, amplitude detector 50, the output of which is connected to the inverting input of a differential amplifier 51, connected to the inverting input of the second comparator 52, whose output oedinen to one input of NAND gate 53 AND-NO 2, whose output forms the data output unit 40 and 41 controls. The output of a comparator 54 is connected to another input of the logic element 53, the non-inverting input of which is combined with the inverting input of the differential amplifier 51 and forms the control input 55 of the single-cycle AC voltage converter. The inverting input of the comparator 54 is combined with the non-inverting input of the comparator 52 and connected to the output of the generator 49. The synchronization inputs 44-46 of the block 41 are formed by the direct and inverse outputs of the T-flip-flop 56 and the output of the polarity control 57, the input of which is connected to the input terminals 23 and 24, and its output 46 to the address inputs 43 of the distributor 37 and 38. In this case, the direct output 44 of the T-flip-flop 56 is connected to the address input 42 of the distributor 37, and its inverse output 45 with the address input 42 of the distributor 38. The input T- trigger 56 is connected to the output at master oscillator 48. Inverting

the input of the comparator 58 is connected to the output of the amplitude detector 50, non-inverting - to the control input 55, and its output is connected to the additional address input 59 of the distributors 37 and 38. Each of the main switches 4 and 5 of the inverters 3 is in the form of counter-connected transistors 60 and 61 with reverse diodes 62 and 63, the output terminals 25 and 26 of each of the demodulators 12 are formed by the terminals of one of the switches 14, while the outputs 31 and 32 of each of the distributors 37 and 38 pulses are connected to the control inputs of the transistors 60 and 61 of the main switches 5 and 4, pr positive and negative directions, respectively, outputs 33 and 34, with control inputs of transistors 8 and 9 of demagnetizer switches 6 and 7, conducting positive and negative currents, respectively, output 35, with control input of a switch 13, connected in series with the secondary winding 18 , but ; the output 36 is controlled by the input of the key 14, which forms the output pins 26 and 25 of demodulator 12. Each of the distributors 37 and 38 is made in the form of a logic unit that implements the following truth table.

In Fig. 2, the following symbols are accepted: network voltage 64, signal 65 at the output of node 57 of the polarity control; a signal 66 at the output of the sawtooth generator 49} control signal 67 at control input 55; signal 68 at the output of the differential amplifier 51; signal 69 at the output of the first comparator 54; signal 70 (x) at the output of the logic element 54; the signal 71 at the output of the comparator 52; output signal 72

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comparator 58; signal 73 on the direct output of block 41 of the T-flip-flop 5fii or figure 74 at input 29 of output filter 30.

FIG. 3 denotes: signals 75 and 76 on the control inputs of the transistors 60 and 61i, signals 77 and 78 on the control inputs of the transistors 8 and 9, signals 79 and 80 on the control inputs of the keys 14 and 13; signals 81 and 82 at the control inputs of transistors 60 and 61; signals 83 and 84 at the control inputs of transistors 8 and 9; signals 85 and 86 at the control inputs of the keys 14 and 13.

The device works as follows.

The alternating voltage 64 of the network from the input terminals 23 and 24 is supplied to the input terminals 21 and 22 of the bridge inverters 3 of the converter cells 1 and 2 and to the polarity control unit 57, which also outputs the signal 65. Key management 4-7, 13 and 14 converter cells 1 and 2 are carried out by a signal from output 40 of control unit 41 through distributors 37 and 38 pulses with address inputs 42, 43 and 59. Right-angle short-duration pulses (in the order of one microsecond) with an intermediate frequency come from the output of master oscillator 48 to sync in One of the sawtooth voltage generator 49, from the output of which the voltage goes to the combined inputs of the comparators 54 and 52. At the same time, the inverting input of the first comparator 54 receives a signal 67 from the control input 55. At the output of the comparator 54 a signal 69 is generated. Comparator 52 receives a 6V signal from the output of the differential amplifier 51, equal to the difference between the signal 67 from the control input 55 and a constant signal from the output of the amplitude detector 50, equal to the amplitude of the sawtooth voltage. The output of the comparator 52 is a signal 71, which, together with the signal 69, is fed to the inputs of the logical element 53 I-IE 2, the output of which is the signal 70 to control the keys 4-7, 13. and 14. This signal 70 is fed to the information input 39 distributors of 37 and 38 pulses. Converter cells 1 and 2 work in turn so that on odd half-periods of signal 73, when it is equal to a logical unit, converter 1 works, and on even half, when signal 73 is equal to logic zero, converter 1 works odd half-periods are magnetized, and on even-numbered ones they are demagnetized, while in cell 2, on the contrary, odd half-periods (signal units 73) are demagnetizing, and even even (signal zeros 73) are magnetized. Such alternate operation of the converter cells 1 and 2 is achieved due to the fact that a signal 73 from the direct input of the T-flip-flop 56 is fed to the address input 42 of the distributor 37 of pulses of the conversion cell 1, while the first address 42 of the converter 38 distributor Cell 2 is given a signal from the inverse output T-trigger 56, Converter cells 1 and 2 work the same way only with a time shift by half the signal of the increased frequency, therefore the operation of converter cells is considered using cell 1 as an example.

Depending on the magnitude of the control signal 67 on the control input 55, there are five modes of operation of the latter.

If signal 67 is less than zero (time interval 0-tl), the maximum voltoshtavka mode is observed. Input 39 of distributors 37 and 38 receives a signal 70 equal to a logical one. On the working half-cycle, the transistors 60 and 61 of the keys 4 and 5 of the inverter 3 and the key 13 of the demodulator 12 are closed at the same time

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input pins. 23 and 24, the transistor 9 and the diode 10, the output 16 of the primary winding 15, demagnetize the power transformer of the converter cell 1. When the polarity of the voltage 64 is negative, only the transistors 8 are turned on for the demagnetization half-life. Return 10 of the inductive magnetizing current

The output circuit 16 is connected to the circuit 16, the transistor 8 and the diode 11, the input terminals 24 and 23, the transistor 8 and the diode 11, the output 17, the transformer of the transducer cell 1 is demagnetized. When reducing the magnetizing current -

until zero, diodes 10 and 11 are turned off, and the demagnetization process ends. At this time, the voltage of the converter cell 2 acts on the load, since both switches 13 and 14 of demodulator 12 are turned off.

When the control signal 67 changes within, where

25 Ip is the signal amplitude 66 (time interval), the signal 70 arrives at the input 39 of the valves 37 and 38, which is within and within one half-period of increased frequency

30 zero and one. In this case, the mode of adjustable volt release is observed. On the working part of the half cycle, when the signal 70 is equal to zero, the switch 14 of demodulator 12 is turned on;

25 to the load, the voltage is equal to the voltage of the network, since all the other keys of the converter

cells 1 are turned off. On the working part of the half cycle, where the signal 70 is equal to 40 units, transistors 60 and 61 and a switch 13 are turned on.

voltage equal to U jf ,,

1 The average value of the voltage on 45 load for popupperiod equal to

and -and Hi

and with CSS 77,

voltage is U

because the secondary winding 18 is turned on in relation to the network voltage. Here is the network voltage, W: ,, W is the number of turns of the primary winding 15 and the secondary winding 18. In the demagnetization half-time with positive polarity 64, only the transistors 9 of the inverter 3 turn on, the inductive magnetizing current returns to the network along the circuit: output 17 of the primary winding 15, the transistor 9 and the diode 10,

wed

and

from Wed

- and

W2 P W,

where and sr are the network voltage average over the popupperiod; y, is the relative duration t of the pulse (unit) in the signal 70 at the half period. T,, The relative duration of the pulse varies from 1 to O with a change in UN, from O to U ,,,

When and Un (the time interval tj-ts), the undistorted transmission mode of the network voltage 64 is applied to

load, ji, O and the voltage at the load equal to iVigr Uccr At the input 39 of the valves 37 and 38, a signal 70 is valid, equal to a logical zero. On the working half-period, the key 14 of demodulator 12 is closed all the time; the converter cells 1 and 2 are disconnected from the network all the time. At half-time demagnetization, everything happens as before. With a further increase of the signal 67 and its change within U (time interval tj-t) at the input 39 of the valves 37 and 38, the signal .70 acts, taking the value of both 1 and O at each half-period of the signal of increased frequency. At the same time, on the part of the working half-period, where the signal 70 takes the value 1, transistors 8 and 9 and the switch 13 of demodulator 12 are closed. A load equal to the sum of the network voltage 64 and the voltage on the secondary winding 18 of the transformer of the converter cell 1, t is acting e.

and (, 1x and.

because the voltage of the secondary winding 18 is connected in accordance with the network voltage. On the part of the half cycle, where the signal 70 is zero, the key 14 of demodulator 12 is turned on, the network voltage is acting on the load, since all the keys of the converter cell 1 are turned off. The average value of the load voltage is

and cf

+ and

from Wed

Wi Wi

f.,

Where

- relative duration

t (units) in signal 70 on the half period T, ti tna / T. The relative duration of the pulse varies from 0 to 1 as U changes from U n to 2Un. When the maximum boost mode is observed. On

The working half-period is closed by the constant n-Q of the inverter, and the secondary is to the input of the transistors 8 and 9 of keys 6 and 7 and the key 13 of the demodulator 12. On the semi-degaussing phase with positive polarity of 64 volts, the 61 transistors of the keys 4 and 5, and 55 for negative - transistors 60.

The reverse of the boost voltage with respect to the power supply network 64 is uniquely determined by Bej4H4HHoA

the modulator, the inverter inputs are connected to the input terminals, the demodulator outputs are combined and form the output terminals of the converter cells, their first output terminal is connected to the first input terminal, and the second one is connected to the first input terminal of the output filter, the second input terminal of which is connected with

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signal 67 control and mode of operation of the distributors 37 and 38 pulses. So, with a signal at address input 59 (boost mode), signal 70 passes to output 31 and 32 and output 35. The demagnetizing signal (this signal is inverse to signal 73) comes at positive polarity 64 at output 34, and at negative polarity output 33. The signal 70 on the working half-periods goes to output 36.

The undistorted transmission mode is achieved by turning on the key 14, the demodulator 12, while the key 13 is open and thus the discharge of the winding's own capacity through the shorted transformer is prevented, thus eliminating dynamic losses and increasing the efficiency.

An additional positive feature of the proposed single-ended AC voltage converter is an increase in the operational reliability of operation due to the guaranteed duration of demagnetization, which allows the control signal to be changed with practically unlimited speed. This leads to an increase in the speed of regulation and stabilization.

Claims (1)

I 5 claims 0 five A single-cycle AC voltage converter containing two converter cells, each of which consists of a bridge inverter with two main keys and two demagnetizing keys, made in the form of counter-connected transistors with reverse demodulator diodes on the keys, with all the keys being fully bi-directional controlled , and a transformer of high frequency, the primary winding of which is connected to the output 0  inverter, and secondary - to the input of the modulators, while the inputs of the inverters are connected to the input terminals, the outputs of the demodulators are combined and form the output terminals of the converter cells, with their first output terminal connected to the first input terminal, and the second to the first input terminal of the output filter, the second input terminal of which is connected to the second input terminal, the control inputs of the keys of the inverter and the demodulator of each cell are connected respectively to the outputs of two pulse distributors, the information inputs of which are connected to the information output of the control unit, and their address inputs to the synchronizing outputs of the control unit, which consists of series-connected master generator, sawtooth generator, amplitude detector, the output of which is connected to the inverting input of a differential amplifier, the output A second comparator with an inverting input, the output of which is connected to one input of logic element 2И-НЕ, whose output forms the information output of the control unit, and the output of the first comparator, the non-inverting input of which is combined with the non-inverting input of the differential input, is connected to its other input. the amplifier and forms a control input, the inverting input of the first comparator being combined with the non-inverting input of the second comparator and connected to the output of the sawtooth generator, while the synchronization outputs of the control unit are formed by the direct and inverse outputs of the T-flip-flop and the output of the polarity control node, the input of which is connected to the input terminals and its pin to the second address inputs of the pulse distributors of both conversion cells, respectively, and the direct output of the T-flip-flop connected to the first address input 5 0 5 About five the pulse divider of the first converter cell, its inverse output — with the first address input of the pulse distributor of the second converter cell; its input is connected to the output of the master oscillator, characterized in that, in order to increase the efficiency by decreasing the dynamic losses in demodulator keys, the third comparator, the inverting input of which is connected to the output of the amplitude detector, non-inverting to the control input, and its output connected to the input additional The address input of the first and second pulse distributors, each of the inverter switches is made in the form of two oppositely connected transistors with reverse diodes, the output terminals of each of the demodulators are formed by the terminals of one of its keys, with the first and second outputs of each pulse distributor being connected respectively with control inputs of a pair of transistors of one direction of the main keys, the third and fourth outputs, respectively, each with control inputs of a pair of transistors of the same voltage demagnetizer switches, the fifth output is with the control input of the demodulator key connected in series with the secondary winding of the high-frequency transformer, and the sixth output is connected with the control input of the key forming the output terminals of the demodulator. 2