SU1322323A1 - Device for correcting baseline of chromatographic signal - Google Patents

Abstract

This invention relates to automation and computing. The purpose of the invention is to improve the accuracy of the correction of the baseline of the chromatographic signal by taking into account the operator and scaling when determining the end points of the peak. The device for correction of the baseline of the chromatographic signal contains a voltage-to-frequency converter 1, a clock generator 2, an extremum detection unit 3, keys 4-6, counters 7 and 8, a code comparison unit 9, a threshold unit 10, switches 11-13, the element OR 14, the scaling unit 15 and the controlled frequency divider 16. The principle of operation of the device is based on the independent determination of the baseline values of the chromatographic signal at the beginning and end of the peak by comparing the current signal increment with a predetermined threshold. At the same time, by changing the sensitivity coefficient by the block 15 and simultaneously adjusting the current increments by the divider 16, the values of which are compared with the threshold, the device operates in the extended dynamic range of input signals. 1 hp f-ly, 3 ill. with C /)

Description

The invention relates to automation and computing and may find application in the design of integrators for chromatographs.

The purpose of the invention is to improve the accuracy of the baseline correction of the chromatographic signal by taking into account the scaling operation when determining the end points of the peak.

Figure 1 shows a block diagram of a device for correcting the baseline of the chromatographic signal; Fig. 2 is a diagram of the threshold block in f1ig. 3 is a diagram of a controlled frequency divider.

The device (FIG. 1) contains the azov gel 1 voltage per frequency, tact | 1st oscillator 2, extremum determination unit 3, nepuMi i, second and third keys 4-6, first and second ffs (hicks 7 and 8, comparison block 9, threshold unit 10, first, second ir 1 Ators 11-13, element IL1-1A, scaling unit 15 and controllable frequency divider 16. Threshold unit 10 (FIG. 2) can be made, for example, containing; reversing counter 17, register 18, And 19, 1, and 20 NOT 21. Pack

; 1.Aliable frequency divider 16 (Fig. 3 can be 6i.rj b 1 filled, for example, it contains a counter 22, g-dviginii reg istr and the element OR 24.

The device works as follows101; 1M OP ;; OM

In the initial state, KJno4H 4-6 are locked, counters 7 and 8 are cleared, and in block 10 the specified threshold value D is set, in the scaling unit 15 the initial measurement subband is set. W s17) The operation operates in two modes: in the mode of detection / keni of the beginning of the peak and in re; In both modes, the device operates c. I; in three cycles. Each of the modes is reduced to the states of the second 12 and its 13 switches.

Peak Start Detection Mode.

The dan1irG mode is set in the first step of the analysis, manually or automatically, and in the course of the analysis - by a signal, the peak from the output of block 3 of the extremum determination. The second 12 and third 13 switches are in the following states. information input of the switch 13 is connected to its first you

go, and the first and second information inputs of the switch 12, respectively, to its first and second outputs.

After the input voltage converter 1 enters the input voltage frequency, a clock 2 is started (manually or automatically), the first clock of which unlocks key 6. Through this key, the pulses from the output voltage converter 1 begin to flow to the information input of the first switch 11, which during the first clock commutes them in its first output to the summing input of the first counter 7. When the second clock pulse arrives from the clock generator output 2 pulses are from The output of converter 1 for voltage and frequency, passage through the third key 6, is switched by the first switch 11 via its BTopoNry output to the input of the second counter 8. The third clock pulse of the clock generator 2 blocks the first switch 11. Thus, at the moment of the end of the first clock in the first counter 7 recorded the code corresponding to the value of the function for the first cycle Y;

and at the time of termination

35

40

the second clock in the second counter o is the code corresponding to the current value of the function Y ,,. The third clock pulse unlocks the first key 4, through which the pulses from the output of voltage converter 1 to frequency begin to flow through the frequency divider 16 to the information input of the threshold unit 10 and in parallel through the third switch 13 from its first output to the summing input of the first counter 7, in addition the contents (Y;) to the value Y, which is stored in the second counter 8. When the contents of both counters are equal, the code comparison block 9 is triggered, the first 4 and third 6 keys are locked with the output signal The impulses to the summing input of the first counter 7 and to the information input of the threshold unit 10 stop.

The number of pulses received in the threshold unit 10 during the third cycle corresponds to the difference between the LU, Y, - Y; which signal

50

55

3I 3

unit 9 sratsnein codes in, np (.) mu on the first controlling node of threshold unit 10, compared with a predetermined threshold E. The threshold value d is set in register 18 of the threshold unit 10 at the beginning of the analysis, and the signal (1 of the threshold unit 10 The work arriving at the installation control input of counter code 17 is recorded in this counter. The subtractive input of the reversible counter 17 receives pulses, the number of which is proportional to the difference between the adjacent ordinates of the chromatographic peak, and these pulses from the nepiuiro key output and 4 is fed through a controlled frequency divider 16, which is controlled by signals from the outputs of the scaling unit 15. Depending on the selected measurement subband, the pulse frequency changes proportionally to the scaling factor. When switching from one subband to another, The number of pulses corresponding to the difference between the neighboring ordinates of the peak increases with the proportional scaling factor. Accordingly, when moving from one subband to another in the direction of increasing sensitivity, the pulse frequency decreases in proportion to the scaling factor, i.e. the measured difference of the LU, on any subrange, leads to the difference of the control unit, which would be fixed at the same time point on the initially set subband and which is compared with the predetermined threshold d.

The output frequency of the controlled frequency divider 16 is calculated by the formula

F

F h to 2 - N

where Fgj is input. frequency; The output frequency n is the number of counter bits 22;

N is the number recorded in the shift register 23. The frequency change is carried out by signals from the sign outputs of incrementing the subband number (the addition bus and the subtraction bus of the reversible counter) of the scaling

g About 5 0 5 0 5 0

five

0

-five

34

P. mock; with a ppklnichi ch1ii ppillilannonnon storilyu pozhitsi chuns gpi gelg bridges pulses tee, 1 reading repersinnyh counter, conr-piKHNUH mouth Istra 23 left to the left, that C (niotuni Ptrn) ip to the left of the table when switching 1CH (subdivision {1C (1H upward), the impuser: pa is from the folding of the addition; ie u iciiiu oro of the counter of the 13 Macui-tabirpan contents pp 23 of the right, which corresponds to Immediately (1st division by 2. 1ti, f; (impulse 1, 11 itself, received by the input at the parallel recording of counter 22, co.crr -: them (e register 23 for It is f f by the CG 22 clock. Thus, the control of the 1H1 clock of the pulses received by the controlled machine 16 H-10G1 is performed, and the simplicity of the scaling factor is equal to 2. Obviously, the counter size is 22 and register 23 is determined by the number of (; m subranges and necessary1) 1m to 1 () by the Fipient K, scaling. The code that is appended to the horn of the 23, is also selected taking into account the scaling factor and can be changed manually) taking into account the trend of peaks to expand with analysis.

Resetting the counter 17 of the psfog block 10 before the signal from the output of Olok 9 compare codes to the first control input of the threshold block 10 corresponds to the fulfillment of the inequality LU, 5-L and the appearance of a high potential at the output of the element | K 21, i.e. at the second output of the threshold block 10. If E is the instant of coincidence of the codes of counters 7 and 8 in the reversible counter 17 there is a zero code, which corresponds to the fulfillment of the LU inequality; L, high potential appears; at the output of the element And 19, i.e. at the first output of the threshold block 10.

In peak start detection mode, the control inequality is met; i indicates that the beginning of the peak has not yet been detected. Therefore, the signal from the first information input of the second switch 12 is transmitted to its first output and through the OR 14 element returns the device to the initial state, i.e. stitches the first 7 and second 8 counters, removes the blocking from the first switch 11 and causes the I state of readiness of the threshold BhiH block 10. If inequality is performed, a signal from the second output of the threshold block 10 passing through the second switch 1 pa its second output, which unlocks the second key 5 and the .chys from the output of the converter 1, the loops into the frequency begin to arrive at the frequency-impulse Bykhod device. Simultaneously with this signal, through the element S1I 14, the contents of the second counter 8 representing the value of the signal levels corresponding to the peak peak are read from the code output.

devices, the first counter 7 is zeroed - t

The control unit 10 is prepared for operation.

The discovery rail of the copd of the peak., Griere} of the device to this mode is carried out by the signal of detecting the peak from B1.1 of the block 3, definition, extremes. By this signal, the information input of the third switch 13 is connected to its second, and the first and second ip (the normal inputs of the switch 12 are respectively to the second; this is pg: p "(- its first outputs. The device operates in re; it has the same peak detection operation of the device; having found the start of the ppc with the first impulse; that, in 1 ret clock, the pulses from the output of the voltage to frequency converter are switched by the third switch 13 to its second output, and then d, ovatel) But, on b1 1 reading 1 input riep from cgt 7, decrease it co D1- knmoe P (Vi) to the value Y n hra- ;, 11; EEC second ELAPSED 8 -n e.

3 mode of terminal peak detection signals from the outputs of the threshold block

 its purpose: failure lU paiiLMiCTBa Ü; - U indicates that the peak of the peak has not yet arrived The scheme returns to its original state, the analogue with repar sis detected, k - 11 and at the halo of the peak. Ecjni inequality of output (1p, the signal from the second puff of the second switch 12 registers the second KJno4 5;

the device output, the counter 7 is zeroed, the threshold unit 10 is prepared for operation.

Thus, the proposed device makes it possible to increase the accuracy of correction (the dashed line of the chromatographic signal by taking into account the operation of the calibration table when determining the end points of the peak, and consequently, the accuracy of determining the informative parameters of the chromatogram peaks.

Claims (2)

Invention Formula - 15 20 25 thirty 0 , one . A device for correcting the baseline of a chromatographic signal, containing a voltage-to-frequency converter connected by an output to an input of an extremum detection unit and information input of the first, second and third keys, the first of which is connected by the first control input to the output of the clock generator and the first controllers the inputs of the third key and the first switch, and the second control input with the output of the code comparison block, the stop input of the threshold block and the second control input of the third key, The output of the first switch, connected to the second control input with the output of the lump, the trigger input of the threshold unit 5 and the zero and zero inputs of the first and second counters, the summing inputs of which R1LH are connected to the first and second outputs of the first switch, respectively, and extremum detection is connected to the minimum detection signal output with the first control inputs of the second and third switches connected by the second control inputs to the output of the max detection signal imuma unit determining extrema, wherein the secondary poii switch connected first and second inputs of the gate unit outputs with a threshold, the first output - to the first input of the OR gate and the second output - to a second input SH1I element, a control input of the second switch and the control input of 40 45 50 55 reading the second counter connected by the output to the output of the baseline code of the device and the first input of the code comparison unit connected by the second input to the code of the first counter, the summing and subtracting inputs of which are connected to the first and second outputs of the third switch connected by the information input to the output of the first key, and the output of the second key is connected to the frequency-pulse output of the chromatographic signal of the device, in order to improve the accuracy of correction the baseline of the chromatographic signal, by taking into account the scaling operation when determining the endpoints of the peak, a controlled frequency variable and a scaling unit, the input with the information input of the device, the information output with the input of the voltage to frequency converter, and the sign outputs of the increment of the subband number with the control inputs of the controlled frequency divider connected by the counting input to the output of the first key, and the output to the information input threshold block. 2. A device according to claim 1, characterized in that the controlled frequency divider comprises a shift register, an OR element and a counter, wherein the counter is connected by a counting input to the counting input of a controlled frequency divider, the overflow output is connected to the output of a controlled frequency divider and the first the input of the OR element, and the setup inputs - with the outputs of the shift register bits connected by the right shift input to the first control input of the controlled frequency divider and the second input of the OR element, and the left shift input - to the second control input th entry controllable frequency divider and the third input of OR gate whose output is connected to the input of the control code setting counter. Control and..6. Upsls  5y / x / bb / x. g Editor N.Rogulich Compiled by S.Kaainov Tehred L.Oliynyk Order 2867/47 Circulation 672 Subscription VNIIPI USSR State Committee for Inventions and Discoveries 4/5, Moscow, Zh-35, Raushsk nab. 113035 Production and printing company, Uzhgorod, st. Project, 4 Proofreader L. Beskid