SU1182504A1 - Address input device - Google Patents

Abstract

1. DEVICE FOR INPUT OF ADDRESS, containing a block of switching elements, a display unit, a decoder, a counter, a generator, the output of which is connected to the input of the counter, the outputs of which are connected to the information inputs of the decoder, the outputs of which are connected to the inputs of the group of the display unit and the inputs of the block of switching elements, the first output of which is connected to the input of the display unit, distinguished by the fact that, in order to increase speed and increase the reliability of the device, a driver, register, AND element, and a new trigger, a key block and a switching unit, the first output of which is the first output of the device, and the second output is connected to its second input, the input of the collection of the first trigger and is the second output of the device, the second output of the switching elements block is connected to the input of the shaper, the direct output of which is connected to the synchronous input of the first trigger and the inputs of the generator and register, the outputs of the group of which are connected to the outputs of the counter, the inverse output of the driver is connected to the first input of the switching unit, the third output of which connected to the first input of the element I, and the fourth to the input of the decoder's permissions, the information input of the first trigger is connected to the power supply bus of the device, and the output to the second input of the element I, the output of which is connected to the input of the key block 9, the inputs of the first group of which are connected to the outputs of the register and the inputs of the second group are connected via jumpers to either the power bus or the zero potential bus of the device, the outputs of the key block are the outputs of the device group. 2. The device of claim 1, wherein the switching unit comprises a second trigger, a threshold element, a matching element and a load element, the set and reset inputs of the second trigger are the first and second inputs of the switching unit, the direct output of the second trigger connected to the input of the matching element and is the third output of the block, and the inverse output is the fourth output of the block, the output of the matching element through the load element is connected to the input of the threshold element and is the first output of the block, the output threshold The new element is the second output of the switching unit.

Description

The invention relates to automation and computing and can be used in automated process control systems.

The purpose of the invention is to increase the speed and reliability of the device.

FIG. 1 shows a functional diagram of the device; in fig. 2 - 10 An example of switching on multiple devices when the number of input channels for an address increases.

The device contains a generator 1, a counter 2, a decoder 3, an indication block 4, a block of switching elements 5, a driver 6, a register 7, a block of keys 8, an element 9, the first trigger 10, a switching unit 11 containing the second trigger 12, element 20 matching 13, the load element 14, the threshold element 15.

The device works as follows.

In the initial state, none of the keys of the block 5 is pressed, and the triggers 12 and 10 are in the reset state. Then, the generator control input and the sy11 inputs of register 7 and trigger 10 receive a low level signal O, and the enable input for the choice of the decoder and the control input of the key block 8 are given a prohibition signal, respectively, 1 and O. At that, all the decoder codes are in state 1, no indication. When the operator presses one of the keyblock 5, the signal 1 from the direct output of the driver is applied to the control input 0 of the generator and the gate inputs of the register 7 and the trigger 10, after which the register 7 and the trigger 10 remain in the same state, and the generator begins to arrive - 5 pulses to the input of counter 2, which works in the sequential counting mode. At the same time, from the inverter output of the imager, a low 50 signal is sent to the input S of the rigger 12. The trigger 12 is set to 1 and through the elements 13 and 14 loads the threshold element 15, resulting in a short low 55 pulse from the first output of the device, after which the previously set trigger 12 from the other device for entering the address.

connected to the threshold element is reset, and this remains in the set state due to the different time effects of the signals on the inputs S and R.

As a result of the installation of flip-flop 1 on the input. The resolution of the decoder selection is given a low-level signal and the decoder switches to ring count mode. At the moment of matching the binary code on the counter to the address of the channel, the key of which was pressed at the input of the driver, the signal from a high level goes to a low one. From the direct output of the driver of this signal, gates trigger 10, which is set to 1, and register 7, in which the binary code is stored, the addresses of the selected channel, and the generator is blocked. The trigger 12 remains in the set state, from its direct output and from the output of the trigger 10 high level signals arrive at the inputs of the element AND 9, the output of which also receives the high level signal, the opening key block 8, from the outputs of which the binary code is removed selected channel. From the inverted output, the trigger 12 to the input Enabled decoder selection, an enable signal is received, as a result, a low level signal remains at the corresponding selected decoder output and a channel selection is indicated, for example, by illuminating an LED mechanically aligned with the corresponding key.

If it is necessary to increase the number of address input channels, several: described identical devices 1, 2, ..., N (see Fig. 2) are connected by address outputs and by Load and Reset outputs. The number of devices is N 2, where n is the number of higher-order address bits programmable by jumpers.

The use of trigger 10 excludes when several devices of FIG. 2 occurrences at the address outputs of the intermediate code address at the moment when the previous device is turned off (the threshold element transmitted a pulse at the Reset output and set the trigger 12 of the selected block), and register 7 stores the address of the previous sample and the gate from the driver has not yet arrived,

The use of register 7 provides a direct transition from the address of one channel to the address of another when working with the same device.

The period of the generator is chosen from

according to

m

- H, / 2

T: t

uh

182504

where t

generator period;

Black key hold time; the time of srabatania poro of the p-e hog element;

.m is the counter size, i.e., during the key hold time, the threshold element was triggered, and the counter went through all binary combinations, the number of which corresponds to the number of outputs of the decoder, equal to 2.

Claims (2)

1. DEVICE FOR ADDRESSING THE ADDRESS, comprising a block of switching elements, an indication block, a decoder, a counter, a generator, the output of which is connected to the input of the counter, the outputs of which are connected to the information inputs of a decoder, the outputs of which are connected to the inputs of the group of the indication block and the inputs of the block of switching elements, the first output of which is connected to the input of the display unit, characterized in that, in order to increase the speed and reliability of the device, a shaper, a register, an And element, the first trigger are introduced into it p, a key block and a switching block, the first output of which is the first output of the device, and the second output is connected to its second input, the input of the collection of the first trigger and is the second output of the device, the second output of the block of switching elements is connected to the input of the driver, the direct output of which is connected to the sync input of the first trigger and the inputs of the generator and register, the outputs of which are connected to the outputs of the counter, the inverse output of the driver is connected to the first input of the switching unit, the third output of which is connected to the input of the And element, and the fourth with the decoder permission input, the information input of the first trigger is connected to the device power bus, and the output is the second input of the And element, the output of which is connected to the input of the § key block, the inputs of the first group of which are connected to the register outputs, and the inputs the second group with jumpers connected either to the power bus or to the bus of the zero potential of the device, the outputs of the key block are the outputs of the device group. 2. The device according to p. ^ Characterized in that the switching unit contains a second trigger, a threshold element, a matching element and a load element, the inputs of setting and resetting the second trigger are the first and second inputs of the switching unit, the direct output of the second trigger is connected to the input of the matching element and is the third output of the block, and the inverse output is the fourth output of the block, the output of the matching element through the load element is connected to the input of the threshold element and is the first output of the block, the output of the threshold ele cient is the second output of the switching unit. SU „1182504 1 -1 182504