SU1067535A2 - Analog storage - Google Patents

Abstract

ANALOG RECORDING DEVICE according to author. St. No. 769634, distinguished by the fact that, in order to increase the accuracy of the device. A pulse shaper, a shift register and a controlled pulse generator, whose outputs are connected to the corresponding shift shift control inputs, are entered into it, the information input and the installation O of which are connected to the output of the write key and the input of the pulse shaper, the output of which is connected to the input of the controlled generator pulses, the output shift register is connected to the input of the delay element. (La -vl ate 00 SP

Description

The invention relates to automation and computer technology and can be used as a remote instrument to an oscilloscope for examining single processes (single electrical signals) on its screen. According to the main author. St. No. 769634 known analog storage device containing a cumulative element, made in the form of a delay element, the input of which is connected to the output of the recording key, the output of the delay element is connected to the first input of the erase key, the first and second inputs of the recording and erasing keys are connected respectively to the buses recording and erasing, peak detector matching element, reference element, linear generator, variable voltage and two single vibrators, the output of the first of which is connected to the second input of the recording key, the output element and the comparison is connected to the input of the first single-mode oscillator, one of the inputs of the comparison element is connected via the matching element to the device input, another input of the comparison element is connected to the input of the peak detector and to the generator output a linear variation of the voltage generator, the input connected to the output of the second single-oscillator, input the second one-shot is connected to the input of the delay element, the output of the page key and the first output of the device, the second output of which is connected - to the output of the peak detector ij. This device places high demands on the implementation of a delay element, for example, when using a digital shift register as a delay element for storing a process of several hundreds of sample values and an error of 1% amplitude, the shift register should be several tens of The clock frequency must be several hundred times greater than the maximum frequency of the signal at the input of the device. It is more acceptable to use as a delay element an ultrasonic delay line (or its type - magnetostriction), since the operating frequency of the delay line is determined by the frequency of the information pulses in the delay line, which is two orders of magnitude smaller than the required frequency in the shift register. the absence of quantization of time intervals between information pulses, which follow the sound line of the delay line, leads to the fact that the time intervals between the information pulses pulses change spontaneously with time, and this, in turn, leads to low storage accuracy of the recorded single process. Thus, when a delay line is used in a known device, the accuracy of the device is low. The aim of the invention is to improve the accuracy of the device when used as a cumulative element of the delay line. The goal is achieved by the fact that a pulse driver, a shift register and a controlled pulse generator, whose outputs are connected to the corresponding shift shift register control inputs, an information input and a setting input O are connected to the analog memory, the device is connected to the output of the recording key and the input pulse generator, the output of which is coherent with the input of the controlled pulse generator, the output of the shift register is connected to the input of the delay element. In FIG. 1 shows the scheme of the proposed device; in fig. 2 and 3 are time diagrams for his work. The analog storage device contains a comparison element 1, a generator of linearly varying voltage 2, a matching element 3, a peak detector 4, one-shot 5 and $, a delay element 7, a write key 8, an erase key 9, a write bus 10 and erase C, a pulse shaper 12, a shift register 13 and a controlled pulse generator 14. In FIG. 2 shows pulse 15 and the next pulse 16 circulating in delay element 7. The time interval between pulses 15 and 16 is reduced by At due to spontaneous convergence of acoustic waves during their passage through the conductor of delay element -7, or at such a moment a pulse 16 arrives when recording a single process. Fig. 2 also shows pulses 17 and 18, respectively, on the first and second outputs of the controlled pulse generator 14, as well as pulses 19-21 on the outputs of the first, second and third digits of the shift register 13, respectively. FIG. 3 shows the first 15 and second 16 pulses in the delay element 7, corresponding to an increase in the time interval between these pulses by f due to spontaneous removal of acoustic waves from each other during their passage through the conduit of the delay element 7. Pulses 17-21 correspond to the same position numbers in fig. 2

The timing diagrams in FIG. 2 and associated with the circuit of FIG. 1 letters a, b, c, d, d, e.

Analog storage device operates as follows.

In the initial state, the bits of the shift register 13 are in the zero state. The controlled pulse generator 14 is in standby mode.

In the recording mode, input voltage is applied to one of the input element of Comparison 1 through matching element 3, to the other a linearly increasing voltage from the output of the generator 2. When equality of these voltages is achieved, the state at the output of the element of Comparison 1 and the one-shot 5 generates a pulse 15, which through the public key 8 (the key 9 is in record mode closed) is fed to the information input shifting, its register 13 and to the input of the pulse former 12. The output signal of the pulse former 12 starts the controlled pulse generator cos 14, the first momentum, pulse 17 the output of which sets the first bit of the shift register 13 in a single state (pulse 19). Pulses 21 and 23 at the output of the second and third bits of the shift register 13 appear to be delayed by half a period and the repetition period of the control pulses 17 and 18, respectively. Pulse 21 from the output of the shift register 13 is written to delay element 7. The single-oscillator 6 generates a pulse which, having a longer duration than pulse 15, resets the voltage at the generator output of the linearly varying voltage 2 and restarts it. When re-comparing the linearly varying voltage with the input voltage of the device, the one-oscillator 5 forms the second pulse 16. At the same time, the controlled pulse generator 14 operates continuously, since the pulse driver 12 expands so much each pulse received at its input that it merges with subsequent impulse.

If the pulse 16 arrives at the information input of the shift register 13 not simultaneously with the shift control pulse 17, but before it at time d (Fig. 2) or later at time 4T (Fig. 3), then since writing to the first and subsequent bits of the shift the register 13 is synchronized with the control pulses 17 and 18; the time interval between the information pulses at the output of the shift register 13 is corrected.

In this case, the time interval between adjacent information pulses 21 arriving at the input of the delay line 7 is always a multiple of the repetition period of the pulses at the output.

generator 14. Thus, in delay line 7, having a delay duration longer than the duration of a single process to be memorized, pulses are recorded

Q at different time intervals relative to each other (multiples of the pulse repetition period 17). These intervals carry information about the amplitude of a single process. After finishing, no single process recordings close the key 8 via the bus. 10 and open the key 9 via the bus 11. At the input of the pulse former 12, the pulses stop flowing. As a result, the signal at the output of the imager 12

0 turns off the generator 14.

The described adjustment of the time intervals between information pulses occurs both when recording a single process from the input of an analog storage device to delay element 7, and in the most distant information in each revolution of information into delay element 7 during its storage.

0 When information is circulated in delay line 7, the very first impulse of a single process, received from the output of delay line 7, passes through public key 9, starts through 5 pulse generator 12, generator 14. Next, the time intervals between the first and subsequent information pulses are corrected along the front fronts impulses 17,

Q i.e. between the first and subsequent pulses of a single process, the times are multiplied by an integer number of pulse-following periods 17. These time intervals are equal to those time intervals

with which these pulses are recorded in delay line 7. Such an adjustment occurs in each turn of information in the delay lines 7, it excludes the possibility of changing the recorded voltage during storage.

A change in the duration of information pulses by a shift register 13 does not lead to a distortion of a single process, since information about the amplitude of quanta of a single process, since information about the amplitude of quanta of a single pro- The process carries time intervals between information pulses, and

0 is not the duration of the information pulses themselves. The passage through the delay line 7, the information pulses are restored in duration.

The duration of the pulses 17 and 18 is chosen such that it is greater than the maximum possible spontaneous time shift of the information pulses during their passage through the delay line 7. Thus, in the prior device, it is possible to use an acoustic delay line (ultrasonic, magnetostrictive) as a storage element 7. In the known device, this possibility is not due to the fact that it does not correct the time intervals between information pulses, which carry information about the coordinates of points of a single process, which leads to spontaneous smearing of the image of a single process on the oscilloscope screen. Therefore, in the prototype, only a digital delay line with an operating frequency and, therefore, a display accuracy of a single process is much lower than that of an acoustic delay line can be used as a cumulative split 7. Moreover, with the same the speed of the anap memory device, the acoustic delay line used as accumulation element 7 operates with the frequency of the information pulses (Fig. 2 "), and the digital delay line used as accumulative th element 7 with a repetition rate .taktovyh pulses (FIGS. 26 and c). Thus, the speed when using an acoustic delay line is higher due to the fact that the acoustic delay line itself has a greater operating frequency and due to the fact that the proposed device operates at a lower frequency than the known use of a digital delay line.

Claims (1)

(54) ANALOGUE REMEMBERING DEVICE by ed. St. No. 769634, characterized in that, in order to improve the accuracy of the device, a pulse shaper, a shift register and a controlled pulse generator are inserted into it, the outputs of which are connected to the corresponding inputs of the shift register shift control, the information input and installation input of which is connected to to the output of the recording key and the input of the pulse shaper, the output of which is connected to the input of the controlled pulse generator, the output of the shift register is connected to the input of the delay element.