SG10201602619YA - Method of dividing wafer - Google Patents

Method of dividing wafer

Info

Publication number
SG10201602619YA
SG10201602619YA SG10201602619YA SG10201602619YA SG10201602619YA SG 10201602619Y A SG10201602619Y A SG 10201602619YA SG 10201602619Y A SG10201602619Y A SG 10201602619YA SG 10201602619Y A SG10201602619Y A SG 10201602619YA SG 10201602619Y A SG10201602619Y A SG 10201602619YA
Authority
SG
Singapore
Prior art keywords
dividing wafer
wafer
dividing
Prior art date
Application number
SG10201602619YA
Inventor
Ohura Yukinobu
Yamashita Yohei
Kumazawa Satoshi
Original Assignee
Disco Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Disco Corp filed Critical Disco Corp
Publication of SG10201602619YA publication Critical patent/SG10201602619YA/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H01L21/30655—Plasma etching; Reactive-ion etching comprising alternated and repeated etching and passivation steps, e.g. Bosch process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3081—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their composition, e.g. multilayer masks, materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31127—Etching organic layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/6834—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Plasma & Fusion (AREA)
  • Dicing (AREA)
  • Drying Of Semiconductors (AREA)
  • Laser Beam Processing (AREA)
SG10201602619YA 2015-04-17 2016-04-01 Method of dividing wafer SG10201602619YA (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2015084923A JP2016207737A (en) 2015-04-17 2015-04-17 Division method

Publications (1)

Publication Number Publication Date
SG10201602619YA true SG10201602619YA (en) 2016-11-29

Family

ID=57128460

Family Applications (1)

Application Number Title Priority Date Filing Date
SG10201602619YA SG10201602619YA (en) 2015-04-17 2016-04-01 Method of dividing wafer

Country Status (5)

Country Link
US (1) US20160307851A1 (en)
JP (1) JP2016207737A (en)
CN (1) CN106057738A (en)
SG (1) SG10201602619YA (en)
TW (1) TW201643957A (en)

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* Cited by examiner, † Cited by third party
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US8642448B2 (en) 2010-06-22 2014-02-04 Applied Materials, Inc. Wafer dicing using femtosecond-based laser and plasma etch
US9793132B1 (en) * 2016-05-13 2017-10-17 Applied Materials, Inc. Etch mask for hybrid laser scribing and plasma etch wafer singulation process
JP6735653B2 (en) * 2016-10-24 2020-08-05 株式会社ディスコ Wafer division method
JP6887722B2 (en) * 2016-10-25 2021-06-16 株式会社ディスコ Wafer processing method and cutting equipment
JP6765949B2 (en) * 2016-12-12 2020-10-07 株式会社ディスコ Wafer processing method
JP2018156973A (en) * 2017-03-15 2018-10-04 株式会社ディスコ Wafer processing method
JP6903375B2 (en) * 2017-04-19 2021-07-14 株式会社ディスコ Device chip manufacturing method
US11158540B2 (en) * 2017-05-26 2021-10-26 Applied Materials, Inc. Light-absorbing mask for hybrid laser scribing and plasma etch wafer singulation process
JP6957252B2 (en) 2017-07-20 2021-11-02 岩谷産業株式会社 Cutting method
DE102017212858A1 (en) * 2017-07-26 2019-01-31 Disco Corporation Method for processing a substrate
JP2019071333A (en) * 2017-10-06 2019-05-09 株式会社ディスコ Wafer processing method
JP6987448B2 (en) * 2017-11-14 2022-01-05 株式会社ディスコ Manufacturing method for small diameter wafers
JP6965126B2 (en) * 2017-11-28 2021-11-10 株式会社ディスコ Processing method of work piece
JP7037412B2 (en) * 2018-03-28 2022-03-16 株式会社ディスコ Wafer processing method
JP7109862B2 (en) * 2018-07-10 2022-08-01 株式会社ディスコ Semiconductor wafer processing method
JP7401183B2 (en) 2018-08-07 2023-12-19 株式会社ディスコ Wafer processing method
JP7128054B2 (en) 2018-08-07 2022-08-30 株式会社ディスコ Wafer processing method
JP2020047875A (en) 2018-09-21 2020-03-26 株式会社ディスコ Processing method of wafer
JP7207969B2 (en) * 2018-11-26 2023-01-18 株式会社ディスコ Wafer processing method
JP2021015938A (en) * 2019-07-16 2021-02-12 株式会社ディスコ Water-soluble resin sheet and wafer processing method
JP7387227B2 (en) 2019-10-07 2023-11-28 株式会社ディスコ Wafer processing method
CN110729186A (en) * 2019-10-24 2020-01-24 东莞记忆存储科技有限公司 Processing method for wafer cutting and separating
KR102315983B1 (en) * 2020-03-09 2021-10-20 고오 가가쿠고교 가부시키가이샤 Method for manufacturing semiconductor device chip and composition for protection
US11587834B1 (en) * 2020-06-29 2023-02-21 Plasma-Therm Llc Protective coating for plasma dicing
JP2023041313A (en) 2021-09-13 2023-03-24 株式会社ディスコ Protective film agent and machining method for workpiece
JP2023135711A (en) 2022-03-16 2023-09-29 株式会社ディスコ Chip manufacturing method
JP2023166709A (en) 2022-05-10 2023-11-22 株式会社ディスコ Method for manufacturing chip

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6582983B1 (en) * 2002-07-12 2003-06-24 Keteca Singapore Singapore Method and wafer for maintaining ultra clean bonding pads on a wafer
JP4013753B2 (en) * 2002-12-11 2007-11-28 松下電器産業株式会社 Semiconductor wafer cutting method
JP3991872B2 (en) * 2003-01-23 2007-10-17 松下電器産業株式会社 Manufacturing method of semiconductor device
JP4471632B2 (en) * 2003-11-18 2010-06-02 株式会社ディスコ Wafer processing method
JP4890746B2 (en) * 2004-06-14 2012-03-07 株式会社ディスコ Wafer processing method
JP2006253402A (en) * 2005-03-10 2006-09-21 Nec Electronics Corp Manufacturing method of semiconductor device
JP4285455B2 (en) * 2005-07-11 2009-06-24 パナソニック株式会社 Manufacturing method of semiconductor chip
JP4544231B2 (en) * 2006-10-06 2010-09-15 パナソニック株式会社 Manufacturing method of semiconductor chip
US20100013036A1 (en) * 2008-07-16 2010-01-21 Carey James E Thin Sacrificial Masking Films for Protecting Semiconductors From Pulsed Laser Process
US9196571B2 (en) * 2010-01-13 2015-11-24 Xintec Inc. Chip device packages and fabrication methods thereof
US8703581B2 (en) * 2011-06-15 2014-04-22 Applied Materials, Inc. Water soluble mask for substrate dicing by laser and plasma etch
JP6166034B2 (en) * 2012-11-22 2017-07-19 株式会社ディスコ Wafer processing method
US20140273401A1 (en) * 2013-03-14 2014-09-18 Wei-Sheng Lei Substrate laser dicing mask including laser energy absorbing water-soluble film
US9659889B2 (en) * 2013-12-20 2017-05-23 Intel Corporation Solder-on-die using water-soluble resist system and method
US20160197015A1 (en) * 2015-01-05 2016-07-07 Wei-Sheng Lei Hybrid wafer dicing approach using a polygon scanning-based laser scribing process and plasma etch process

Also Published As

Publication number Publication date
CN106057738A (en) 2016-10-26
JP2016207737A (en) 2016-12-08
US20160307851A1 (en) 2016-10-20
TW201643957A (en) 2016-12-16

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