SE9504396D0 - Processor redundancy in a distributed system - Google Patents

Processor redundancy in a distributed system

Info

Publication number
SE9504396D0
SE9504396D0 SE9504396A SE9504396A SE9504396D0 SE 9504396 D0 SE9504396 D0 SE 9504396D0 SE 9504396 A SE9504396 A SE 9504396A SE 9504396 A SE9504396 A SE 9504396A SE 9504396 D0 SE9504396 D0 SE 9504396D0
Authority
SE
Sweden
Prior art keywords
processor
software
catastrophe
plan
creation
Prior art date
Application number
SE9504396A
Other languages
Swedish (sv)
Other versions
SE9504396L (en
SE515348C2 (en
Inventor
Lars Ulrik Jensen
Original Assignee
Ericsson Telefon Ab L M
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ericsson Telefon Ab L M filed Critical Ericsson Telefon Ab L M
Priority to SE9504396A priority Critical patent/SE515348C2/en
Publication of SE9504396D0 publication Critical patent/SE9504396D0/en
Priority to PCT/SE1996/001609 priority patent/WO1997022054A2/en
Priority to AU10488/97A priority patent/AU1048897A/en
Publication of SE9504396L publication Critical patent/SE9504396L/en
Priority to SE9703132A priority patent/SE9703132D0/en
Publication of SE515348C2 publication Critical patent/SE515348C2/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
    • G06F11/2023—Failover techniques
    • G06F11/203—Failover techniques using migration
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
    • G06F11/2035—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant without idle spare hardware
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04M—TELEPHONIC COMMUNICATION
    • H04M3/00—Automatic or semi-automatic exchanges
    • H04M3/22—Arrangements for supervision, monitoring or testing
    • H04M3/24—Arrangements for supervision, monitoring or testing with provision for checking the normal operation
    • H04M3/241—Arrangements for supervision, monitoring or testing with provision for checking the normal operation for stored program controlled exchanges
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q3/00—Selecting arrangements
    • H04Q3/42—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker
    • H04Q3/54—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised
    • H04Q3/545—Circuit arrangements for indirect selecting controlled by common circuits, e.g. register controller, marker in which the logic circuitry controlling the exchange is centralised using a stored programme
    • H04Q3/54575—Software application
    • H04Q3/54591—Supervision, e.g. fault localisation, traffic measurements, avoiding errors, failure recovery, monitoring, statistical analysis
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
    • G06F11/2048—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant where the redundant components share neither address space nor persistent storage

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Hardware Redundancy (AREA)
  • Exchange Systems With Centralized Control (AREA)

Abstract

A method of automatically recover from multiple permanent failures of processors in a distributed processor system, in particular a software driven telecommunication system. The method involves the creation of an initial configuration describing each processor and software objects executing thereon, and, for each processor the creation of a catastrophe plan to be followed if the processor has a failure. A catastrophe plan contains information as how to redistribute the software objects executing on the faulty processor to operating processor of the processor system. If a processor goes down its software objects are transferred to operating processors following the catastrophe plan for the faulty processor. A hardware and a software model of the processor system and its software is presented. A software object that has a hardware dependency is handled by the model.
SE9504396A 1995-12-08 1995-12-08 Processor redundancy in a distributed system SE515348C2 (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
SE9504396A SE515348C2 (en) 1995-12-08 1995-12-08 Processor redundancy in a distributed system
PCT/SE1996/001609 WO1997022054A2 (en) 1995-12-08 1996-12-06 Processor redundancy in a distributed system
AU10488/97A AU1048897A (en) 1995-12-08 1996-12-06 Processor redundancy in a distributed system
SE9703132A SE9703132D0 (en) 1995-12-08 1997-08-29 Software model for a distributed processor system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SE9504396A SE515348C2 (en) 1995-12-08 1995-12-08 Processor redundancy in a distributed system

Publications (3)

Publication Number Publication Date
SE9504396D0 true SE9504396D0 (en) 1995-12-08
SE9504396L SE9504396L (en) 1997-06-09
SE515348C2 SE515348C2 (en) 2001-07-16

Family

ID=20400521

Family Applications (2)

Application Number Title Priority Date Filing Date
SE9504396A SE515348C2 (en) 1995-12-08 1995-12-08 Processor redundancy in a distributed system
SE9703132A SE9703132D0 (en) 1995-12-08 1997-08-29 Software model for a distributed processor system

Family Applications After (1)

Application Number Title Priority Date Filing Date
SE9703132A SE9703132D0 (en) 1995-12-08 1997-08-29 Software model for a distributed processor system

Country Status (3)

Country Link
AU (1) AU1048897A (en)
SE (2) SE515348C2 (en)
WO (1) WO1997022054A2 (en)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6029168A (en) 1998-01-23 2000-02-22 Tricord Systems, Inc. Decentralized file mapping in a striped network file system in a distributed computing environment
US6055227A (en) * 1998-04-02 2000-04-25 Lucent Technologies, Inc. Method for creating and modifying similar and dissimilar databases for use in network configurations for telecommunication systems
DE19836347C2 (en) 1998-08-11 2001-11-15 Ericsson Telefon Ab L M Fault-tolerant computer system
US6449731B1 (en) 1999-03-03 2002-09-10 Tricord Systems, Inc. Self-healing computer system storage
US6725392B1 (en) 1999-03-03 2004-04-20 Adaptec, Inc. Controller fault recovery system for a distributed file system
US6530036B1 (en) * 1999-08-17 2003-03-04 Tricord Systems, Inc. Self-healing computer system storage
FI108599B (en) * 1999-04-14 2002-02-15 Ericsson Telefon Ab L M Recovery in Mobile Systems
GB2359384B (en) * 2000-02-16 2004-06-16 Data Connection Ltd Automatic reconnection of partner software processes in a fault-tolerant computer system
US7715837B2 (en) * 2000-02-18 2010-05-11 Telefonaktiebolaget Lm Ericsson (Publ) Method and apparatus for releasing connections in an access network
US7058847B1 (en) 2002-12-30 2006-06-06 At&T Corporation Concept of zero network element mirroring and disaster restoration process
US7287179B2 (en) 2003-05-15 2007-10-23 International Business Machines Corporation Autonomic failover of grid-based services
DE10328661A1 (en) 2003-06-26 2005-01-13 Deutsche Telekom Ag Telecommunication network organizing method e.g. for exceptional situations, involves central server having telecommunications network and software for organization and or execution of switching of telecommunications connections

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4371754A (en) * 1980-11-19 1983-02-01 Rockwell International Corporation Automatic fault recovery system for a multiple processor telecommunications switching control
US4710926A (en) * 1985-12-27 1987-12-01 American Telephone And Telegraph Company, At&T Bell Laboratories Fault recovery in a distributed processing system

Also Published As

Publication number Publication date
SE9703132A0 (en) 1997-08-29
SE9703132L (en)
SE9504396L (en) 1997-06-09
AU1048897A (en) 1997-07-03
WO1997022054A2 (en) 1997-06-19
SE9703132D0 (en) 1997-08-29
WO1997022054A3 (en) 1997-09-04
SE515348C2 (en) 2001-07-16

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