RU2496120C2 - Multifunctional multirange scalable radar system for aircraft - Google Patents

Abstract

FIELD: radio engineering, communication.

SUBSTANCE: method is realised through integration of digital devices, which are part of a system (frequency synthesiser, synchroniser, receiver, high-efficiency central computer, high-speed data transfer interfaces), into a single macro module, as well as presence of four receiving channels with difference patterns in the inclined and azimuthal planes, overall and compensation, application of corresponding monopulse direction finding techniques, which increases azimuth resolution. The disclosed system generates probing signals with different types of modulation and real-time frequency adjustment from pulse to pulse on a random law, which increases range resolution, stealthiness of operation and noise-immunity.

EFFECT: design of a multifunctional, multirange, small-size, scalable radar system.

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Description

The invention relates to the field of radar and is intended to perform a wide range of tasks in the air-to-surface, air-to-air, meteo and low-altitude flight modes when used on aircraft.

Known radar for aircraft designed to detect, track objects, measure their coordinates, detect lightning fronts, detect and measure the height of ground obstacles and perform other functions.

For example, a dual-band monopulse radar with integrated control, application No. 2001104500 dated 02.20.2001. The radar contains an antenna with a range sum-difference device and auxiliary antennas, two transceiver paths. The problems of monopulse direction finding were solved when working in two ranges. However, the radar has the following disadvantages: the receiving path is analog, low noise immunity and resolution in coordinates; multifunctionality is not provided.

In the radar protected by patent WO 2010090564, a high resolution in coordinates has been achieved when operating in two ranges. The disadvantages include: low noise immunity, there is no single-pulse direction finding, multifunctionality is not provided.

Also known multifunctional radar station for aircraft (RU patent No. 2319173, IPC G01S 13/90), adopted as a prototype. The structure is shown in figure 1, where are indicated:

1. Slot antenna;

2. The transmitting device;

3. The circulator;

4. Receive switch;

5. The receiving device;

6. Analog-to-digital processor;

7. power amplifier;

8. Modulator;

9. Frequency synthesizer - synchronizer;

10. The master oscillator;

11. Digital signal processor;

12. Digital data processor;

13. Indicator;

14. The microwave receiver;

15. The amplifier is an intermediate frequency;

16. The analog-to-digital converter (ADC);

17. angle sensor;

18. Transceiver unit.

This radar performs the functions of detecting lightning fronts and cumulus clouds, surveying the earth's surface, detecting and measuring the height of ground obstacles when flying at low altitudes. The measurement function with a given accuracy of the height of ground obstacles is provided by narrowing the antenna beam in the elevation plane at the reception. This is achieved by the fact that in the slot antenna, in addition to the summary diagram, a difference diagram is formed in the elevation plane.

To implement the task of framing in the elevation plane of the total diagram, a difference diagram signal is used. For this, a framing device is introduced into the digital signal processor, including a switch, a first memory device (U _∑ ), a second memory device (U _Δ ), a difference device, the first and second multiplication device (see figure 2).

This radar has the following disadvantages: work in one band, there is no monopulse direction finding in azimuth, there is no high resolution in coordinates, the frequency synthesizer is analog, which does not allow to increase the functions.

Given the current requirements for the functions of the radar systems of aircraft, to improve the resolution, accuracy and reliability of solving problems with severe restrictions on the dimensions of the equipment, the objective of the invention is to create a multifunctional, multi-band, small-sized, scalable system.

радиочастотных модулей (РЧМ) различных диапазонов длин волн, каждый из которых состоит из антенного модуля (1), содержащего волноводно-щелевую антенную решетку (ВЩАР) (2) и привод (3), передатчика (9), циркулятора (7), приемозадающего модуля (5), содержащего четырехканальный сверхвысокочастотный приемник (СВЧ-приемник) (6), цифровой приемник (ЦПРМ) (8), цифровой синтезатор частот и синхросигналов управления (СЧС) (10), при этом ЦПРМ содержит четырехканальный аналого-цифровой преобразователь (АЦП), программируемую логическую интегральную схему (ПЛИС 1) обработки информации и управления, программируемую логическую интегральную схему (ПЛИС 2) ввода-вывода, при этом первые входы АЦП подключены к соответствующим выходам СВЧ-приемника по четырем приемным каналам - суммарному, разностному по наклону, разностному по азимуту и компенсационному - на промежуточной частоте, выходы АЦП подключены к ПЛИС 1 обработки информации и управления, «вход-выход» которой посредством интерфейсной связи соединен с «входом-выходом» ПЛИС 2 ввода-вывода, которая в свою очередь посредством последовательного высокоскоростного интерфейса (SRIO) (типа точка-точка) соединена с бортовой цифровой вычислительной машиной (БЦВМ), первый выход СЧС соединен с входом передатчика, второй выход - с входом СВЧ-приемника, третий выход - со вторым входом АЦП, четвертый выход - с ПЛИС 1 цифрового приемника и с БЦВМ, а вход СЧС - с БЦВМ посредством мультиплексного канала информационного обмена (МКИО). На фиг.3 обозначены:The solution to this problem is achieved by the fact that the proposed radar (see figure 3) contains i, $$i=\overline{\mathrm{one,}N}$$

radio frequency modules (RFM) of various wavelength ranges, each of which consists of an antenna module (1) containing a slotted waveguide antenna array (VCHAR) (2) and a drive (3), a transmitter (9), a circulator (7), a receiver module (5), containing a four-channel microwave receiver (microwave receiver) (6), a digital receiver (DPC) (8), a digital synthesizer of frequency and control clock signals (SCH) (10), while the DPRM contains a four-channel analog-to-digital converter ( ADC), programmable logic integrated circuit (FPGA 1) about information and control, programmable logic integrated circuit (FPGA 2) I / O, while the first inputs of the ADC are connected to the corresponding outputs of the microwave receiver through four receiving channels - total, difference in slope, difference in azimuth and compensation - at an intermediate frequency, ADC outputs are connected to FPGA 1 of information processing and control, the input-output of which is connected via interface communication to the input-output of FPGA 2 of input-output, which, in turn, by means of serial high of the flash interface (SRIO) (point-to-point type) is connected to the on-board digital computer (BCM), the first output of the SCH is connected to the input of the transmitter, the second output is to the input of the microwave receiver, the third output is to the second input of the ADC, the fourth output is from FPGA 1 of a digital receiver and with a digital computer, and the input of the frequency response system - with a digital computer through a multiplexed information exchange channel (MKIO). Figure 3 marked:

1. Antenna module;

2. Waveguide-slot antenna array (VCHAR);

3. Antenna drive;

;4. The radio frequency module i, $$i=\overline{\mathrm{one,}N}$$

;

5. Receiving module;

6. microwave receiver;

7. The circulator;

8. Digital receiver;

9. Transmitter;

10. A synthesizer of frequencies and control clock signals;

11. BTsVM;

MKIO - multiplexed information exchange channel;

SRIO - serial high speed interface.

Figure 4 presents a block diagram of a digital receiver, where indicated:

12. ADC1 of the total channel ∑;

13. ADC2 of the difference channel by the slope Δн;

14. ADC3 of the difference channel in azimuth Δa;

15. ADC4 compensation channel K;

16. Programmable logic integrated circuit (FPGA 1) information processing and control;

17. Programmable logic integrated circuit (FPGA 2) input-output information;

Figure 5 shows a block diagram of a digital frequency synthesizer and control clock, where are indicated:

18. Programmable logic integrated circuit (FPGA 3) control;

19. Digital local oscillator;

20. Digital quadrature mixer;

21. Digital-to-analog converter (DAC);

22. The reference frequency generator;

23. The mixer.

The construction of the proposed multifunctional multiband scalable radar system is based on the use of modern digital methods and devices for processing, receiving and transmitting information and software (software) in real time. This made it possible to create small-sized with a high degree of integration radio-frequency modules, which are integrated with the digital computer as part of the radar by information exchange interfaces and have practically no restrictions on their mutual placement.

идентичных радиочастотных модулей (4), в зависимости от числа используемых частотных диапазонов и единой БЦВМ (11), которая связана с каждым из i модулей (4) последовательным высокоскоростным интерфейсом (SRIO i) и управляющим интерфейсом МКИО 1.Proposed in accordance with figure 3, the radar system consists of i, $$i=\overline{\mathrm{one,}N}$$

identical radio frequency modules (4), depending on the number of frequency bands used and a single digital computer (11), which is connected to each of the i modules (4) by a serial high-speed interface (SRIO i) and the control interface MKIO 1.

The sounding signal is produced through the total (z) channel of the VCHAR (2), for which the output of the transmitter (9) is connected to the input of the circulator (7), and the “input-output” of the circulator (7) is connected to the total channel of the VChAR (2).

The reception of reflected sounding signals is carried out using the antenna module (1) through the VCHAR (2) in total (∑), difference in slope (Δн), difference in azimuth (Δa) and compensation (K) channels. To transmit the received VCHAR (2) signal through the total channel (∑), the output of the circulator (7) is connected to the first input of the microwave receiver (6). To transmit the received signal over the channel with a difference in slope (Δн), the second VCHAR output (2) is connected to the second input of the microwave receiver (6). To transmit the received signal over the differential azimuth channel (Δа), the third output of the VCHAR (2) is connected to the third input of the microwave receiver (6). To transmit the received signal through the compensation channel (K), the fourth VCHAR output (2) is connected to the fourth input of the microwave receiver (6). The outputs of the corresponding channels of microwave receivers (6) at an intermediate frequency are connected respectively to the first inputs of ADC1 (12), ADC2 (13), ADC3 (14), ADC4 (15) of the digital receiver (8), the structure of which is shown in Fig. 4. In the digital receiver (8), the “digitized” signals of the receiving channels ∑, Δн, Δа, and K from the outputs of ADC1 (12), ADC2 (13), ADC3 (14), ADC4 (15) respectively arrive at the first, second, third, and fourth FPGA inputs 1 for information processing and control (16), where digital heterodyning, demodulation of signals with linear frequency modulation (LFM), and compensation of phase changes of the received signal due to carrier movement are performed. To exchange data from a digital receiver (8), input-output FPGA 1 (16) is connected to input-output FPGA 2 (17) I / O, which, in turn, is connected to the input-output via a serial high-speed SRIO interface BTsVM (11).

The generation of signals of the clock interval (TI) and sampling frequency (Fv) used in the digital receiver (8) and the digital computer (11) is performed in the CES (10) shown in Fig. 5, the fourth output of which with the designation TI is connected to the FPGA input 1 information processing and control (16) of the digital receiver (8) and the digital computer (11), and the third output with the designation fb is connected to the second control inputs of the ADC1 (12), ADC2 (13), ADCP (14), ADC4 (15) digital receiver (8).

To transmit the local oscillator frequency signal (Fg), the second output of the frequency response (10) is connected to the fifth input of the microwave receiver (6).

To transmit the carrier frequency signal F _{0, the} first output of the frequency response (10) is connected to the input of the transmitter (9).

The SCH (10) is controlled from the digital computer via the MKIO channel 1 via FPGA 3 controls (18), the output signals of which are fed to a digital quadrature mixer (20) and a reference frequency generator (22).

For the first frequency conversion of the generated carrier signal F ₀ from the second output of the reference frequency generator (22), the signal of the first local oscillator Fg1 through the input and subsequent output of the digital local oscillator (19) is fed to the first input of the digital quadrature mixer (20).

To generate the signal F ₀ with complex modulation laws and operational “pulse-to-pulse adjustment”, the “modulation” component of this signal is fed to the second input of the digital quadrature mixer (20) from the first output of FPGA 3 (18), from the output of which the generated the signal in digital form is fed to the input of a digital-to-analog converter (DAC) (21), where it is converted into an analog signal and fed to a mixer (23). At the second input of the mixer (23) from the reference frequency generator (22), the local oscillator frequency signal Fg is supplied. In the mixer (23), a carrier frequency signal F ₀ is generated, which is fed to the input of the transmitter (9).

The proposed radar architecture and the construction of the described devices provide wide information capabilities, high resolution and accuracy due to the formation of complex broadband probing signals and subsequent preliminary, primary and secondary processing of the received signals.

Below is an example of signal processing that implements the detailed resolution mode (DR), and shows the capabilities of the radar to use new highly efficient methods of signal processing.

Figure 6 shows a diagram of the implementation of the DR mode. Radar signals are processed in three stages. At the first stage, preliminary processing is performed in a digital receiver (8). In this case:

- measurement of the maximum signal level;

- removal of the DC component in the signal;

- digital heterodyning (compensation of phase changes of the received signal from count to count and from pulse to pulse due to carrier movement);

- demodulation of chirp signals.

At stage two, primary signal processing is performed on the first microprocessor of the central processor of the digital computer (11). In this case, a frequency-manipulated signal is converted, including:

- FFT (fast Fourier transform) in range;

phase correction, compensating the dependence of the delay of the received signal on the distance;

- inverse FFT in range;

- sampling (correction of the phase of the signal to eliminate the dependence of the Doppler frequency on distance and changing the distance from pulse to pulse within the radar cycle, docking of fragments of the sample in the time domain);

- recording of samples (radio holograms) in memory.

At stage three, secondary signal processing is performed on the second microprocessor of the central processor of the digital computer (11). At the same time carried out:

- autofocus signals;

- Compression of signals in azimuth using FFT;

- phase correction of signal migration along range elements;

- range signal compression using FFT;

- incoherent summation of signals over several carrier frequencies to reduce the speckle effect;

- formation of a radar image (RLI) (compensation of amplitude modulation caused by the automatic gain control of the signal (ARUS), the influence of the antenna pattern (BOTTOM) in azimuth and slope, as well as by changing the signal level from distance, calculating the screen coordinates of the radar points, forming an array amplitudes in the indicator format, conversion of the dynamic range of signal amplitudes to the dynamic range of radar data, information output to the indicator via the RS 343A interface).

The synchronization of the radar and the information exchange of signal processing processors is carried out under the control of the third microprocessor of the central processor of the computer (11), which also performs:

- formation of a viewing zone;

- management of RFM modules;

- receiving information from the navigation system according to MKIO 2 (not shown in FIG. 3);

- calculation of the trajectory of the aircraft;

- calculation of the parameters necessary for processing the received signals.

Thus, through the developed software in the proposed radar, the solution of the problems of the prototype is provided, and the following functions and properties are additionally implemented:

1. Simultaneous or selective operation in different frequency ranges, for example, millimeter, centimeter and decimeter, which allows using the features of the propagation and reflection of radio signals in different environments, integrally obtain higher characteristics in range, accuracy, resolution in simple and complex interference and weather conditions, as well as to ensure the detection and observation of objects hidden by vegetation or other radio-transparent cover for the used frequency ranges.

2. Mapping with real beam and aperture synthesis.

3. Information support for low-altitude flight with the formation of a profile (vertical and horizontal) and quasi-three-dimensional radar images of the earth's surface and objects (including the detection of power transmission lines).

4. Selection of moving, including low-speed objects.

5. Definition of areas of increased turbulence and low altitude "wind shears".

6. Review, detection and discrete tracking of air targets.

7. Scalability, which allows to choose one or another composition and placement of radio-frequency modules for solving specific problems and for specific media while maintaining overall control from the digital computer.

Claims (1)

A multifunctional multiband scalable radar system for aircraft, comprising a radio frequency module (RFM) and an on-board digital computer (BCM), characterized in that it contains i RFM, $$i=\overline{\mathrm{one,}N}$$

, each of which has its own operating wavelength range, consists of an antenna module containing a slotted waveguide antenna array (VCHAR) and a drive, a transmitter, a circulator, a receiving module containing a four-channel microwave receiver (microwave receiver), a digital receiver, and a digital synthesizer frequency and control clock signals (SCH), and has a connection with the digital computer, while for the emission of the probing signal, the transmitter output is connected through a circulator to the total channel VCHAR, and to receive the reflected signal through the total VCHAR is connected through the circulator to the total channel of the microwave receiver, for receiving through differential channels along the slope and in azimuth connected respectively to the four inputs of a digital receiver containing a four-channel analog-to-digital converter (ADC), programmable logic integrated circuit (FPGA 1) information processing and control, programmable logic integrated circuit (FPGA 2) I / O, while the outputs of the four-channel ADC are connected to the four inputs of the FPGA 1, and the "input-output" FPGA 1 is connected to the "input-output" FPGA 2, which, in its in turn, through a high-speed serial interface, SRIO is connected to the digital computer, with the first SCH output - the output of the carrier frequency signal F _о connected to the transmitter input, the second output - the output of the frequency local oscillator signal F _g connected to the input of the microwave receiver, the third output - the output of the frequency signal samples with F _in union of a four channel ADC control input of the digital receiver, the fourth output - the output clock signal interval TI is connected to the control input 1 FPGA digital receiver and digital computer and input ESS coupled to the onboard computer by multiplex traffic channel.

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