RU2449470C1 - Ramp-type analogue-to-digital converter - Google Patents

Abstract

FIELD: information technology.

SUBSTANCE: ramp-type analogue-to-digital converter (ADC) consists of a multi-zone scanning converter (MSC), having two adders, an integrator and relay elements, switch elements, a differentiator, a demodulator, a single-pulse generator, a delay element, an ALU, a memory register and input and output terminals.

EFFECT: high accuracy of the ADC by using an arithmetic logic unit in the closed bidirectional self-oscillating system of the MSC.

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Description

The device relates to the field of computer technology, is intended to convert an analog signal into a code, such as binary, and can be used in control systems for automation of technological processes.

Known analog-to-digital Converter (ADC) based on the tracking voltage Converter in the time interval (Martyashchin A.I., Shakhov E.K., Shlyandin V.M. Electrical parameters converters for monitoring and measurement systems. M., Energy, 1976, p. 53) containing an adder, a voltage-controlled generator, a fixing element, a filter, a time interval to voltage converter.

The known technical solution has low static and dynamic accuracy for the following reasons:

- the presence of a filter in the feedback channel reduces the noise immunity of the ADC, since the filter in the high-frequency region of the input exposure gives the device the properties of a differentiating element sensitive to high-frequency noise;

- the feedback channel contains an “interval-voltage” converter, which, due to its structure, generates an additive error that is unambiguously included in the resulting ADC characteristic;

Known ADCs using the push-pull integration method (Emelyanov A.V., Shilin A.N. Study of push-pull integration ADCs: method. Decree - Volgograd. Volgograd State Technical University, 2003. - P. 4.), containing an integrator, key and logical elements, generators pulses, counter, memory register.

The known device has a high noise immunity, but belongs to the class of open systems, which negatively affects the accuracy of its operation. In addition, the ADC is disconnected from the input signal for the period of converting “analog” to “digital”, which leads to loss of information about the state of the controlled object.

Closest to the proposed ADC is a multi-zone deployment converter (MCI) (SU No. 1183988, IPC G06G 7/12, application. 04.27.84, publ. 07.10.85, Bull. No. 37), containing adders, integrator, relay elements, input and output terminals.

The prototype device belongs to the class of self-oscillating frequency-pulse-width (PWM) converters of the integrating type, has high noise immunity and accuracy, due to the closed nature of the MCI structure and the presence of an integrator in the direct control channel.

Converting the output signal of the MCI (the average value of the output pulses) into a code requires the inclusion of a smoothing filter at the output of the device and directly the ADC of one or another operating principle.

Such a structure will have low accuracy, since it is practically impossible to match the amplitude value of the ripple at the output of the smoothing filter during CWP, which can then be taken into account as a constant value of the conversion error with the clock frequency of the ADC.

Thus, the known technical solution when constructing an ADC based on it will be characterized by low accuracy.

The basis of the invention is a technical problem, which consists in improving the accuracy of the ADC based on a multi-zone frequency-latitude-pulse converting converter.

The proposed integrating analog-to-digital converter containing a series-connected input signal source, a first adder, an integrator, the output of which is connected to the inputs of a group of an n-th number of relay elements, where n≥3 is an odd number, the outputs of the relay elements are connected to the corresponding inputs of the second adder , the output of which is connected to the second input of the first adder, a group of (n-1) -th number of key elements, the inputs of which are connected to the outputs of the group of the n-th number of relay elements, starting from the second relay of the element, the output terminal, is characterized in that a differentiating element, a demodulator, a single pulse generator and a delay element, as well as arithmetic logic device and a memory register are connected in series, the input of the differentiating element connected to the output of the second adder, the output a single pulse generator is connected to the command input of an arithmetic logic device, the information inputs of which are connected to the corresponding outputs of the group of (n-1 ) - the number of key elements, the output of the delay element is connected to the input of the memory register record, the outputs of the memory register are connected to the output terminal of the analog-to-digital converter.

The proposed device provides increased accuracy.

The stated technical problem is achieved due to the fact that the MCI is a closed reverse self-oscillating system. Moreover, each of the modulation zones of the MCI is characterized only by its inherent number of single (or zero) states of key elements, which, using the introduced arithmetic-logical device, is converted into a working, for example, binary or binary-decimal code, corresponding to this modulation zone. In addition, the conversion of an analog signal into a code is performed not only in the mode of finding the MCI in a given modulation zone, but also when it passes from one zone to another.

The invention is illustrated by drawings, where:

figure 1 gives the structure of the proposed integrating ADC;

figure 2 shows the characteristics of the elements of the ADC;

figure 3 shows the diagrams of the MCI signals;

figure 4 shows the characteristics of the MCI;

figure 5 presents the timing diagram of the signals of the AC voltage regulator;

6, 7 static characteristics and code tables MCI.

The structure of the device (Fig. 1) includes MCI 1 based on adders 2, 3, integrator 4, the output of which is connected to a group of the n-th number of relay 5-1 ... 5-n, and n≥3 is an odd number. Also, a group of (n-1) -th number of key elements 6-1 ... 6- (n-1), the inputs of which are connected to the outputs of the group of the n-th number of relay elements 5-2 ... 5-n, starting from the second relay element 5-1. In addition, a differentiating element 7, a demodulator 8, a single pulse generator 9 and a delay element 10, as well as arithmetic-logic device 11 and a memory register 12, connected in series with the input of the differentiating element 7 are connected to the output of the second adder 3, and the output a single pulse generator 9 is connected to the command input of the arithmetic logic device 11, the information inputs of which are connected to the corresponding outputs of the group of (n-1) - the number of key elements ntov 6-1 ... 6- (n-1). The output of the delay element 10 is connected to the recording input of the memory register 12, the outputs of the memory register 12 are connected to the output terminal of the analog-to-digital converter 11. The device also contains an input 13 and output 14 terminals.

ADC elements have the following characteristics.

Adders 2, 3 are made with a transmission coefficient for each of the inputs equal to 1.0.

Integrator 4 is implemented with a transfer function of the form W (p) = 1 / T _and p, where T _and is the time constant. Its output signal increases linearly with a jump in the input action with a sign opposite to the sign of the input signal (Fig. 2, a).

Relay elements 5-1 ... 5-n have a symmetrical hysteresis loop and switching thresholds that satisfy the condition:

| ± b _i | <| ± b ₂ | <| ± b ₃ | <... <| ± b _n |,

where ± b _i - switching thresholds of the corresponding relay elements 5-1 ... 5-n; n≥3 is an odd integer. The output signal of the relay elements 5-1 ... 5-n varies discretely within ± A / n (Fig.2, b).

The keys 6-1 ... 6- (n-1) have a non-inverting characteristic with a zero value of the switching thresholds and are designed to convert a bipolar input signal into unipolar pulses (figure 2, c).

The differentiating link 7 generates pulses of short duration synchronously with the leading and trailing edges of the input signal (figure 2, g).

The demodulator 8 has a static characteristic "input-output", shown in figure 2, e, and converts the output signal of the link 7 into unipolar pulses.

A single pulse generator 9 generates pulses of a given duration and fixed amplitude synchronously with the output pulses of block 8 (Fig.2, e).

The delay element 10 shifts the input signal by a predetermined time interval, preserving its shape.

ALU 11 counts “1” (or “0”) from the outputs of the keys 6-1 ... 6- (n-1) and converts this number into a working code, such as binary.

The memory register 12 records and stores data for a predetermined time interval. Writing to the register 12 is performed synchronously with the leading edge of the signal from the output of the delay element 10.

The following notation is used on signal diagrams:

X _in - reference signal;

Y _and (t) is the output signal of the integrator 4;

Y _P1 , Y _P2 (t), Y _P3 (t), Y _P4 (t), Y _P5 (t) - output signals of relay elements 4-1 ... 4-5, respectively;

Y _o (t) is the output signal of the adder 3;

Y ₀ - the average value of the output pulses of the adder 3;

Y _G (t) is the output signal of the generator 9.

The principle of operation of the device is as follows:

Hereinafter, we assume that the transmission coefficient of the MCI 1 is equal to one, and the change in the input signal level coincides with the beginning of the next cycle of the deployment transform. Consider the work of MCI with n = 3.

When you turn on MCI and a zero input signal X _I relay elements 5-1 ... 5-3 are set arbitrarily, for example, in the state + A / 3 (figure 3, e-d). Under the action of the scan signal Y _and (t) from the output of the integrator 4 (Fig. 3, b), a sequential switching to the position -A / 3 of blocks 5-1 and 5-2 (Fig. 3, c, d, time t ₀₁ , t ₀₂ ), after which the direction of the scattering transformation changes, and the signal Y _and (t) at the output of the integrator increases in the positive direction.

Starting from the moment of fulfillment of condition Y _and (t) = b ₁ , MCI 1 enters the stable self-oscillation mode when the amplitude of the scan signal Y _and (t) is limited by the ambiguity zone of relay element 5-1, and blocks 5-2 and 5-3 are in static and opposite in sign output signals Y _P2 (t), Y _P3 (t) states (Fig.3, g, d). The output coordinate Y _o (t) MCI 1 is formed due to the switching unit 5-1 (Fig.3, c) in the first modulation zone, limited by ± A / 3 (Fig.3, f).

влечет за собой изменение частоты и скважности импульсов Y_вых(t), так как в интервале t₁ (фиг.3,в) развертка Y_и(t) (фиг.3,б) изменяется под действием разности сигналов, подаваемых на сумматор 2 (фиг.3,а, е), а в интервале t₂-dY_и(t)/dt зависит от суммы этих воздействий. В результате Y₀≡X_вх (фиг.3,е).In the absence of X _I (Fig. 3, a, t <t ₀ ), the average value Y _{0 of the} pulses Y _o (t) is zero. The presence of the input coordinate X _bx <(A / 3) (Fig.3, a,

entails a change in the frequency and duty cycle of the pulses Y _o (t), since in the interval t ₁ (Fig.3, c) the scan Y _and (t) (Fig.3, b) changes under the influence of the difference of the signals supplied to the adder 2 (Fig.3, a, e), and in the interval t ₂ -dY _and (t) / dt depends on the sum of these effects. As a result, Y ₀ ≡X _in (Fig. 3, e).

сигнал Х_вх увеличился дискретно до величины (А/3)<X_вх<А (фиг.3,а). Это нарушает условия существования режима автоколебаний в первой модуляционной зоне, и МРП 1 переходит на этап переориентации состояний релейных элементов 5-2 и 5-3, который заканчивается в момент времени t₀₃, когда релейный элемент 5-3 переключается в положение -А/3 (фиг.3,д). Координата Y_вых(t) достигает уровня - А (фиг.3,е), и МРП 1 переходит во вторую модуляционную зону, где в интервалах t₁, t₂ (фиг.3,в) скорость формирования развертывающей функции Y_и(t) (фиг.3,б) также определяется разностью или суммой сигналов, воздействующих на сумматор 2 (Фиг.1). При этом сигнал Y₀ включает постоянную составляющую -А/3 первой и среднее значение импульсного потока Y_вых(t) второй модуляционных зон (фиг.3,е). Переход МРП 1 из одной модуляционной зоны в другую для малых приращений координаты X_вх сопровождается переходом системы через характерные точки с нулевым значением частоты несущих колебаний (режим частотно-нулевого сопряжения модуляционных зон).Assume that at time

the signal X _I increased discretely to a value of (A / 3) <X _I <A (Fig.3, a). This violates the conditions for the existence of a self-oscillation mode in the first modulation zone, and MCI 1 proceeds to the stage of reorientation of the states of relay elements 5-2 and 5-3, which ends at time t ₀₃ , when the relay element 5-3 switches to position -A / 3 (figure 3, d). The coordinate Y _o (t) reaches level A (Fig. 3, e), and the MCI 1 passes to the second modulation zone, where in the intervals t ₁ , t ₂ (Fig. 3, c) the speed of formation of the developing function Y _and (t ) (Fig. 3, b) is also determined by the difference or sum of the signals acting on the adder 2 (Fig. 1). The signal Y ₀ includes a constant component -A / 3 of the first and the average value of the pulse flow Y _o (t) of the second modulation zones (Fig.3, e). Daylight MCI 1 from one zone to another modulation for smaller increments of the coordinates X _Rin accompanied by a transition of the system through the characteristic points with zero frequency carrier waves (zero-frequency modulation zones interfacing mode).

Figure 4 shows the signal diagrams of the MCI 1 corresponding to the case n = 5 and the level - X _BX1 (figure 4, g), in which the MCI 1 operates in the higher modulation zone of the second quadrant of the static characteristic Y ₀ = (- 1) f ( X _BX ).

Suppose that at time t = t _{0 the} signal - X _BX1 has changed by the value X _BX1 = | -X _BX1 | (figure 4, g). Then, starting from the moment t ₀₁ (Fig. 4, a, b), the MCI 1 switches to the reorientation mode of the relay elements 5-1 ... 5-5 (Fig. 4, a, b, moments of time t ₀₂ , t ₀₃ , t ₀₄ , t ₀₅ ), when a negative sign signal is established at their outputs, which ultimately translates the MCI 1 into the fourth quadrant of the characteristic Y ₀ = (- 1) f (X _BX ) (Fig. 4, g). After this, the self-oscillating mode is again resumed in the path of the relay element 5-1 (Fig. 4, a, b), and the remaining relay elements are in a static position (Fig. 4, c-e).

The differentiating link 7 captures the voltage drops at the output of the adder 3 by forming "short" pulses with a sign that corresponds to the sign of the derivative of the front of the output signal of the adder 3. Then these pulses are rectified (demodulated) using block 8 and start the generator 9 (figure 4, s )

The modulation and amplitude characteristics of the MCI 1 for the case of an odd number of REs are presented in figure 5, which show that:

- MCI 1 in each modulation zone is a system with a frequency-pulse-width-modulation, when with increasing X _{I the} frequency of the output pulses decreases and at the interface of the modulation zones it becomes zero;

- in the entire range of changes in input exposure X _{I the} amplitude characteristic of the MCI 1 is linear, which is explained by the closed nature of the structure of the MCI 1 and the presence of an integrator in the direct control channel;

- the number of modulation zones "k" MCI 1 is determined by the number of "n" relay elements 4-1 ... 4-n and is equal to:

k = (n + 1) / 2 _{| n≥3, 5, 7 ...}

- the mode of self-oscillations always occurs in the channel of the relay element having the minimum value of the switching thresholds. The remaining relay elements are in static states, the sign of which depends on the serial number of the modulation zone;

- when MCI 1 is turned on, relay elements can be oriented arbitrarily at the first moment of time, however, this does not affect the type of characteristic Y ₀ = (- 1) f (X _ВХ ), since MCI is a closed system with self-orientation of relay elements arising under the action of an integrator in a direct control channel. Here (-1) is the sign of inverting MCI 1 polarity of the input signal.

The keys 6-1 ... 6- (n-1) convert the bipolar pulses from the output of the relay elements 5-1 ... 5-n into a unipolar signal (figure 2, c).

Consider the static characteristic Y ₀ = (- 1) f (X _BX ) MCI in Fig.6, and for the case n = 3. In the future, the output signal + A / 3 of the relay element 5-2 ... 5-3 (or keys 6-1, 6-2) is assigned the value "1", and the signal -A / 3 (or signal "0" at the output of the keys 6 -1 ... 6-2) - the value of "0". Here Y ₀ is the average value of the pulses at the output of the adder 3.

When the number of relay elements is three, the number of modulation zones is two (Fig.6, a): the 1st zone is within ± A / 3, the second zone of the first quadrant ("2nd zone" - ") is limited by | -A / 3 | ≤Y _OUTPUT (t) ≤ | -A |, and the second zone ("2nd zone" + ") is formed in the range | A / 3 | ≤Y _OUTPUT (t) ≤ | A |. The state of the relay elements 5-2 and 5-3 for each of the zones is strictly fixed. Given that in MCI 1 there are no preset relay elements, the first modulation zone is characterized by two possible states of relay elements 01 or 10. For older modulation zones, only one state 11 or 00 is possible.

Hereinafter, for modulation zones (with the exception of the first), it is enough to simply recognize the sign of the input signal: if the number of units exceeds the number of zeros, the input signal has a negative value. Otherwise, the sign of the input signal is positive. In the future, we assign “1” to the digit of the ADC if X _BX has a positive polarity.

Fig.6, b and Fig.7 shows the static characteristics of Y ₀ = f (X _BX ) with n = 5 and n = 7, respectively. It also shows the characteristic (dotted line) that the cascade would have on the basis of the proposed ADC and the digital-to-analog converter (DAC) connected in series. Below the characteristics Y ₀ = f (X _BX ) are the code tables for MCI 1 with the number of relay elements n = 5 and n = 7, respectively. Their comparative analysis reveals the following patterns:

- in the first (youngest) modulation zone, the number of “1” and “0” is equal to each other regardless of the number of “n” relay elements;

- as you move away from the lowest modulation zone, for example, to the left along the X-axis of the _BX in each subsequent zone, the number “1” increases by one and in the limit (highest modulation zone) all “0” are replaced by “1”;

- in a similar way, when moving to the right along the X axis, the _BX as the seniority of the modulation zone “1” increases, “0” is successively replaced and for the zone, for example, the 3rd “-” completely disappears.

Thus, by counting “1” (or “0”) in each of the modulation zones, you can get a decimal number for this zone, which is subsequently converted into a working, for example, binary ADC code.

For this purpose, in the device in question, ALU 11 is used, the functions of which include:

1) determining the number “1” at the output of the keys 6-1 ... 6- (n-1) and converting this number into a working ADC code;

2) the formation of a significant digit of the output code by comparing the numbers “1” and “0” (in fact, by the majority principle: “if there are more“ zeros ”, therefore, the sign of the input signal is positive” and “1” is assigned to the digit). The lowest (first) zone is equivalent to a zero value of the input signal, and no sign is assigned to it.

The command to execute ALU 11 of a given program is performed synchronously with the edges of the output signal of adder 3. For this purpose, a differentiating link 7, a demodulator 8, and a generator 9 are used. Thus, a code change is recorded not only in the process of finding MCI1 in a given modulation zone, but also during its transitions from one modulation zone to another.

After performing ALU 11 a specified operation with a time delay generated by element 10, data from ALU 11 is transferred to the memory register 12.

The number of relay elements required to obtain the required capacity n _R ADC is determined from the ratio:

For example, to obtain an 8-bit ADC, an MCI based on 511 relay elements is required, which can be implemented using analog and digital electronics software. The proposed technical solution has the following main advantages:

- the ADC is reversible (can work with signals of any sign) due to the characteristics of the MCI 1;

- The ADC has increased noise immunity due to integrator 4 in the forward channel МРП1;

- The ADC has increased accuracy, since the MCI 1 is a closed-loop control system;

- The ADC does not contain a clock generator whose functions are performed directly by the MCI 1. The conversion of an analog signal into a code occurs not only in the steady state, but also during the transition of the MCI 1 from one modulation zone to another.

The proposed integrating analog-to-digital converter can be used in control systems for the automation of technological processes.

Claims (1)

An integrating analog-to-digital converter containing a serially connected input signal source, a first adder, an integrator, the output of which is connected to the inputs of a group of an n-th number of relay elements, where n≥3 is an odd number, the outputs of the relay elements are connected to the corresponding inputs of the second adder, the output of which is connected to the second input of the first adder, a group of (n-1) -th number of key elements, the inputs of which are connected to the outputs of the group of the n-th number of relay elements, starting from the second relay element a, an output terminal, characterized in that a differentiating element, a demodulator, a single pulse generator and a delay element are inserted in series, as well as an arithmetic-logic device and a memory register, and the input of the differentiating element is connected to the output of the second adder, the generator output a single pulse is connected to the command input of the arithmetic-logical device, the information inputs of which are connected to the corresponding outputs of the group of (n-1) - the number of key elements, the output of the delay element is connected to the input of the memory register record, the outputs of the memory register are connected to the output terminal of the analog-to-digital converter.

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