RU2168869C1 - Method of demodulation of signals with relative phase-shift keying and device for realization - Google Patents

Abstract

FIELD: communication equipment. SUBSTANCE: method can be used for reception of discrete information signals with instability of signal frequency caused by presence of great value of Doppler frequency shift in communication channel in particular. Input phase-shift signal is resolved into cophasal and quadrature components relative to central frequency of range of input signals, each mentioned components is filtered in band of low frequencies equal to half-width of range of frequencies of input signals. Both filtered signals are delayed by half length of signal. In this case first component mentioned above is formed as result of summation of product of filtered cophasal signal with delayed filtered cophasal signal and product of filtered quadrature signal with delayed filtered quadrature signal. Second above-mentioned component of signal is formed as result of difference of product of delayed filtered cophasal signal with filtered quadrature signal and product of filtered cophasal signal with delayed filtered quadrature signal. Method is realized by device incorporating eight multipliers, common signal source 3, phase inverter 4, five storage elements of half-length of bit 5, 8, 9, 15, 22, two integrators 6, 7 with reset, three adders 12, 13, 19, solving unit 14, synchronizer 16, two low-pass filters 17, 20, subtracter 24. Common signal source presents generator whose frequency is equal to central frequency of range of input frequencies of signal, with width of band of low-pass frequencies equal to half-width of range of input frequencies. EFFECT: increased noise immunity thanks to exclusion of additional high-frequency noise components emerging in prototype after multiplication operations which come before integration with reset and thanks to reduced power of other noise components prior to integration with reset with maintenance of invariance to frequency of received signal. 3 cl, 2 dwg

Description

 The invention relates to communication technology and can be used when receiving discrete information signals with instability of the carrier frequency of the signal, caused in particular by the presence of a large value of the Doppler frequency offset in the communication channel.

 To receive and demodulate signals with relative phase shift keying, in the general case, it is possible to use three main methods of demodulation [1-3]: coherent, correlation, and autocorrelation.

Так как норма величина положительная, а для двухпозиционной фазовой манипуляции θ ∈ {0,π}, то в выражении (2) для двухпозиционной фазовой манипуляции требуется определять только знак переданной разности фаз:
signI = sign(cosθ ), (6)
где signI - знак переданного информационного символа, то есть (так как норма величина положительная):
signI = sign(S_n • S_n-1) (7)
Выражение (7) является фундаментальным в теории фазоразностной модуляции (ФРМ), поскольку с его помощью можно получить математические выражения для алгоритмов (способов) демодуляции сигналов с ФРМ и классифицировать их.The information parameter for phase-difference modulation is the phase difference of the two packages:
S _n-1 (t) = cos (ω ₀ t + θ _n-1 ), S _n (t) = cos (ω ₀ t + θ _n ). (1)
When demodulating is determined θ = θ _n -θ _n-1 :

Since the norm is a positive quantity, and for on-off phase manipulation θ ∈ {0, π}, in expression (2) for on-off phase manipulation it is required to determine only the sign of the transmitted phase difference:
signI = sign (cosθ), (6)
where signI is the sign of the transmitted information symbol, that is (since the norm is positive):
signI = sign (S _n • S _n-1 ) (7)
Expression (7) is fundamental in the theory of phase difference modulation (PRM), since it can be used to obtain mathematical expressions for the algorithms (methods) of demodulation of signals with PRM and to classify them.

позволяет осуществить автокорреляционную демодуляцию [1-3].Direct implementation of expression (7):

allows for autocorrelation demodulation [1-3].

With the correlation method of demodulation, the scalar product (S _n • S _n-1 ) is calculated through the projections of the vectors S _n (t) and S _n-1 (t) onto the coordinate functions (axes) f ₁ (t) = cos ωt and f ₂ ( t) = sin ωt, namely:
signI = sign [(S _n • f ₁ ) • (S _n-1 (t) • f ₁ ) + (S _n • f ₂ ) • (S _n-1 (t) • f ₂ )]. (9)
With the coherent demodulation method, the scalar product (S _n • S _n-1 ) is calculated through the projection onto the single coordinate axis f ₀ (t) = cos (ωt + θ ₀ ); thus:
signI = sign (S _n • f ₀ ) • sign (S _n-1 • f ₀ ), (10)
and the coordinate axis f ₀ (t) is obtained by restoring the phase of the carrier signal.

 The coherent demodulation method has the best noise immunity among the above demodulation methods [1-3], however, if the carrier frequency of the signal is unstable due to synchronization failures, information loss will occur during the recovery of the carrier signal [3, p. 160-164], in such cases use incoherent demodulation methods. Similarly, incoherent demodulation methods are more preferable in cases of significant a priori uncertainty of the carrier frequency of the signal, caused, in particular, by the presence of a large Doppler frequency shift in the communication channel with spacecraft (Mars) such as Mars Polarlander or Mars Pathfinder [6], as well as loss of the coherence of the reference oscillation, as was the case in the Galileo spacecraft [7].

Known correlation method of demodulation of signals with relative phase shift keying [4], the disadvantage of this correlation method of demodulation is that the detuning of the reference oscillation should not exceed the value inversely proportional to 8T _s [8]:
Δ <1 / 8T _s , (11)
where T _s is the duration of the character.

где Y_n(t), Y_n-1(t), Y_n-2(t) - посылки принимаемого сигнала, представляющие собой при отсутствии помех отрезки гармонического колебания с частотой ω и фазами Φ_n-2, Φ_n-1 и Φ_n,
принятый за прототип.Known more resistant to instability of the carrier frequency of the signal autocorrelation method of signal demodulation with relative phase shift keying [2, p. 158-162], absolutely invariant to the frequency of the demodulated signal based on the use of an operator of the form:

where Y _n (t), Y _n-1 (t), Y _n-2 (t) are the packages of the received signal, which, in the absence of interference, are harmonic-oscillation segments with frequency ω and phases Φ _n-2 , Φ _n-1 and Φ _n ,
adopted as a prototype.

где z(t) - принимаемый сигнал, a z^*(t) - сигнал, фаза которого повернута на 90^o по отношению к исходному сигналу.In the prototype, an autocorrelation demodulation algorithm similar to expression (12) has the form [2, pp. 160-162]:

where z (t) is the received signal, az ^* (t) is the signal, the phase of which is rotated by 90 ^o relative to the original signal.

As follows from expression (13), the prototype method involves the following operations on the signal:
- delay the received signal for half the duration of the character,
- form one component of the signal by multiplying the received and delayed signals,
- the phase of the delayed signal is rotated 90 ^o ,
- form another component of the signal by multiplying the received signal with a delayed signal, the phase of which is rotated 90 ^o ,
- synchronously integrate with a reset on a time interval equal to half the symbol duration, each of the two signal components,
- delay both integrated signals by half the duration of the character,
- multiply each of the two integrated signals with the corresponding delayed signal,
- summarize the results of multiplication,
- delay the total signal by half the duration of the character,
- summarize the total signal and the delayed total signal,
- make decisions about the value of the transmitted binary symbol by the sign of the result of the second summation.

 The prototype device [5] contains two quadrature autocorrelators, consisting of a common memory element for half the duration of the parcel, a phase shifter, two multipliers and two integrators with reset, the outputs of which are directly and through other memory elements for half the duration of the parcel connected to the third and fourth multipliers, the outputs of the latter are connected to the inputs of the adder, and its output is connected to one of the inputs of the additional memory element for half the duration of the transmission and through an additional adder with input house threshold element. The inputs of the additional adder through an additional memory element and are directly connected to the corresponding outputs of the synchronization and control device, also connected to all memory elements, except the first one, and to the reset inputs of the integrators.

 The disadvantage of the prototype method and the prototype device is the presence of interference in the multiplication results preceding integration with the reset. Show it.

(16)
где

- амплитуда сигнала, f₀ - несущая частота сигнала, Φ₀ - начальная фаза сигнала, T - длительность символа, ε начальная фаза тактовой частоты сигнала, m_i - дифференциально-кодированные информационные символы сообщения.We represent the model of the received signal r (t) as an additive mixture of the transmitted signal s (t) and the additive Gaussian band noise n (t):
r (t) = s (t) + n (t). (14)
A signal with relative phase shift keying (2PSK) can be described by the model [8]:

(16)
Where

is the signal amplitude, f ₀ is the carrier frequency of the signal, Φ ₀ is the initial phase of the signal, T is the duration of the symbol, ε is the initial phase of the clock frequency of the signal, m _i are the differential-encoded information symbols of the message.

В соответствии с известными тригонометрическими выражениями производные косинусов в (19) можно представить как полусумму косинусов суммарного и разностного углов:

Следует отметить, что информационной компонентой, несущей информацию о модулирующем сообщении m(t), является только первое из восьми слагаемых выражения (20), при этом остальные нечетные слагаемые, являются низкочастотными помеховыми компонентами, а все четные - высокочастотными помеховыми компонентами.The model of additive Gaussian bandwidth noise n (t) through its envelope n ₀ (t) can be represented as follows:
n (t) = n ₀ (t) cos (2πf ₀ t + ψ ₀ ) (17)
To simplify the notation, the signal amplitude is set equal to unity, the total phase of the signal is Φ (t) = 2πf ₀ t + Φ ₀ . Then r (t) can be represented as follows:
r (t) = m (t) cosΦ (t) + n ₀ cosΦ (t). (18)
The result of multiplying p _I (t) of the received signal r (t) with the same, but delayed, in accordance with the prototype method, signal r (tT / 2), is as follows:

In accordance with the well-known trigonometric expressions, the derivatives of cosines in (19) can be represented as the half-sum of cosines of the total and difference angles:

It should be noted that the information component carrying information about the modulating message m (t) is only the first of the eight terms of expression (20), while the remaining odd terms are low-frequency interference components, and all even ones are high-frequency interference components.

 Thus, all the following seven terms of expression (20) reduce the noise immunity of the prototype method.

Осуществляя с выражением (21) тождественные тригонометрические преобразования, как для выражения (20), получим:

Аналогично выражению (20) для p_I(t) в выражении (22) для pQ(t) слагаемым полученным для восстановления из r(t) модулирующей функции m(t) является только первое слагаемое. То есть, так же как и в выражении (20), последующие семь слагаемых в (22) снижают помехоустойчивость способа-прототипа. Отметим, если допустить равномерной спектральную плотность мощности N₀ для шума n₀(t) в полосе принимаемых частот B, что является обычным допущением для аудитивного полосового гаусовского шума, то его средняя мощность Pn₀= N₀B.A similar expression is also derived for the result of multiplying p _Q (t) of the received signal with a delayed signal, the phase of which is rotated 90 ^o :

Carrying out identical trigonometric transformations with expression (21), as for expression (20), we obtain:

Similarly to expression (20) for p _I (t) in expression (22) for pQ (t), the term obtained to restore the modulating function m (t) from r (t) is only the first term. That is, as in expression (20), the following seven terms in (22) reduce the noise immunity of the prototype method. Note that assuming a uniform power spectral density N ₀ for noise n ₀ (t) in the received frequency band B, which is a common assumption for audited Gaussian band noise, its average power Pn ₀ = N ₀ B.

 Thus, in the prototype method, additional interference signals are formed that reduce its noise immunity.

 The increase in noise immunity due to bandpass filtering is limited by the uncertainty in frequency and bandwidth of the received signal.

 The technical result of the invention is to increase noise immunity by eliminating additional high-frequency noise components that occur in the prototype after multiplication operations that precede integration with reset, and by reducing the power of other noise components before integration with reset, while maintaining invariance to the frequency of the received signal.

 The technical result is achieved by the fact that the method of demodulating signals with relative phase shift keying includes synchronous integration with resetting on a time interval equal to half the symbol duration, each of the two signal components, delaying both integrated signals by half the symbol duration, multiplying each of the two integrated signals with the corresponding it with a delayed signal, the summation of the results of multiplication, the delay of the total signal by half the duration of the symbol, the next the total summation of the total signal and the delayed total signal and the decision on the value of the transmitted binary symbol by the sign of the result of the second summation.

 According to the invention, the input phase-manipulated signal is decomposed into in-phase and quadrature components relative to the center frequency of the input signal range, each of these components is filtered in the low-frequency band equal to the half-width of the input signal frequency range, both filtered signals are delayed by half the symbol duration, the first of which is mentioned above the signal component, is formed as a result of summing the product of the filtered common mode signal with the delayed filtered m common-mode signal and the product of the filtered quadrature signal with the delayed filtered quadrature signal, and the second of the above signal components is formed as the result of the difference of the product of the delayed filtered common mode signal with the filtered quadrature signal and the product of the filtered common mode signal with the delayed filtered quadrature signal.

 The method is implemented by a device, the input of which is connected to the first inputs of two multipliers, the second inputs of which are connected to a common signal source, the second input of the first multiplier connected directly to the common source, and the second input of the second multiplier through a phase shifter containing a half-length memory element signal sending, and two integrators with reset, the outputs of which are directly and through the second and third memory elements for half the duration of the signal sending are connected to other to the respective multipliers, the outputs of the latter through two adders connected in series are connected to the resolver, the other input of the second adder is connected to the output of the first adder through the fourth memory element for half the duration of the signal transmission, the third input of the second adder is connected to the synchronization device connected to the mentioned memory elements by half the duration of the signal and with the clock input of the solver.

 According to the invention, the output of the first multiplier is connected to the input of one of the integrators through a series-connected low-pass filter (LPF), the fifth multiplier and the third adder, the output of the second multiplier is connected to another input of the third adder through the series-connected second LPF and the sixth multiplier, the output of the second LPF is connected to the input of another integrator through the fifth memory element connected in series for half the duration of the signal sending, the seventh multiplier, the other input connected to the output of the first low-pass filter, and the subtractor, subtracting the input through the eighth multiplier associated with the output of the second low-pass filter, the output of the fifth memory element is connected to the second input of the sixth multiplier, between the output of the first low-pass filter and the connected second inputs of the fifth and eighth multipliers, the first memory element is switched on for half the duration of the transmission signal, and the common signal source is a generator whose frequency is equal to the center frequency of the input signal frequency range, and the LPF bandwidth is equal to the half-width of the range and input frequencies.

 Another difference is that between the outputs of the low-pass filter and the common points of connection to their outputs of other devices, the corresponding analog-to-digital converters are included, and the devices following the analog-to-digital converters are made in digital form.

 In FIG. 1 shows a structural diagram of a device in which the proposed method is implemented.

 In FIG. 2 shows a structural diagram of another embodiment of a device in which the proposed method is implemented.

According to the proposed method:
1. The input phase-shifted signal is decomposed into in-phase and quadrature components relative to the center frequency of the input signal range.

 2. Filter each of these components in the low-frequency band equal to the half-width of the frequency range of the input signals.

 3. Both filtered signals are delayed by half the symbol duration.

 4. The first component of the signal is formed as a result of summing the product of the filtered common mode signal with the delayed filtered common mode signal and the product of the filtered quadrature signal with the delayed filtered quadrature signal.

 5. The second signal component is generated as the result of the difference of the product of the delayed filtered common-mode signal with the filtered quadrature signal and the product of the filtered common-mode signal with the delayed filtered quadrature signal.

 6. Synchronously integrate with a reset on a time interval equal to half the symbol duration, each of the two signal components.

 7. Hold both integrated signals for half the duration of the character.

 8. Multiply each of the two integrated signals with the corresponding delayed signal.

 9. Summarize the results of multiplication.

 10. Delay the total signal for half the duration of the character.

 11. Re-summarize the total signal and the delayed total signal.

 12. Make a decision about the value of the transmitted binary symbol by the sign of the result of the second summation.

а в результате выполнения операции в соответствии с п.5 предлагаемого способа содержится первое полезное слагаемое p_1Q(t) из выражения (22)

Для этого сначала тождественно преобразуем (23) и (24) к следующему виду;

введем обозначения:
I_s(t) = m(t)cosΦ₀, (27)
I_s(t-T/2) = m(t-T/2)cos(Φ₀-ω₀T/2), (28)
Q_s(t) = m(t)sinΦ₀, (29)
Q_s(t-T/2) = m(t-T/2)sin(Φ₀-ω₀T/2), (30)
В общем случае в выражении (26) можно вместо Φ₀ прибавить и отнять ΔΦ = Φ₀+Δωt, тогда выражение (27) - (30) преобразуются к виду:
I_s(t) = m(t)cos(Φ₀-Δωt), (31)
I_s(t-T/2) = m(t-T/2)cos(Φ₀+Δωt-ω₀T/2), (32)
Q_s(t) = m(t)sin(Φ₀+Δωt), (33)
Q_s(t-T/2) = m(t-T/2)sin(Φ₀+Δωt-ω₀T/2), (34)
В соответствии с принятыми обозначениями (27)-(30) p_1I(t) и p_1Q(t) можно представить как:
p_1I (t) = I_s(t) I_s(t-T/2)+Q_s(t)Q₅(t-T/2) (35)
p_1Q(t) = I_s(t)Q_s(t-T/2) - I_s(t-T/2) Q₃ (36)
Из выражений (35) и (36) следует, что если разложить сигнал (t) на квадратурные составляющие, отфильтровать их, затем задержать каждую из них на T/2 и выполнить над ними операции перемножения и сложения-вычитания в соответствии с выражениями (35) и (36) то можно получить полезные компоненты для инвариантной к частоте демодуляции.We show that as a result of operations in accordance with paragraph 4 of the proposed method contains the first (useful) term p _1I (t) from expression (20):

and as a result of the operation in accordance with paragraph 5 of the proposed method contains the first useful term p _1Q (t) from the expression (22)

To do this, we first transform (23) and (24) identically to the following form;

we introduce the notation
I _s (t) = m (t) cosΦ ₀ , (27)
I _s (tT / 2) = m (tT / 2) cos (Φ ₀ -ω ₀ T / 2), (28)
Q _s (t) = m (t) sinΦ ₀ , (29)
Q _s (tT / 2) = m (tT / 2) sin (Φ ₀ -ω ₀ T / 2), (30)
In the general case, in expression (26), instead of Φ _0, you can add and subtract ΔΦ = Φ ₀ + Δωt, then expression (27) - (30) is transformed to:
I _s (t) = m (t) cos (Φ ₀ -Δωt), (31)
I _s (tT / 2) = m (tT / 2) cos (Φ ₀ + Δωt-ω ₀ T / 2), (32)
Q _s (t) = m (t) sin (Φ ₀ + Δωt), (33)
Q _s (tT / 2) = m (tT / 2) sin (Φ ₀ + Δωt-ω ₀ T / 2), (34)
In accordance with the accepted notation (27) - (30), p _1I (t) and p _1Q (t) can be represented as:
p _1I (t) = I _s (t) I _s (tT / 2) + Q _s (t) Q ₅ (tT / 2) (35)
p _1Q (t) = I _s (t) Q _s (tT / 2) - I _s (tT / 2) Q ₃ (36)
From the expressions (35) and (36) it follows that if the signal (t) is decomposed into quadrature components, filter them, then hold each of them on T / 2 and perform multiplication and addition-subtraction operations on them in accordance with expressions (35 ) and (36) it is possible to obtain useful components for frequency-invariant demodulation.

We show that as a result of the proposed method, the new components p _1I (t) and p _1Q (t) contain less noise components.

Без потери общности полосовой сигнал n(t) аналогично, можно представить как сумму:
n(t) = n(t)cosΦ = n_0c(t)cosω_ct-n_0s(t)sinω_ct, (37)
где ω_с - центральная частота диапазона частот,

После квадратурного разложения сигнала относительно центральной частоты ω_с и фильтрации низкочастотных составляющих в полосе, равной полуширине входного диапазона частот, получим I_r(t) и квадратурную Q_r(t) компоненты принятого сигнала соответственно, поскольку частота ω_o в обозначениях (27)-(34) может быть произвольной

где

- отфильтрованные квадратурные составляющие входного полосового шума, средняя мощность которых в соответствии с двухкратным обужением полосы в соответствии с принятым выше допущением в два раза меньше мощности компонент n_0C(t) и n_0S(t).Imagine the input signal r (t), designated on the basis of the proposed notation in the following form:

Without loss of generality, a strip signal n (t) similarly, can be represented as the sum:
n (t) = n (t ) cosΦ = n 0c (t) cosω c tn 0s (t) sinω c t, ( 37)
where ω _s is the center frequency of the frequency range,

After quadrature decomposition of the signal relative to the center frequency ω _s and filtering of low-frequency components in a band equal to the half-width of the input frequency range, we obtain I _r (t) and quadrature Q _r (t) components of the received signal, respectively, since the frequency ω _o in the notation (27) (34) can be arbitrary

Where

- filtered quadrature components of the input strip noise, the average power of which, in accordance with the twofold band narrowing, in accordance with the assumption adopted above, is half the power of the components n _0C (t) and n _0S (t).

Как видно из выражений (22) и (42), в выражении для p_I(t) отсутствуют высокочастотные шумовые составляющие, а как указано выше мощность каждой из исходных щумовых составляющих как минимум в два раза меньше, чем в способе-прототипе, за счет чего повышается помехоустойчивость демодуляции.As a result of operations on the signal in the proposed method described above in paragraph 4 and paragraph 5, respectively, form the components p _I (t) and p _Q (t):

As can be seen from expressions (22) and (42), in the expression for p _I (t) there are no high-frequency noise components, and as indicated above, the power of each of the initial noise components is at least two times less than in the prototype method, due to which increases the noise immunity of demodulation.

A similar result can be shown for p _Q (t).

 A device that implements the proposed method of demodulation (see Fig. 1) contains multipliers 1, 2 whose first inputs are connected to the input of the device. The second inputs of the multipliers 1, 2 are connected to a common signal source 3, while the second input of the first multiplier 1 is connected directly to the common source of signal 3, and the second input of the second multiplier 2 is connected through a phase shifter 4. The device also contains a memory element for half the duration of sending signal 5 , as well as two integrators with a reset of 6, 7. The outputs of the integrators 6, 7 directly and through the second 8 and third 9 memory elements for half the duration of the signal sent are connected to the multipliers 10, 11. The outputs of the multipliers 10, 11 through subsequently connected the first and second adders 12, 13 are connected to the resolver 14. Another input of the adder 13 is connected to the output of the adder 12 through the fourth memory element for half the duration of the signal 15. The third input of the second adder 13 is connected to the synchronization device 16, also connected with the above-mentioned memory elements for half the duration of the signal 8, 9, 15 and with the clock input of the decider 14. The output of the multiplier 1 is also connected to the input of the integrator 6 through a series-connected filter bottom their frequencies 17, the fifth multiplier 18 and the third adder 19. The output of the multiplier 2 is connected to another input of the third adder 19 through the second low-pass filter 20 and the sixth multiplier 21. The output of the second low-pass filter 20 is connected to the input of the integrator 7 through half the fifth memory element in series the duration of sending the signal 22, the seventh multiplier 23, another input connected to the output of the first low-pass filter 17, and a subtractor 24, subtracting the input through the eighth multiplier 25 connected to the output of the second low-pass filter 20. Output five memory element 22 is also connected to the second input of the sixth multiplier 21, between the output of the first low-pass filter 17 and the second inputs of the fifth 18 and eighth 25 multipliers connected, the first memory element is included for half the duration of sending signal 5. A common signal source is a generator 26, the frequency of which is equal to the center frequency input signal frequency range. The bandwidth of both low-pass filters 17, 20 is equal to the half-width of the input frequency range.

 In another embodiment of the device (see Fig. 2), the corresponding analog-to-digital converters are connected between the outputs of the low-pass filter 17, 20 and the common points of connection to their outputs of other devices, and the devices following the analog-to-digital converters are made in digital form.

 The proposed device operates as follows.

 The input phase-manipulated signal from the input of the device is supplied to the first inputs of the multipliers 1, 2. In the products of multiplying the input signal with a signal from the generator 26, the frequency of which is equal to the center frequency of the input frequency range of the signal, the output of the multiplier 1 contains the in-phase component of the input phase-manipulated signal. In the products of the multiplication of the input signal with the signal of the generator 26, phase-shifted 90 ° phase shifter 4, the output of the multiplier 2 contains the quadrature component of the input phase-shifted signal. Each of these components in the low-frequency band equal to the half-width of the frequency range of the input signals is filtered in the low-pass filter 17 and 20, respectively. Then, the first signal component is formed in the device as a result of summing in the third adder 19 of the product in the filtered common mode signal multiplier 18 with the filtered in-phase signal delayed in the memory element 5 and the filtered quadrature signal in the multiplier 21 with the filtered quadrature signal delayed in the memory element 22. The second signal component is also formed in the device as a result of the difference in the subtractor 24 of the product in the filtered in-phase signal multiplier 23 with the filtered quadrature signal delayed in the memory element 22 and the filtered quadrature signal in the multiplier 25 with the filtered in-phase signal delayed in memory element 5. In integrators with reset 6, 7 synchronously, under the control of synchronization device 16, both formed signal components are integrated with reset, on a time interval equal to half the symbol duration. Both integrated signals are delayed by half the symbol duration in the second 8 and third 9 memory elements, respectively. Each of the two integrated signals is multiplied with the corresponding delayed signal in the multipliers 10, 11, respectively. The multiplication results in multipliers 10, 11 are summed in the first adder 12. The total signal is delayed by half the symbol duration in the fourth memory element 15. The total signal from the output of the first adder 12 and the delayed total signal from the output of the fourth memory element 15 are re-summed in the second adder 13. By the sign of the result of the second summation in the decider 14 under the control of the synchronization device 16, a decision is made on the value of the transmitted binary symbol.

 In another embodiment of the device, between the outputs of the low-pass filter 17, 20 and the common points of connection to their outputs of other devices, the corresponding analog-to-digital converters 26 and 27 are included, in which the filtered in-phase and quadrature components of the input phase-manipulated signal are respectively converted to digital form, and the subsequent processing of the resulting digital signals is carried out also, as described above, the same as in the first embodiment, devices, but made in digital form.

 At the time of filing the application for an invention, the GKB Svyaz carried out a mathematical simulation of the proposed method of demodulation in the MATLAB environment, which confirmed an increase in noise immunity compared to the known one.

Sources of information
1. 3-ride A.M., Okunev Yu.B., Rakhovich L.M. Phase difference modulation and its application for transmitting discrete information. M .: Communication, 1967, - 304 p.

 2. Okunev Yu.B. Theory of phase difference modulation. M .: Communication, 1979, - 216 pp. (Prototype method).

 3. Okunev Yu.B. Digital transmission of information by phase-modulated signals. M .: Radio and communications, 1991, - 296 p.

 4. A. p. N 177471, Rakhovich L.M. A method for detecting phase-shift keyed signals transmitted by the method of double relative phase manipulation. M.: TsNIIIPI, 1966, - 2s.

 5. A. p. N 543194, Barbanel E.S., Goncharov V.N., Schelkunov K.N. Communication system with phase difference modulation of the first order. M .: TsNIIIPI, 1977, - 3 p. (Prototype device).

 6. Harcke, L., and G. Wood, Laboratory and Flight Performance of the Mars Pathfinder (15.1 / 6) Convolutionally Encoded Telemetry Link. TDA PR 42-129, January-March 1997, pp. 1-11, May 15, 1997.

 7. Rebold, T.A., M. Tinto, S.W. Asmar, and E.R. Kursinski, Neptune Revisited: Synthesizing Coherent Doppler From Voyager's Noncoherent Downlink, TDA PR 42-131, July - September 1997, pp. 1-19, November 15, 1997.

 8. Winters Jack H. Differential detection with intersymbol interference and frequency uncertainty // IEEE Trans. Commun. - 1984, N 1, p.25-33.

 9. Feher K. Digital communications: Satellite / Earth stations Engineering N-Y., Prentice-Hall, 1983.6

Claims (3)

 1. A method of demodulating signals with relative phase shift keying, including synchronous integration with resetting at a time interval equal to half the symbol duration of each of the two signal components, delaying both integrated signals by half the symbol duration, multiplying each of the two integrated signals with the corresponding delayed signal, summing multiplication results, the delay of the total signal by half the duration of the symbol, the subsequent summation of the total signal and delayed total signal and deciding on the value of the transmitted binary symbol by the sign of the result of the second summation, characterized in that the input phase-manipulated signal is decomposed into in-phase and quadrature components relative to the center frequency of the input signal range, in-phase and quadrature components are filtered in the low-frequency band equal to the half-width of the range frequencies of the input signals, both filtered signals are delayed by half the symbol duration, while the first of the The signal component is formed as a result of summing the product of the filtered common mode signal with the delayed filtered common mode signal and the product of the filtered quadrature signal with the delayed filtered quadrature signal, and the second of the above signal components is formed as the result of the difference of the product of the delayed filtered common mode signal with the filtered quadrature signal and the product of the filtered quadrature signal common mode delayed filtered to handed signal.  2. The method of demodulating signals with relative phase shift keying according to claim 1, characterized in that the filtered in-phase and quadrature components of the input phase-shifted signal are converted into digital form and further processed in digital form.  3. A signal demodulation device with relative phase shift keying, the input of which is connected to the first inputs of the first and second multipliers, the second inputs of which are connected to a common signal source, while the second input of the first multiplier is connected to the common signal source, and the second input of the second multiplier is connected phase shifter, as well as containing the first memory element for half the duration of the signal sending and two integrators with reset, the outputs of which are directly and through the second and third memory elements half the duration of the signal sending is connected to other corresponding multipliers, the outputs of which are connected through a series of connected first and second adders to the resolver, the other input of the second adder is connected to the output of the first adder through the fourth memory element for half the duration of the signal sending, the third input of the second adder is connected with a synchronization device connected to the aforementioned memory elements for half the duration of the signal, with the clock input of the deciding device VA and managing integrators with a reset, characterized in that the output of the first multiplier is connected to the input of one of the integrators with a reset through a series-connected low-pass filter (LPF), a fifth multiplier and a third adder, the output of the second multiplier is connected to another input of the third adder through series-connected the second low-pass filter and the sixth multiplier, the output of the second low-pass filter is connected to the input of another integrator with a reset through the fifth memory element connected in series for half the duration signal reference, a seventh multiplier connected to the output of the first low-pass filter by another input and a subtractor, the output of the second low-pass filter through the eighth multiplier connected to the subtracting input of the subtractor, the output of the fifth memory element half the signal sending time is connected to the second input of the sixth multiplier, between the output the first low-pass filter and the second inputs of the fifth and eighth multipliers connected, the first memory element is turned on for half the duration of the signal transmission, and the common signal source is the Op whose frequency equals the center frequency of the input signal frequency band, the band width of the LPF is equal to the half-width of the input frequency band.

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