RU2004946C1 - Hierarchic communication network - Google Patents

Abstract

Use1 in integrated networks for the transmission of information. SUMMARY OF THE INVENTION A hierarchical network comprises local networks of upper, middle, and lower levels transition nodes, subscriber units, input and output network interfaces, translation control nodes that contain a shift register, an element NOT, an address allocator, a received address register, a comparator, a register transition node addresses, address setter By analyzing only a part of the address frame to determine belonging to the level of the local network, the total transit time of information through the network is reduced

Description

The invention relates to integrated networks for transmitting information

Combined communication networks are known, containing two local area networks connected by a transition device (BRIDGE). A disadvantage of such a network is that a large network requires a large amount of address memory (network and subscriber addresses) in the transition devices.

Communication networks are also known that include local area networks with subscriber units connected to them and interconnected by transition nodes that contain first and second receiving network interfaces, first and second transmitting network interfaces, and first and second translation control units. (UK Patent Ms 2171880). However, in this network, when moving from one local network to another, it is necessary to fully analyze the information address, comparing it with the address table, which requires a large memory in the broadcast control nodes and increases the transmission time.

The purpose of the invention: reducing transmission time in a hierarchical communication network.

Fig. 1 is a structural electrical diagram of a hierarchical communication network; Fig. 2 is a structural electrical diagram of a translation control unit; in Fig. 3, the address field of the transmitted information (destination address).

The hierarchical communication network contains local networks of the upper level 1, middle level 2-2p, lower level 3-Zp, transition nodes 4, subscriber units 5, receiving network interfaces 6, transmitting network interfaces 7, broadcast control nodes 8, broadcast control nodes This includes shift register 9, address allocator 10, received address register 11, comparator 12, address register of transition node 13, element NOT 14, address pickup 15.

A hierarchical communication network operates as follows.

The address field (Fig. 3) is divided into parts, the number of which corresponds to the number of levels in the hierarchical network (in Fig. 1 and Fig. 3 - 3 levels). The significant part of the address of the subscriber units 5 of the upper level 1 is recorded in part A. To establish a connection, for example, the lower level 3 with the upper level 1, the address of the desired level in part A and B of the address field is formed.

When passing through the transition node connecting the lower level 3 and middle level 2 networks, only parts A and B are analyzed for address mismatch

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(A and B). If there is one, it is concluded that they belong to another local network, the information is transmitted to a higher level.

As the transition node 4 passes between the middle level 2 and the upper level 1, only part A of the address field is analyzed. If the addresses do not match, the information is transmitted to the upper level 1 network. When transmitting information from the upper level 11 local network to the lower level 3 local network, the address is also generated in parts B and C of the address field and the analysis is performed in the same way.

In subscriber units 5 of all levels, the address field is fully analyzed to extract information addressed to it.

In the case of transmitting information from the lower level network of one branch to the lower level of the other branch, both of the above processes are used.

The broadcast control node 8 operates as follows,

The incoming information is completely sent to shift register 9, and the address field highlighted by address allocator 10 goes to the register of received address 11, but not completely, but only the part that is set by address setter 15. Next, this part of the address is compared in comparator 12 with the addresses recorded in the address register of the transition node 13. If these address parts do not match, then the comparator 12 by mismatch allows the passage of all information to the next level through the element NOT 14. If the address 12 matches on the comparator, p shenie the ownership information of the local network level.

The address of the jump block is pre-recorded in the address register of the jump node 13.

When information flows from the upper level of local networks to the lower levels, the broadcast control node 8 works in the same way, except that when the addresses on the comparator 12 coincide, all information is transmitted to the lower levels of local networks.

The broadcast control node 8 starts to work when the information frame is received, and when the frame ends, it returns to its initial state (is reset).

The addresser 15 determines the address fields to be compared on the comparator 12.

At the same time, local networks of any level can have broadcast (tree.

bus, star) or ring topology. In the latter case, the receiving and transmitting network interfaces must be additionally connected to each other via the element NOT controlled by the inverse (with respect to that used in the translation control unit 8) output of the comparator 12.

Claims (1)

The claims HIERARCHIC COMMUNICATION NETWORK, containing local networks of various levels with subscriber units connected to them and interconnected via transition nodes containing receiving network interfaces, the inputs of which are inputs - outputs of the transition node and connected to the corresponding local networks of different levels, and the outputs - through the appropriate translation control units are connected to the inputs of the transmitting network interfaces, the outputs of which are connected to the corresponding inputs - the outputs of the transition node, different only the address field is used, the transit time of the Information is reduced. No table creation is required for address comparison or hard routing. (56) UK Patent 2,171,880. H04M 11/16, 1990 10 This means that the translation control node contains sequentially connected szig register and the element NOT, while the input of the shift register is connected to the input of the address allocator, the output of which is connected through the received address register to the first input of the comparator, the output of which is connected to the second input of the element NOT, and the second input of the comparator is connected to the output of the address register of the transition node, the input of which is connected to the output of the addresser and the control input of the register of the received address, the input of the shift register and the output of the element NOT L are, respectively the input and output control unit translational tion. G8 I FIG. 2 A AT Address pope i