RU175803U1 - WATCH SYNCHRONIZATION DEVICE - Google Patents

Abstract

The utility model relates to time synchronization tools and can be used in devices that synchronize geographically spaced secondary clocks relative to primary clocks. The device comprises a primary clock, a central processor, a router, a feedback message storage and transmission unit, as well as a shaper of messages transmitted to the secondary clock containing N output forming elements, a shaper of messages received from the secondary clock containing N input forming elements, and an optical network port containing N transceiver optoelectronic elements, where N> 1. The primary clock and the central processor are connected by an information exchange bus. The signal output of the primary clock is connected to the signal inputs of the output forming elements of the shaper of messages transmitted to the secondary clock, the outputs of which are connected to the transmitting inputs of the corresponding transceiver optoelectronic elements of the optical network port, and the information inputs are connected to the corresponding outputs of the router, the input of which is connected to the information output of the central processor. The receiving outputs of the optoelectronic elements of the optical network port are connected to the signal inputs of the corresponding input forming elements of the shaper of messages received from the secondary clock, the inputs of the temporary fixation of which are connected to the output of the time signals of the central processor, and the outputs are connected to the corresponding inputs of the feedback message storage and transmission unit, the output of which connected to the input of the feedback signals of the Central processor. The technical result consists in creating a device that allows to solve the problem of ensuring the possibility of high-precision synchronization of several secondary clocks relative to the primary clock in the conditions of using fiber optic lines for communication with remote objects. 1 ill.

Description

The utility model relates to time synchronization tools and can be used in devices that synchronize geographically spaced secondary clocks relative to primary clocks.

Known devices for clock synchronization, containing the primary clock, forming a time scale, the time stamps of which are transmitted to the remote secondary clock over the air, see, for example, copyright certificates and patent: [1] - SU 591800 (A), G04C 13/02, publ. 02/05/1978; [2] - SU 1160361 (A), G04C 13/02, publ. 06/07/1985; [3] - RU 105752 (U1), G04C 13/00, publ. 06/20/2011. The primary clock contains a highly stable reference generator, for example, a rubidium or cesium frequency standard, a frequency divider, and a time scaler. Secondary clocks are synchronized by adjusting the secondary clock timeline relative to the time stamps of the primary clock timeline received over the air. At the same time, for determining the propagation delay of signals over the radio channel with a view to its subsequent compensation, for example, transported atomic clocks are used, which are sequentially installed on the primary and secondary clocks.

The disadvantage of synchronization carried out using the devices [1] - [3] is the low accuracy of synchronization associated with the unstable nature of the radio channel used to transmit synchronizing signals to the secondary clock - timeline marks of the primary clock.

A more stable channel for the transmission of synchronizing signals to the secondary clock is an optical fiber line.

An example of a device for clock synchronization, using a fiber optic line for transmitting clock signals to a secondary clock, is the device presented in patent [4] - RU 166018 (U1), G04C 13/02, publ. November 10, 2016, which is taken as a prototype.

A device for clock synchronization, adopted as a prototype, contains a central processor, a primary clock, a shaper of messages transmitted to the secondary clock, a shaper of messages received from the secondary clock, and an optical network port. The primary clock and the central processor are connected by an information exchange bus. In addition, the signal output of the primary clock, which is the output of the time stamps of the generated time scale and their codes corresponding to the transmission time, is connected to the first (signal) input of the central processor and the first (signal) input of the shaper of messages transmitted to the secondary clock. The second (informational) input of the shaper of messages transmitted to the secondary clock is connected to the output of the central processor, and the output to the input of the optical network port. The output of the optical network port is connected to the input of the shaper of messages received from the secondary clock, the output of which is connected to the second input (feedback input) of the central processor.

The primary clock is an electronic device containing a reference generator made, for example, on the basis of the rubidium frequency standard, a time scaler associated with it, made on the basis of frequency dividers, and a control unit associated with the time scaler, which, if necessary, corrects the generated time scales for commands received from the central processor via the data exchange channel. The output of the shaper of the time scale forms the output of the primary clock, from which the signals of the time stamps of the generated time scale and their codes corresponding to the transmission time are taken.

An optical network port enables the device to be connected to a fiber optic line through which signals from the secondary clock are transmitted and received. The optical network port can be made in the form of a combination of transmitting and receiving optocoupler pairs, providing the transmission / reception of signals through an optical fiber line.

The shaper of messages transmitted to the secondary clock and the shaper of messages received from the secondary clock can be performed on the basis of appropriate controllers that convert the transmitted signals and messages into the signal format of the optical network port and convert the signals and messages received from the optical network port to the message format received by the central processor .

A device for clock synchronization, adopted as a prototype, works as follows.

The primary clock forms the time scale of the primary clock. The timeline marks of the primary clock and their codes corresponding to the transmission time, from the output of the primary clock go to the first input of the central processor and the first input of the shaper of messages transmitted to the secondary clock.

The second input of the central processor from the output of the shaper received from the secondary clock messages receives data from the secondary clock.

The central processor carries out the procedure for determining the discrepancy between the time scale of the primary clock and the time scale of synchronized secondary clocks, as well as the amount of time delay that occurs when signals travel along the fiber optic line.

Data characterizing the shift of the time scale of the secondary clock relative to the primary clock, as well as data characterizing the amount of delay introduced by the fiber optic channel, from the output of the central processor are fed to the second input of the shaper of messages transmitted to the secondary clock.

The shaper of messages transmitted to the secondary clock on the basis of the received input data and signals generates output signals that are transmitted through the optical network port to the fiber optic line for transmission to synchronized secondary clocks.

On the secondary clock side, these signals are used to synchronize the secondary clock time scale relative to the primary clock time scale, as well as to generate feedback signals that carry data on the time of receipt of the primary clock time stamp in the secondary clock time scale and data on the time of its reverse radiation in secondary timeline.

Feedback signals are fed to the optical network port and then to the input of the shaper of messages received from the secondary clock, from the output of which the converted signals are sent to the second input of the central processor, where the time of receipt of the time stamp of the secondary clock is recorded in the time scale of the primary clock, the delay value is determined fiber line, and the magnitude of the discrepancy between the time scales of the primary and secondary hours.

The data on the discrepancy between the time scales of the primary and secondary hours are transmitted to the secondary clock in the subsequent cycle of transmitting the time stamp of the primary clock to the secondary clock. These data are used on the side of the secondary clock to correct the generated time scale of the secondary clock.

Thus, the prototype device allows you to solve the problem of high-precision synchronization of remote secondary clocks relative to primary without the use of a radio channel and transported atomic clocks.

At the same time, however, the prototype device solves the indicated problem only with respect to one remote object (one secondary clock), it does not provide technical means allowing synchronization of several secondary clocks relative to the primary clock.

The technical result, which is claimed by the claimed utility model, is to create a device for clock synchronization, which allows to solve the problem of ensuring the possibility of high-precision synchronization of several secondary clocks relative to the primary clock in the same conditions as the prototype, using fiber optic lines for communication with remote secondary clocks.

The essence of the claimed utility model is as follows. The clock synchronization device comprises a primary clock connected to the information exchange bus and a central processor, a shaper of messages transmitted to the secondary clock connected to the primary clock, and an optical network port connected to the shaper of messages transmitted to the secondary clock and the shaper of messages received from the secondary clock. In contrast to the prototype, the shaper of messages transmitted to the secondary clock, the shaper of messages received from the secondary clock, and the optical network port contain, respectively, N output forming elements, N input forming elements and N transceiver optoelectronic elements, where N> 1, and the signal inputs of the output the forming elements of the shaper transmitted to the secondary clock messages are connected to the signal output of the primary clock, the information inputs of the output forming elements of the shaper per messages sent to the secondary clock are connected to the corresponding outputs of the router, the input of which is connected to the information output of the central processor, and the outputs of the output forming elements of the shaper of messages transmitted to the secondary clock are connected to the transmitting inputs of the corresponding transceiver optoelectronic elements of the optical network port, while the receiving outputs of the optoelectronic elements of the optical the network port is connected to the signal inputs of the input forming elements of the the receiver of messages received from the secondary clock, the inputs of the temporary fixation of which are connected to the output of the time signals of the central processor, and the outputs are connected to the corresponding inputs of the storage and transmission unit of feedback messages, the output of which is connected to the input of the feedback signals of the central processor.

The essence of the utility model and its feasibility are illustrated by the block diagram of the device for clock synchronization.

The inventive device for clock synchronization in this example contains a primary clock 1, a central processor 2, a shaper 3 messages transmitted to the secondary clock, containing N output forming elements 4 (4 ₁ , 4 ₂ ... 4 _N ), the shaper 5 received from the secondary clock messages containing N input forming elements 6 (6 ₁ , 6 ₂ ... 6 _N ), and an optical network port 7 containing N transceiver optoelectronic elements 8 (8 ₁ , 8 ₂ ... 8 _N ), where N> 1. The device also includes a router 9 and a block 10 for storing and transmitting feedback messages.

The primary clock 1 and the central processor 2 are connected by an information exchange bus.

The signal inputs of the output forming elements 4 included in the shaper 3 of messages transmitted to the secondary clock are connected to the signal output of the primary clock 1, from which characteristic time stamps of the generated time scale (for example, second) and their codes corresponding to the transmission time are removed.

The information inputs of the output forming elements 4 are connected to the corresponding outputs of the router 9, the input of which is connected to the information output of the central processor 2.

The outputs of the output forming elements 4 are connected to the transmitting inputs (inputs of electrical signals) of the corresponding transceiver optoelectronic elements 8 included in the optical network port 7. The receiving outputs (outputs of the electrical signals) of the optoelectronic elements 8 are connected to the signal inputs of the corresponding input forming elements 6 included in shaper composition 5 messages received from the secondary clock. Optical outputs-inputs of the optoelectronic elements 8 form the outputs-inputs of the inventive device, designed to connect fiber optic lines leading to synchronized objects - a secondary clock (not shown in the structural diagram).

Thus, each i-th optoelectronic element 8 from the composition of the optical network port 7 is connected by its electric input to the output of the i-th output forming element 4 _i from the shaper 3 of messages transmitted to the secondary clock, and by its electric output to the input of the i-th input forming element 6 _i from the shaper 5 received from the secondary clock messages.

In the shaper 5 of the messages received from the secondary clock, the inputs of the temporary fixation of the input forming elements 6 are connected to the output of the time signals of the central processor 2, and the outputs of the input forming elements 6 are connected to the corresponding inputs of the feedback message storage and transmission unit 10, the output of which is connected to the input of the feedback signals CPU communication 2.

In this example, the primary clock 1 is an electronic device containing a reference generator made, for example, on the basis of the rubidium frequency standard, and a shaper of the primary clock time scale associated with it, made on the basis of frequency dividers that generate output signals in the form of characteristic time stamps ( not shown in the block diagram). The primary clock 1 is equipped with control means, allowing, if necessary, to correct the generated time scale relative to external synchronizing devices, as well as means for marking time stamps in accordance with the time of their transmission (not shown in the structural diagram). The primary clock 1 is controlled by the central processor 2 using signals transmitted over the information exchange bus. On the same bus, the central processor 2 receives signals from the primary clock 1, used to form a real-time scale, the codes of which are output from the time signals of the central processor 2.

The central processor 2 can be performed on the basis of the PLISS microcircuits with the corresponding software.

Transceiver optoelectronic elements 8, which are part of the optical network port 7, can be made in the form of sets of transmitting and receiving optocoupler pairs that convert the transmitted electrical signals to optical signals and convert the received optical signals to electrical.

The output forming elements 4 included in the shaper 3 of messages transmitted to the secondary clock can be made on the basis of a controller that converts the signals from the primary clock 1 and router 9 into the signal format of the optical network port 7.

The input forming elements 6, which are part of the shaper 5 of messages received from the secondary clock, can be made on the basis of a controller that records the time of arrival of signals from the optical network port 7 and converts them into a format of signals received by the feedback message storage and transmission unit 10.

Router 9 is based on a controller that distributes the signals coming from the information output of the central processor 2, in directions, depending on their affiliation with a specific secondary clock.

Block 10 storage and transmission of feedback messages is performed on the basis of a controller that performs the function of buffer storage of messages received from the input forming elements 6 of the shaper 5, and their transmission to the feedback input of the central processor 2.

Structurally, the inventive device for clock synchronization can be implemented in the form of a rack of electronic equipment, with rigid fastening of the functional blocks on the supporting structural elements and connecting them together with electric cables using the appropriate connectors.

The inventive device for clock synchronization operates as follows.

The primary clock 1 forms the time scale of the primary clock. The timeline marks of the primary clock 1 and their codes corresponding to the transmission time, from the output of the primary clock 1 are sent to the signal input of the shaper 3 of messages transmitted to the secondary clock, namely, to the signal inputs of the output forming elements 4. These codes are also received via the information exchange bus to the central processor 2.

The feedback input of the Central processor 2 from the output of the storage unit 10 and the transmission of feedback messages receives data from the synchronized secondary clock.

In the central processor 2, the discrepancies between the time scale of the primary clock 1 and the time scales of the synchronized secondary clock are determined, as well as the time delays occurring in the respective fiber optic lines connecting the claimed device with the synchronized secondary clock. This data from the information output of the central processor 2 is fed to the input of the router 9, where it is distributed over the channels depending on their belonging to a certain secondary clock.

Data characterizing the offsets of the time scales of the secondary hours relative to the primary hours, as well as the magnitude of the delays in the corresponding fiber optic lines, from the outputs of the router 9 are fed to the information inputs of the output forming elements 4 of the shaper 3 messages transmitted to the secondary clock, the signal inputs of which receive the time scale marks of the primary hours 1 and their codes corresponding to the transmission time.

The output forming elements 4 of the shaper 3 of messages transmitted to the secondary clock on the basis of the received input data and signals form the output signals, which, through the transceiver optoelectronic elements 8, enter the corresponding fiber optic lines for transmission to the synchronized secondary clock.

On the side of the synchronized secondary clock, these signals are used to synchronize the time scales of the secondary clock relative to the time scale of the primary clock (questions of the performance and functioning of the secondary clock are not related to the subject of the claimed utility model and are not considered in the framework of this application). In addition, the secondary clock generates feedback messages that are sent to the optical network port 7 via the corresponding optical fiber lines, namely, to the optical outputs of the optoelectronic elements 8 and then to the signal inputs of the input forming elements 6 of the shaper 5 received messages from the secondary clock, where they are digitized by arrival time, using the signals from the output of the time signals of the central processor 2, the number of the optical fiber line corresponding to the number of the secondary clock, and azuyutsya desired format amenable storage 10 and transmit the feedback messages.

From the outputs of the input forming elements 6 of the shaper 5 the messages received from the secondary clock are received from the secondary clock to the inputs of the feedback message storage and transmission unit 10, the output of which, in the established order, is fed to the input of the feedback signals of the central processor 2 for the subsequent determination of the discrepancy between time scale of the primary clock 1 and time scales of the secondary clock, as well as the time delay on the signal transmission path.

The essence of the process of determining the discrepancy between the time scale of the primary clock 1 and the time scale of the secondary clock, as well as the time delay on the signal transmission path, can be explained by the example of synchronization of the i-th secondary clock.

The time scale label of the primary clock 1 and its code corresponding to the time t _{1 of} its transmission, from the output of the primary clock 1 is fed to the signal input of the shaper 3 messages transmitted to the secondary clock, including the signal input of the i-th output forming element 4 _i . This code also arrives on the data exchange bus to the central processor 2, where the time t ₁ is fixed.

From the output of the i-th output forming element 4 _{i, the} indicated label and its code corresponding to the transmission time t ₁ pass through the i-th transceiver optoelectronic element 8 _{i of the} optical network port 7 and enter the i-th fiber optic line, through which they are transmitted to i -th secondary clock, where the time t _{2i of} receiving this mark is fixed in the time scale of these secondary clocks.

The value of time t _2i represents the sum of the following components:

t _2i = t ₁ + Δt _cmi + Δt _tri ,

where t ₁ is the transmission time stamp in the time scale of the primary clock 1;

Δt _cmi is the discrepancy (offset) between the time scale of the primary clock 1 and the time scale of the i-th secondary clock;

Δt _three - the amount of time delay on the signal propagation path along the i-th fiber optic line.

Next, the recorded value of t _2i , as well as the time stamp of the i-th secondary clock and its code at the time moment of the secondary clock t _3i , where t _3i > t _2i , arrive through the i-th fiber optic line in the opposite direction to the i-th transceiver optoelectronic element 8 _i optical network port 7 and then to the i-th input forming element 6 _{i of the} shaper 5 messages received from the secondary clock.

In the i-th input forming element 6 _i according to the signals coming from the output of the time signals of the central processor 2, the time t _{4i is} received for receiving the time stamp of the i-th secondary clock in the primary clock 1 time scale, which is the sum of the following components:

t _4i = t _3i -Δt _cmi + Δt _tri .

In addition, in the i-th input forming element 6 _i , the received messages are converted into the signal format of the central processor 2 and equipped with their identification marking in accordance with the i-th number of the secondary clock.

From the output of the i-th input forming element 6, signals carrying information about time _instants t _2i , t _3i and t _4i are fed to the corresponding input of the feedback message storage and transmission unit 10, where they are stored in the buffer memory until they are read into the central processor 2.

Based on the received messages on the values of t _2i and t _3i , taking into account the fixed value of t _4i and the previously fixed value of t ₁ in the processor 2, the desired values Δt _cmi and Δt _{tri are calculated} by the formulas:

Δt _cmi = [(t _2i -t ₁ ) - (t _4i -t _3i )] / 2;

Δt _tri = [(t _2i -t ₁ ) + (t _4i -t _3i )] / 2.

Thus obtained data characterizing the shift of the time scale of the i-th secondary clock relative to the primary clock 1 and the delay in the i-th fiber optic line are received from the information output of the central processor 2 to the input of the router 9, which in accordance with the identification mark sends them to i- the second output forming element 4 _{i of the} shaper 3 messages transmitted to the secondary clock.

In the i-th output forming element 4 _i, this data is converted into a service message, which is simultaneously transmitted to the i-th synchronized secondary clock along with the time scale marks of the primary clock 1, ensuring the accuracy of their time synchronization relative to the time scale of the primary clock 1.

The above shows that the claimed utility model is feasible and ensures the achievement of a technical result consisting in the creation of a device for clock synchronization, which allows to solve the problem of ensuring the possibility of high-precision synchronization of several secondary clocks relative to the primary clock in the same conditions as the prototype, using fiber optic lines for communication with remote secondary watch.

Information sources

1. SU 591800 (A), G04C 13/02, publ. 02/05/1978.

2. SU 1160361 (A), G04C 13/02, publ. 06/07/1985.

3 RU 105752 (U1), G04C 13/00, publ. 06/20/2011.

4. RU 166018 (U1), G04C 13/02, publ. 11/10/2016.

Claims (1)

A clock synchronization device comprising a primary clock connected to the information exchange bus and a central processor, a shaper of messages transmitted to the secondary clock connected to the primary clock, and an optical network port associated with the shaper of messages transmitted to the secondary clock and the shaper of messages received from the secondary clock, characterized in that the shaper of messages transmitted to the secondary clock, the shaper of messages received from the secondary clock and the optical network port harvested, respectively, N output forming elements, N input forming elements and N transceiver optoelectronic elements, where N> 1, and the signal inputs of the output forming elements of the shaper messages transmitted to the secondary clock are connected to the signal output of the primary clock, the information inputs of the output forming elements of the shaper transmitted on the secondary clock of the messages are connected to the corresponding outputs of the router, the input of which is connected to the information output of the central processor, and the outputs of the output forming elements of the shaper of messages transmitted to the secondary clock are connected to the transmitting inputs of the corresponding transceiver optoelectronic elements of the optical network port, while the receiving outputs of the optoelectronic elements of the optical network port are connected to the signal inputs of the corresponding input forming elements of the shaper of messages received from the secondary clock, inputs of temporary fixation which are connected to the output of the time signals of the central processor, and the output These are connected to the corresponding inputs of the feedback message storage and transmission unit, the output of which is connected to the input of the feedback signals of the central processor.

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