MXPA99003536A - Apparatus and method for generating on-screen-display messages using one-bit pixels - Google Patents

Abstract

An apparatus and concomitant method for generating an OSD message by constructing an OSD bitstream having a plurality of"one-bit"pixels. The OSD bitstream contains an OSD header and OSD data. An OSD unit retrieves pixel control information from the OSD header which is programmed by a processor of a decoding/displaying system. The OSD header contains information that is used to program a color palette of the OSD unit and to provide instructions as to the treatment of the OSD data. If the"Compressed Pixel Mode"is enabled in the OSD header, then the OSD unit will treat each bit of the OSD data as a"one-bit"pixel.

Description

DEVICE AND METHOD FOR GENERATING SCREEN DEPLOYMENT MESSAGES USING A BIT P1XELES Field of the Invention The present invention relates to a method and apparatus for generating Display Display (OSD) messages. More particularly, this invention relates to a method and apparatus that reduces the bandwidth requirements of the memory of a decoding / deployment system using one-bit pixels to access a palette that is predefined for a region of display on screen. BACKGROUND OF THE INVENTION Screen display messages play an important role in consumer electronic products by providing users with interactive information such as menus to guide them through the use and configuration of the product. Other important functions of screen display include the ability to provide subtitling and the display of channel logos. However, the improved standard of digital video technology presents a major problem for generating and displaying display messages on the screen. For example, there are specific requirements for High Definition Television (H DTV) that a high definition television must display up to 216 characters in four (4) "windows" compared to the current requirements of the National Television Systems Committee (NTSC) of a maximum of 128 characters in a "window". These new requirements represent severe difficulties in the decoding / deployment system for television signals which must decode incoming encoded data streams and present the decoded data to a deployment system with minimal delays. Since on-screen display messages must be displayed (overlaid) with the video data, the decoding / deployment system microprocessor must allocate a portion of the memory bandwidth to perform on-screen display functions, thereby increasing the requirement. of the bandwidth of the memory of a decoding / deployment system and the overloading of general physical equipment.

Thus, it is necessary to have a method and apparatus to generate display messages on the screen without increasing the physical equipment requirements, for example, the bandwidth of the memory, of a decoding / deployment system. Brief Description of the Invention The invention relates to a concomitant apparatus and method for generating screen display messages by constructing a valid screen display bit stream having a plurality of "one bit" pixels. More specifically, in accordance with the invention, a screen display unit retrieves a screen display bit stream from a storage device. The screen display bit stream contains a screen display header and screen display data. The on-screen display header contains control information that is used to program a color palette of the on-screen display unit and to provide instructions on the processing of on-screen display data. The control information is programmed by a processor of a decoding / deployment system. If the "Compressed Pixe Mode" is activated in the on-screen display header, then the on-screen display unit will process each bit of display data in the screen display bitstream as a "one pixel" bit". Namely, each bit of display data on the screen represents one of two possible indexes, where each index identifies one of several possible display palette entries on the screen. For example, if there are 16 possible entries that are accessible by 4-bit addresses, then the "one bit" pixel can access two of the possible inputs using a single bit. These and other aspects of the invention will be described with respect to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS In the drawings: Figure 1 is a block diagram of a decoding / deployment system including a display unit in accordance with an aspect of the invention.; Figure 2 is a block diagram disclosing the structure of a compressed pixel bit stream of sample; and Figure 3 is a flow chart illustrating the method for constructing a valid screen display data stream having a plurality of one bit pixels. Detailed Description of the Drawings Figure 1 illustrates a block diagram of a decoding / display system for television signals 100 (hereinafter the decoding system). The decoding system comprises a processor 130, a random access memory (RAM) 140, a read-only memory (ROM) 142, an on-screen display unit 150, a video decoder 160, and a mixer 170. The output of the mixer 170 is coupled to a deployment device 190 via the path 180. The present invention is described below in accordance with the MPEG standards, International Standards ISO / I EC 1 1 172 (1991) (generally referred to as MPEG-1 format). ) and 13818 (1995) (generally referred to as MPEG-2 format). However, those skilled in the art will understand that the present invention can be applied or adapted to other decoding systems by implementing other encoding / decoding formats. In the preferred embodiment, the decoding system 100 performs real-time audio and video decompression of various data streams (bitstreams) 120. The bitstreams 120 may comprise elementary audio and video streams that are encoded in accordance with MPEG-1 and MPEG-2 standards.

The coded bitstreams 120 are generated by an encoder (not shown) and are transmitted to the decoding system through a communication channel. The encoded bitstreams contain a coded representation of a plurality of images and may include the audio information associated with those images, for example, a stream of multimedia data. The multimedia source can be a high-definition television station, a video disc, a cable television station and the like. In turn, the decoding system 100 decodes the coded data streams to produce a plurality of decoded images for display on the screen 190 in synchronization with the associated audio information. However, for the purpose of this invention, the audio decoding function of the decoding system 100 is not described. More specifically, the processor 1 30 receives bit streams 120 and bitstreams 1 1 0 as inputs. The 1 1 0 bitstreams may comprise several control signals or other data streams that are not included in the bit streams 120. For example, a channel decoder or transport unit (not shown) may be displayed between the channel of transmission and the decoding system 1 00 to perform the analysis and routing of data packets in data streams or control currents. In the preferred mode, the processor 1 performs various control functions, including but not limited to, providing control data to the video decoder 160 and the screen display unit 150, managing access to the memory and controlling the display. of the images displayed. Although the present invention describes a single processor, those skilled in the art will understand that the processor 130 may comprise several dedicated devices for managing specific functions, for example, a memory controller, a microprocessor interface unit, and the like. The processor 130 receives bit streams 120 and writes the data packets in the memory 140 via a video decoder 160. Optionally, the bitstreams can pass through a (FIFO) compensator of First into First-Exit (not shown) before transferring them via memory data bus to memory. Additionally, there is generally another memory (not shown) that is used only by the processor 130. The memory 140 is used to store a plurality of data including compressed data, decoded images and the display bitmap. As such, the memory is generally mapped into several compensators, for example a bit compensator for storing compressed data, a screen display compensator for storing the display bitmap on the screen, several frame compensators for storing frames of images and a display compensator to store decoded images.

In accordance with the M PEG standards, the video decoder 160 decodes the compressed data in the memory 140 to reconstruct the images encoded in the memory. In some cases, the decoded image is a difference signal that is added to a stored reference image to produce the actual image eg to facilitate the decoding of a motion compensated image. Once an image is reconstructed, it is stored in the deployment compensator pending deployment via the mixer 1 70. Similarly, the display unit 150 uses the memory 140 to store the display bitmap on the screen or the display deployment specification. The on-screen display unit allows a user (manufacturer to define a bitmap for each field that can be overlaid on the decoded image.) The on-screen display bitmap can contain information about the configuration and options of a particular product electron consumer ico.Alternatively, the on-screen display bitmap may contain information regarding subtitling and channel logos that are transmitted from a cable television, a video disc and the like. An on-screen display bitmap is defined as a set of regions (generally rectangular in shape) of programmable size and position, each of which has a unique palette of available colors. The on-screen display bitmap is written to the screen display compensator of the memory 140 which is determined by the user for this purpose. However, those skilled in the art will understand that a read-only memory 142 or other equivalent storage devices can also serve this function. When the on-screen display function is activated for a particular picture or frame, the processor 130 manipulates the data in the memory 140 to construct a screen display bitstream. The screen display bitstream contains an on-screen display header and on-screen display data (pixel data). More specifically, the processor 130 programs (formats and stores) the on-screen display header in the memory 140. The on-screen display header contains information on the locations of the top and bottom of the field bit maps. On-screen display, palette data, pointing to the next header block and various display modes that include resolution, color and screen display compression. Once the on-screen display header is programmed, the processor 130 may manipulate the on-screen display data in the memory 140 according to a particular implementation. For example, screen display data is formatted according to a selected mode, for example, Compressed Pixel Mode, as described below. Alternatively, the processor can simply program the on-screen display header with pointers to the screen display data in the memory, where the stored screen display data is retrieved without modification to form the screen display bitstream. Then, the processor 130 reports the active state, that is, active screen display, to the screen display unit 150, which responds by requesting the processor 130 to access the on-screen display bitstream stored in the memory 140. The on-screen display bit stream is formed and retrieved as the display unit reads the on-screen display headers, each followed by its associated display screen data. After receiving the screen display bits stream, the screen display unit processes the screen display pixel data in accordance with the instructions or modes selected in the screen display header. Then, the display unit expects a pair of display counters (not shown) to achieve counting values that identify the correct position on the screen to insert the display information on the screen. In the correct position, the display unit sends its output to the mixer 170. The output of the display unit 150 is a stream or sequence of digital words representing respective luminance and chrominance components. New memory accesses are requested as required to maintain the necessary data flow (screen display bitstream) through the display unit to produce a large screen display image. When the last byte of the screen display pixel data for the current screen display region is read from memory, the next screen display header is read and the process is repeated and includes the last display region on the screen for the current box. Those skilled in the art will understand that the order of constructing and retrieving the screen display bitstream can be modified as described above. For example, the on-screen display header can be read from the memory when the processor is formatting the on-screen display data, or the on-screen display data can be processed and displayed as on-screen display messages by the on-screen display unit without having to recover all the current of display bits on the screen. Since the screen display pixel data is superimposed on the decoded image, the mixer 170 serves to selectively mix or multiplex the decoded image with the display pixel data. Namely, the mixer 170 has the ability to display at each pixel location, a screen display pixel, a pixel of the decoded image or a (mixed) combination of both types of pixels. This capability allows the display of Subtitling (only pixel data to be displayed on the screen) or the display of transparent channel logos (a combination of both on-screen display pixels and decoded image pixels) in a decoded image. The video decoder 160 and a screen display unit 150 form streams or sequences of digital words that represent respective luminance and chrominance components. These sequences of digital words representative of video components are coupled via a mixer 170 to a digital-to-analog converter (DAC) 185. The digital words representing luminance and chrominance are converted to analog luminance and chrominance signals by the respective sections of the digital to analog converter. The screen display unit 150 can be used to display a bitmap defined anywhere on the drop-down screen, regardless of the size and location of the active video area. This bitmap can be defined independently for each field and specified as a collection of on-screen display regions. A region is commonly a rectangular area specified by its boundary and by a bitmap that defines its content. Each region has associated a palette that defines a plurality of colors (for example, 4 or 16 colors) that can be used in that region. If required, one of these colors may be transparent, allowing the background to be seen through as described above. However, the handling of screen display functions for a frame increases the computational hardware load of the processor 130, and more importantly, imposes severe difficulties on the bandwidth of the processor memory because the processor 130 must service the memory requests of the video decoder 160 and the display unit 150. As such, the present invention reduces the size of the screen display bitstream when implementing the Compressed Pixel Mode. Figure 2 illustrates the structure of a "compressed pixel" display screen bit stream of sample 200. The screen display bit stream comprises a plurality of display display headers 210, each followed by data from screen display 220. In one embodiment, the header consists of five 64-bit words, followed by any number of 64-bit display data words (bitmap). The screen display header 210 contains information regarding the display region coordinates on screen 214, the various inputs of the palette 216 for a particular display region, and various function codes (bits). Those skilled in the art will understand that the screen display header may be of any length. A longer header can provide more information and options, for example, a palette with more entries, but with the disadvantage of incurring greater computation expense, that is, more reading and writing cycles. In fact, the content of the on-screen display header is illustrative of a particular embodiment and is not limited to the specific configuration illustrated in Figure 2. The on-screen display region coordinates 214 contain the positions of the left and right edge of the display. a region of screen display, that is, the row start and end positions and the column start and end positions. For interlaced display, the region coordinates include the positions (pointers) of the lower and upper field pixel bit maps for the corresponding display region. Finally, the on-screen display region coordinates 214 include a pointer to the next header block in the memory. The palette 216 contains a plurality of entries where each entry contains a representation of chrominance and luminance levels for a screen display pixel. The palette information 216 is used to program the display palette on the screen. Since each on-screen display header contains palette information 216, the available colors can be selectively changed for each on-screen display header and its associated on-screen display data bytes. In the preferred embodiment, each palette entry contains 16 bits of data, ie, six (6) luminance bits, Y, four (4) bits of blue chrominance, Cb and four (4) bits of red chrominance, Cr In one mode, there are 16 entries in the palette that require 4 bits to address each input Function codes (bits) 212 contain information regarding various modes, including but not limited to, display options and bitstream options On-screen display In the preferred mode, the function bits contain a single bit to indicate whether the "Compressed Pixel Mode" is activated.When the "Compressed Pixel Mode" is activated, the data in the display data in The screen display data contains a plurality or "runs" of "one bit" pixels as will be described later.The screen display data 220 contains the bitmap in order from left to right and top to bottom. they are used to def Inir the color index of each pixel. In the preferred embodiment, if the "Compressed Pixel Mode" is activated, then the display display data 220 contains an index byte 230 which is followed by a plurality of data bytes 240. The length of the index byte 230 and the data bytes 240 are set to 8 bits for each byte. The index 230 contains the addresses for two (2) particular palette entries that have a 4-bit address. As such, by setting each data bit in the display data 220 to a high or low value, one of the two available index addresses can be easily accessed using a single bit or one-bit pixels.

Additionally, Compressed Pixel Mode allows a user to specify a "run" of one bit pixels. A run length counter informs the display unit about how many pixels of a bit there are in each run. The count of the length of the run is written in the screen display header. To illustrate, Figure 2 shows an index byte 230 having a first index 232 and a second index 234, wherein the indices represent the inputs of palette 5 and 1 2, respectively. If the most significant bit (msb) of each pixel byte of screen display corresponds to the output of the first pixel, then if one bit is "1" the four most significant bits 232 of the index byte are sent to address the palette. If a bit is "0", then the four least significant bits 234 of the index byte are sent to address the palette. Additionally, if the compressed run length count is equal to twenty, then the next three bytes of data 240 that follow the index byte contain those twenty "one bit" pixels. At the end of each run, the next byte should be the next index byte, followed by the next run. This mode of operation allows the processor 1 30 to gain a 4: 1 compression ratio in the normal display mode which uses four bits to address the palette. Savings are more significant for decoding systems than incorporating larger pallets. In this Compressed Pixel Mode, only two colors can be selected at the same time for a given run. However, since the application such as Subtitling only uses two colors for a given character, the Compressed Pixel Mode reduces the number of memory operations without limiting the deployment capabilities of a particular display deployment implementation. Additionally, the processor can easily change the selections of two colors by simply changing the color index 230 at the end of a run, thus allowing color changes. Finally, although the Compressed Pixel Mode is selected for a screen display header 210, the on-screen display unit supports multiple header blocks which may each have a different resolution mode. Thus, the display unit is able to display different types of resolutions or formats on the same video screen. The selection of the Compressed Pixel Mode is controlled by the user via the processor 130. This control can be implemented using computer programs that detect the need to minimize memory access by the display unit 150. For example, the Video decoder 160 may receive a series of complicated encoded frames that require additional memory access. In order to minimize the memory access conflicts between the on-screen display unit and the video decoder, the processor can shift the greater demand of the video decoder by activating the Compressed Pixel Mode in the on-screen display bitstream.

Figure 3 illustrates a method 300 for constructing a screen display bitstream having a plurality of one bit pixels. The method is generally taken from a storage device, for example, a memory, and executed by the processor 130. The screen display bitstream is generated by the processor 130 and is processed by the display unit 150. The method 300 constructs a stream of screen display bits of Figure 2 by generating a screen display header having a compressed pixel mode bit, followed by a plurality of bytes of data indices and bytes. With reference to Figure 3, the method 300 begins at step 305 and proceeds to step 310 wherein a bit in the display display header is designated as a compressed pixel mode bit. If the Compressed Pixel Mode is enabled in the on-screen display header, then the on-screen display data bits that follow the header are one-bit pixels. If the Compressed Pixel Mode is not activated, then the on-screen display data bits are treated in accordance with a normal format, which can be a 4-bit address to a palette (or any other bitstream format, for example, the MPEG standards). In step 320, the method 300 determines whether the Compressed Pixel Mode is activated. If the request is answered negatively, the method 300 proceeds to step 325 where the display data bytes are generated on the screen using an uncompressed color format. Then method 300 proceeds to step 370. If the request in step 320 is answered affirmatively, method 300 proceeds to step 330 where a "run length count" is written to the on-screen display header. The "run length count" represents a run of one bit pixels in the display data data bytes and is used to initialize a run length counter. In step 340, method 300 generates an index byte that has two indexes that identify two possible entries in a palette located in the on-screen display header. The two indexes are selected for the entire run. In step 350, the method 300 generates a run of one bit pixels arranged in the display data data bytes. Although each byte of display data is 8 bits long, the run length is not restricted to any length, that is, a run of twenty-one pixels of a bit can be placed in three bytes of display data in screen. In step 360, method 300 determines if there are other additional runs. A new run may be required if the two selected colors are modified. If the request is answered negatively, method 300 continues to step 370. If the request is answered affirmatively, method 300 continues to step 330 where steps 330-350 are repeated for each additional run. The indexes in the index byte can be modified selectively for each run. In step 370, method 300 determines if there is another display header on the screen. A new on-screen display header may be required if the selected colors in the palette and the various modes represented by the function bits 212 are modified. Similarly, a new heading is required for each new display region in a table. If the request is answered negatively, method 300 continues to step 350 where method 300 terminates. If the request is answered affirmatively, method 300 continues to step 320 where steps 320-360 are repeated for each display header in additional screen In this manner, the screen display bit stream may comprise bytes of compressed screen display data and non-compressed screen display data bytes. Then a novel method and apparatus for constructing a screen display bit stream having a plurality of one bit pixels providing improved memory bandwidth utilization with a decoding / displaying system has been shown and described. However, many changes, modifications, variations and other uses and applications of the present invention will be apparent to those skilled in the art after consideration of this specification and the accompanying drawings, which disclose the embodiments thereof. All mentioned changes, modifications, variations and other uses and applications that do not deviate from the spirit and scope of the invention are considered covered by the invention, which will be limited only by the following claims.

Claims (14)

1. CLAIMS 1. Method for constructing a screen display bit stream, said method comprises the steps of: Setting a bit in a screen display header to indicate one of a compressed pixel mode and an uncompressed pixel mode; generate an index byte containing addresses when the bit in the on-screen display header indicates the compressed pixel mode; and generating a plurality of one-bit pixels, each pixel indicates one such address. The method of claim 1, further comprising the step of: Assigning a run length for said plurality of one-bit pixels. The method of claim 1, wherein said step of generating an index byte comprises the steps of: generating a first index; and generate a second index. 4. The method of claim 3, wherein said first and second indices correlate two pallet entries. The method of claim 4, wherein said plurality of pixels of a bit is correlated to one of said indices. 6. The method of claim 1, wherein said plurality of pixels of a bit contains a plurality of uncompressed pixels when said bit in said screen display header indicates an uncompressed pixel mode. screen display bit stream stored in a storage medium comprising: a header having a bit to indicate one of a compressed pixel mode and a non-compressed pixel mode; and on-screen display data, coupled to said header, including an index byte containing addresses and a plurality of one-bit pixels, each pixel indicates one such address when the bit in the on-screen display header indicates the mode of compressed pixel. The display display bit stream of claim 7, wherein said plurality of display data bits includes indexes to a palette. 9. The screen display bit stream of claim 7, such display screen bitstream is generated in accordance with the MPEG standards. The on-screen display display stream of claim 7, wherein said plurality of display data bits includes uncompressed pixels when said bit in said display display header indicates an uncompressed pixel mode. eleven . Apparatus for generating a screen display bitstream comprising: a storage means for storing an on-screen display header and on-screen display data; and a processor, coupled to such storage means, for activating a pixel mode bit compressed in said header and said display data including an index byte containing addresses and a plurality of one bit pixels, each pixel. select one of such addresses. 12. The apparatus of claim 1, wherein said storage means is a read-only memory (ROM). The apparatus of claim 1, wherein said storage means is a random access memory (RAM). 14. Apparatus for generating a screen display message comprising: a storage means for storing a screen display bit stream having a header including a bit to indicate one of a compressed pixel mode and a pixel mode uncompressed and on-screen display data, coupled to such a header, including an index byte containing addresses and a plurality of one-bit pixels, each pixel indicates one such address when the bit in the on-screen display header indicates the pixel mode compressed gone. a processor, coupled to such storage means, for programming a pixel mode bit compressed in said header to indicate said compressed pixel mode and formatting said display data on the screen using such a plurality of one bit pixels; and an on-screen display unit, housed thereto, for processing said display screen bit stream to form the on-screen display message. RESU MEN A concomitant apparatus and method for generating a screen display message by constructing a screen display bitstream having a plurality of "one bit" pixels. The screen display bit stream contains a screen display header and screen display data. An on-screen display unit retrieves pixel control information from the on-screen display header, which is processed by a processor of a decode / display system. The on-screen display header contains information that is used to program a color palette of the on-screen display unit and to provide instructions on when to process on-screen display data. If the "Compressed Pixel Mode" is activated in the on-screen display header, then the on-screen display unit will treat each bit of the display data on the screen as a "one bit" pixel.