MXPA96003333A - Cooled modulation system trellis paratelevision high definition (hd - Google Patents

Abstract

The present invention relates to a data receiver characterized in that it comprises: means for developing a received data signal comprising a plurality of regularly spaced symbols each representing 3 or more bits Zo, Z1Z2-Zn produced by encoding 2 or more data bits X1, X2-Xn with an encoder comprising a multiple state convolution encoder, a multiple state linear filter for reducing co-channel interference characterizing the received data signal, and decoding means including a Viterbi decoficator for estimating data bits X1, X2-Xn from the linearly filtered data signal in response to a determination of the most probable sequence of transitions between a combination of the states of the convolution encoder and at least a partial representation of the states of that filter line

Description

TRELLIS CODED MODULATION SYSTEM FOR HIGH DEFINITION TELEVISION (HDTV) FIELD OF THE INVENTION The present invention relates to transmission and reception systems, with trellis-coded modulation (TCM) and particularly refers to the use of the TCM in a high-definition television (HDTV) application. ).

BACKGROUND OF THE INVENTION Trellis coded modulation is a well-known technique for improving the operation of digital transmission and reception systems. Improvements in performance or S / N performance can be achieved at a given power level or alternatively the transmitted power required to achieve a given S / N operation can be reduced. In essence, the TCM comprises the use of a convolution encoder, of multiple states, to convert each of the K bits of input data, of a bit input sequence of REP: 22782 data, in K + n output bits and is therefore referred to as a convolution encoder with rate / (K + n). The output bits are then transformed into a sequence of discrete symbols (which have 2 ('c + n) values) of a modulated carrier, for data transmission. The symbols can include, for example, 2 ('c + n) phase or amplitude values. By encoding the input data bits in a state-dependent sequential manner, increased minimum Euclidean distances between the permissible transmitted sequences can be achieved, which leads to a reduced probability of errors, when a maximum possibility decoder is used in the receiver ( for example, a Viterbi decoder). Figure 1 illustrates in general form a system of the type described above, each k bit of an input data stream is converted into k + n output bits by a sequential, state-dependent, convolution encoder 10, with rate k / (k + n). Each group of (k + n) output bits is then transformed into one of 2 (^ + n) symbols, by means of a map constructor 12. The symbols are transmitted through a selected channel, through a transmitter 14. A receiver it includes a tuner 16 for converting the received signal through the selected channel, into an intermediate frequency signal, which is demodulated by a demodulator 18 to provide a basic band analog signal. The analog signal is sampled appropriately by an A / D 20 to retrieve the transmitted symbols which are then applied to a Viterbi decoder 22 to recover the original K data bits. U.S. Patent No. 5,087,975 discloses a residual sideband system (VSB) for transmitting a television signal in the form of successive symbols of level M through a normal 6 MHz television channel. symbol rate or rate is preferably filtered at approximately 684 H (approximately 10.76 MegaSymbols / s), where H is the horizontal scanning frequency NTSC. This patent also discloses the use of a comb characteristic filter of the receiver, which has a forward feeding delay of clock intervals of 12 symbols to reduce the common channel interference NTSC in the receiver. To facilitate the operation of the comb characteristic filter of the receiver, the source data is precoded by a filter module that has a backward feeding delay of the clock intervals of 12 symbols. In the patented system receiver a complementary module post-encoder can be used to process the received signal instead of the comb characteristic filter, in the absence of significant interference of common NTSC channel, to avoid the degradation of the S / N operation attributable to the same. An objective of the present invention is to provide a digital transmission and reception system, which incorporates both TCM techniques and a comb characteristic filter., in the receiver, to achieve an improved S / N operation, with interference reduction of the common NTSC channel. A further object of the invention is to provide a digital transmission and reception system, of the above type, in which the complexity of the receiver is reduced without degrading the operation significantly. Still, another object of the invention is to provide a new frame structure and synchronization system, for a digital television signal.BRIEF DESCRIPTION OF THE DRAWINGS These and other objects and advantages of the invention will become apparent upon reading the following description, together with the drawings, in which: Figure 1 is a block diagram of the system, of a conventional TCM system, employing an optimal Viterbi MLSE decoder; Figure 2A is a block diagram of the system, of a television signal transmitter and receiver, including a TCM system employing Viterbi decoding in accordance with the present invention, Figure 2B is a block diagram of an alternative embodiment of the receiver of Figure 2A; Figure 3 illustrates the interleaving of symbols, effected in the transmitter of Figure 2; Figure 4 is a block diagram illustrating in more detail, circuits 32 and 34 of Figure 2; Figure 5 is a diagram illustrating the operation of the map builder of Figure 4; Figure 6 is a table illustrating the operation of the sonvolution encoder 32B of Figure 4; Figure 7 is a transition diagram of the trellis state, based on the table or Figure 6; Figure 8 is a block diagram illustrating in more detail the circuits 42, 44, 46 and 48 of Figure 2; Figure 9 is a functional block diagram of the Viterbi MLSE optimal decoders, 46A-46L of Figure 8; Figure 10 is a diagram showing a circuit that can be used in place of the Viterbi decoders 46A-46L, of Figure 8, to retrieve bit estimates Yj and Y2; Figure 11 is a functional block diagram of Viterbi MLSE optimal decoders, 44A-44L, of Figure 8; Figure 12 is a table illustrating the operation or operation of the TCM encoder of the invention, including the effects introduced by the comb characteristic filter 42, of the receiver of Figure 2; Figure 13 shows the resulting effect of combining 2 subsets in the comb characteristic filter 42, and the resultant co-assemblies that arise; Figure 14 shows the seven co-assemblies presented in the table of Figure 13; Figure 15 is a transition diagram of the trellis state, based on the table of Figure 12; Figure 16 is a functional block diagram of a Viterbi decoder programmed based on the Viterbi diagram of Figure 15; Figure 17 is a block diagram illustrating the use of the Viterbi decoder of Figure 16 to retrieve estimates of the transmitted bits X ^ and X2; Figure 18 illustrates the states of the delay elements 48, 54 and 56 of Figure 4, after a segment synchronization interval; Figure 19 illustrates the format of the signal developed at the output of the multiplexer 62 of Figure 4 in the vicinity of a segment synchronization signal; Figure 20 is a block diagram of the comb-like filter 42 of Figure 8, modified for the processing of data segments and frame synchronization signals; Figure 21 is a block diagram of a 48-48L codec of Figure 8, modified for the processing of data segments and frame synchronization signals; Figure 22 illustrates the format of the signal developed at the output of the multiplexer 62 of Figure 4 in the vicinity of a frame synchronization signal; Figure 23 illustrates an embodiment of the invention in which an increased bit rate transmission is achieved, providing input data in the form of 3 bits per symbol; Figures 24A and 24B illustrate the application of the invention to a QAM system; Y Figures 25A and 25B illustrate respective configurations of the decoder, useful in receivers for the embodiments of the invention, which are shown in Figures 23 and 24.

DESCRIPTION OF THE PREFERRED MODALITIES Figure 2A illustrates in general form a TCM system applied to a transmission and reception system VSB HDTV, of multiple levels, of the type described in Patent No. 5,087,975, mentioned above. Although the multi-level VSB HDTV application is contemplated in the preferred embodiment of the invention, it will be understood that the invention is of a more general nature and therefore can be applied to other types of transmission and reception systems, including transmission systems. lower resolution video as well as data systems, not based on video. Other modulation techniques can also be employed, such as those employing, for example, quadrature amplitude modulation (QAM). With further reference to Figure 2A, a data source 24 provides a succession of data bits which may for example comprise a compressed HDTV signal, a compressed television signal, an NTSC resolution, or any other original data signal. The data bits are arranged, but not necessarily, in successive frames each of which includes, in an alternating base, 262 and 263 data segments, each data segment comprising 684 two-bit symbols, which are displayed at a speed of symbols of approximately 10.76 Msymbols / s. The bytes (arbitrary number of bits) of source data 24, which also provide a plurality of synchronization signals, are applied to a Reed-Solomon encoder 26 for forward error correction coding and thence to a interleaver 28 bytes. The byte interleaver 28 reorders data bytes through a frame to reduce the susceptibility of the system to noise explosion. The interleaved data bytes of the interleaver 28 are applied to a symbol interleaver 30 which provides, in a preferred embodiment, two output bit streams X ^, X2 at the symbol rate, and each pair X ^, X2 of bits corresponds to a data symbol. In particular, due to the presence of the comb characteristic filter, in the receiver (to be described in more detail later), it is desirable to intersperse the 2-bit symbols, of each data segment, between 12 sub-segments AL, each of which comprises 57 symbols, as shown in Figure 3. Each subsegment, for example subsegment A, comprises 57 symbols, for example AQ - 55, separated from each other by 12 symbol intervals. The symbol interleaver 30 effects that by rearranging the 2-bit, applied symbols of each data byte, as four successive symbols of a respective sub-segment. Thus, for example, the four 2-bit symbols of the first data byte, applied to the interleaver 30, are provided as output symbols AQ A- ?, A2 and A3 of subsegment A, the four 2-bit symbols of the second byte of applied data, such as symbols BQ, BJ, B2 and B3 of subsegment B, and so on. This ensures that the symbols of each data byte are processed as a unit, both in the encoder and in the receiver. The 2-bit symbol streams of the interleaver 30 are coupled to a precoder and a trellis encoder 32 for conversion to 3 output bits, as will be described in greater detail below. Since the unit 32 is characterized by a delay of 12 symbols, it can be thought that it comprises 12 parallel coders, each functioning at 1/12 of the clock speed in symbols, and each sub-segment generated by the interleaver 30 is processed by each one. of the respective parallel encoders. The 3-bit symbol stream, developed at the output of unit 32, is applied to a symbol map constructor and synchronization inserter 34 and thence to a VSB modulator, 36, for transmission as a plurality of symbols. 8 levels symbols. The transmitted signal is received by a receiver including a tuner, a demodulator and an A / D 40, corresponding to blocks 16, 18 and 20 of Figure 1. The output of the unit 40 comprises a stream of symbols of 8. multiple bit levels (for example 8-10 bits) that are applied by 50a components, b, c and d of a selector switch 50 (see U.S. Patent No. 5,260,793 for an exemplary embodiment of a circuit, to operate the switch 50) to a first processing path comprising a comb feature filter 42, and first Viterbi decoder 44, and a second processing path comprising a second Viterbi decoder 46 and a post-decoder 48. Each of the processing paths includes an equalizer 48 coupled between the switching components 50b and 50c. The outputs of both the decoder 44 and the decoder 48 each comprise reconstruction of Xj_, X2 bit streams. The component 50d of the selector switch 50 couples one of the pairs Xj, X2 of bit streams, applied, to a symbol deinterleaver 52 that reconstructs the original data bytes. These bytes of data are deinterleaved by the deinterleaver 54 of bytes and the errors are corrected by the Reed-Solomon decoder 56 for the application to the rest of the receiver. An alternative embodiment of the receiver of Figure 2A is shown in Figure 2B. This embodiment is similar to the system of Figure 2A except that only one Viterbi 45 decoder is provided. More specifically, the Viterbi 45 decoder is responsive to a control signal of the switch 50 to assume a first configuration to implement the decoder functions Viterbi 44 when the first processing path is selected and to assume a second configuration to implement the Viterbi 46 decoder functions when the second processing path is selected. Referring to Figure 4, the unit 32 comprises a back-feed precoder 32a, of module-2, which receives the symbols (each symbol identifying as bits X-¿, X2) of the interleaver 30 to develop the output bits Yj, Y2 • More specifically, the preacher 32a comprises an adder 44 of the module-2, having a first input connected to receive the bit X2 and a second input connected to the output of the adder, which develops the output bit Y2, by a multiplexer 46 and an element 47 of delay of 12 symbols. The output of the delay element 47 is also coupled to its input by the multiplexer 46. The output bit Y2 of the adder 44 is applied as bit Z2 to an input of a constructor 49 of the symbol map, which is shown in more detail in Figure 5. The uncoded Yj bit of the precoder 32a is applied to a convolutional, backward, 4 state, convolution encoder 32b and rate 1/2, for conversion to Z and ZQ output bits. Convolution encoder 32b comprises a path 51 of the signal to apply the Y ^ bit directly to a second input of the symbol map constructor 49, such as the Z-? Bit and an input of an adder 52 modulo-2. The output of the adder 52 is applied, via a multiplexer 53, to the input of a delay element of 12 symbols, whose output is applied to a third input of the symbol-maker 49, such as the ZQ bit, and through a second multiplexer 55 at the input of a second element 56 of delay of 12 symbols. The output of the delay element 56 is applied to the second input of the adder 52. The outputs of the delay elements, 54 and 56, are also coupled to their respective inputs by multiplexers 53 and 55. Each of the delay elements 47, 54 and 56, are temporized at the speed of symbols (approximately 10.76 Msymbols / s). It will be appreciated that each sub-segment A-L (see Figure 3) will be processed independently by the precoder 32a and the convolver coder 32b in favor of the delay elements, of 12 symbols, which characterizes their respective operations. The convolution encoder 32b can take other forms different from those shown in Figure 4 without departing from the invention. For example, the number of states of the encoder may differ from that shown, forward power architectures may be used, rather than the backward feeding structure described and unsystematic coding may be employed, either in a backward array or in one forward feed. The multiplexers 46, 53 and 55 are provided to allow synchronization insertion, during which time their respective inputs B are selected. At all other times the A inputs of the multiplexers are selected. Considering the operation of the circuit when the input A of the multiplexers is selected, and not for the time being considering the effect of the precoder 32a, the operation of the convolution encoder 32b and the map constructor 49 is illustrated in the table of FIG. hereinafter referred to as trellis coder (TE, for its acronym in English) 60. The first column of the table represents the four possible states Q ^ Q of the delay elements 56 and 54 of the convolution coder 32b, in an arbitrary time n. These states are 00, 01, 10 and 11. The second column represents the possible values of bits Y2 and Y for each of the states Q-QQ of the encoder 32b at time n. The third column of the table represents the values of the output bits Z2Z1ZQ at time n for each combination of Y2 Yi bits and Q QQ states of the encoder at time n. For example, when the encoder 32b is in the state QlQ? "01 * bits Y2 v? - 10, results in the output bits Z2 Z ^ Z Q" 101. The fourth column of the table, designated as R (n), represents the amplitude of the symbol, provided by the symbol map constructor 49 (see Figure 5) in response to the output bits Z2 Z Q. Since there are three output bits, 8 symbol levels are provided (-7, -5, -3, -1, +1, +3, +5 and +7). The output bits Z2 Z-ZQ-101, for example, result in the symbol map constructor 49 generating the symbol level +3. Finally, the fifth column of the table represents the state of the encoder 32b in time (n + 1). It will be understood that since each of the delay elements 54 or 56 is 12 symbols of length, for the symbols of each segment A-L the states Q QQ of the encoder 32b at times n and (n + 1) represent successive transitions of the states of the encoder. It will be noted that the symbols of 8 levels developed at the output of the map constructor 49 are symmetric around the level 0. To facilitate the acquisition of the signal at the receiver, it is preferable to decrease each symbol by a given amount (for example +1 unit ) to provide a pilo or auxiliary component. The symbols and the pilot component are then applied through a multiplexer 62 to a modulator 36 (see Figure 2) where they are used to modulate a carrier selected for transmission in a VSB form with suppression of the carrier as described in Patent No. 5,087,975 mentioned previously. The output of the map constructor 49 also applies to the input of a RAM (Random Access Memory) 64, whose output is applied to a second input of the multiplexer 62. A third input of the multiplexer 62 is supplied from a signal source 66 of synchronization of segments and frames. With further reference to the symbol map constructor 49, of Figure 5, it will be noted that the levels of 8 symbols are divided into 4 subsets a, b, c and d, and each subset is identified by a particular state of output bits ZQ. In this way, the output bits Zj ZQ = 00 select the subset d, of symbols Z ZQ = 01 select the subset c of symbols, Z ZQ = 10 select the subset b of symbols and Z Z Q «= 11 select the subset a. Within each subset, the amplitudes of the respective symbols differ by a magnitude of 8 units. It will also be noted that the levels of successive symbols (-7, -5), (-3, -1) (, (+1, +3) and (+5, +7) are selected by common states of output bits Z2 Z. Thus, for example, the bit output Z2 «00 selects both levels of symbol amplitudes -7 and -5, and so on, both preceding attributes of the map maker 49 of symbols are useful in achieving reduced complexity of the receiver as will be described in more detail later.

Figure 7 is a state transition diagram for the convolution encoder 32b, derived from the Table of Figure 6. The diagram illustrates the four states of the encoder and the various transitions between them. In particular, each state has 2 parallel branches, each of which extends to the same or a different state. The branches are marked with the input bits Y2 Yi which cause the state transition and the resultant output R of the map constructor 49. As will be explained in more detail below, this state diagram can be used to design, in the receiver, an optimal Viterbi decoder with maximum chance sequence estimation (MLSE), to retrieve estimates of the Y2 and Y ^ bits as is well known in the art. Figure 8 illustrates the aspects of the decoding in the receiver of the invention, in greater detail. The multi-bit symbol values of the tuner, A / D demodulator 40, are applied to a first demultiplexer 70 through the first processing path comprising the comb characteristic filter 42 and the equalizer 38, and a second demultiplexer. 72 through the second processing path comprising the equalizer 38.

The comb characteristic filter 42 comprises a forward feed filter that includes a linear adder 74 and a 12 symbol delay element 76. As explained more fully in the aforementioned Patent 5,087,975, the filter can be operated to reduce the interference of the NTSC common channel by subtracting -from each received symbol, the symbol received 12 symbol intervals before. Due to the interleaving of symbols provided in the transmitter, the comb characteristic filter operates independently in each of the subsegments to provide outputs with comb characteristic, successive, of the form A ^ - AQ, Bi-BQ, etc. These output with comb characteristic are demultiplexed by the demultiplexer 70 into 12 separate outputs, each of which corresponds to a respective sub-segment A-L. Each sub-feature of the comb is applied, by demultiplexer 70, to a Viterbi decoder. respective 44A-44L which operates at a rate of 1/12 of the speed or rate in clock symbols (fs). Each of the decoders 44A-44L provides a pair of output unscrambled bits comprising estimates of input bits Xj X, and the encoded bits are multiplexed into a stream of interleaved bits, as shown in FIG. 3, by a multiplexer 78. The interleaved symbols of the unit 40 are also demultiplexed by the demultiplexer 72 in the 12 separate sub-segments A-L, each of which is applied to each of the Viterbi decoders 46A-46L, respectively. It will then be noted that each of the original data bits of the source 24 are processed as a unit, by one of the respective decoders 46A-46L. For example, the data byte represented by the symbols A3 A2 A ^ AQ is processed by the decoder 46A, and so on. The same is true of course for the desodemers 44A-44L, except that the processed symbols have previously been combed by the action of the filter 42. Each of the decoders 46A-46L may comprise a substantially identical device operating at a rate or rate of fs / 12 and that is programmed according to the state diagram of Figure 7 to perform an optimal MLSE Viterbi decoding to retrieve bit estimates Y2 and Yj as is well known in the art. In particular, each of the decoders 46A-46L is programmed to generate 4 branch measurements, typically using a programmed ROM (Read Only Memory), each of which represents the difference between the level of the received symbol (i.e., a value of 8 to 10 bits) and the closest of the two levels of subsets of each of the subsets of symbols a, b, c and d. Figure 9 illustrates a Viterbi decoder manufactured by LSI Logic Corp that can be programmed to perform the functions of each of the decoders 46A-46L. The decoder comprises a ROM 84 generator of measures of the branches, sensitive to the received symbols, to generate and apply 4 measures of the branches to the unit 86 as well as to add, compare and select (ACS). The ACS unit 86 is coupled and bidirectionally to a route metric storage memory 88 and also supplies a backward tracking memory 90. In general, the ACS unit 86 adds the measures of the branches, generated by the generator 84, the previous measurements of the routes, stored in the memory 88, to generate new route measurements, compares the route measurements that emanate from them states and selects those with the lowest route measurements for storage. The backward tracking memory 90, after a number of branches have been developed, can be operated to select a surviving route and generate estimates of the Y2 and Y bits that would have produced the surviving route. It will be recalled that in the preceding analysis the effect of the precoder 32a, in the input bitstream, has been ignored. Although the function of the precoder will be described in greater detail later, it will be sufficient for now to recognize that the input bit X2 differs from the bit Y2 due to the operation of the precoder module-2. The output of each Viterbi 46A - 46L decoder in Figure 8 comprises only one bit estimate Y2 »and not the input but X2 • Consequently, a complementary 48A - 48L module-2, in the receiver, is used to recover estimates of input bits Xj and X2 of each respective decoder 46A-46L. Each coder 48A-48L comprises a direct route between the input bit Yj and the output bit X- ^ and a forward feed circuit in which the output bit Y2 is applied directly to an input of an add-on 92 module-2 and to a second input of the clicker 92, via an element 94 for the delay of a symbol. The output of the adder 92 comprises an estimate of the input bit X2. Finally, the decoded bits Xj, X2 of the post-encoders 48A-48L are multiplexed in a stream of interleaved bits as shown in FIG. 13, by a multiplexer 96. In an alternative embodiment of the invention, each of the Viterbi 46A decoders - 46L can be replaced by a disconnector 98 as illustrated in Figure 10, to provide a reduced cost receiver in cases where the received signal is characterized by a relatively high S / N ratio. This is often the case that occurs in cable transmissions that normally exhibit a better S / N ratio than terrestrial transmissions. Then an exchange or negotiation is made between the TCM coding gain and the complexity and cost of the receiver. Referring to Figure 10, the switch 98 is characterized by three levels of elements (-4, 0 and +4). A received symbol that has a level more negative than -4 will be decoded by the switch 98 as bits Y2Y1 = 00, a level between -4 and 0 will be decoded as bits Y2 Yi - 01, a level between 0 and +4 will be dessodified as bits Y2 Yj "10 and a more positive level than +4 will be decoded as bits Y2 Yi = 11. As before, the bits Y2 Yi are converted into a bit estimate X2 Xi by a respective post-encoder 48A-48L. map builder 49 of Figure 5, it will be seen that the switch 98 performs the appropriate desdodification of the received symbols, because the levels of successive symbols are represented by common values of bits 2 Z \, as previously mentioned. This embodiment of the invention therefore, and in effect, implements a 4-level transmission and reception system that provides a speed or bit rate equivalent to that of the 8-level TCM system, but with an S / N performance or efficiency. worse, given that the TCM coding gain is not realized. Referring again to Figure 8, although the character filter 42! combi stisa, has the desired effect of reducing the common channel interference NTSC, also increases the complexity of the decoders 44A - 44L where the optimal MLSE Viterbi decoding is used, to recover the X-¿and X2 bits • In particular, An optimal Viterbi MLSE decoder must take into account not only the state of the encoder, but also the state of the delay element 76 of the comb characteristic filter 42. Since there are 4 states of the encoder and 4 possible ways of entering each state (ie there are 4 possible states of the delay element 76 for each state of the encoder 32b), an optimal decoder must process a trellis of 16 states. In addition, the decoder must account for 4 branches or branches that enter each state while only 2 branches enter each state of the encoder. One of those decoders is illustrated in Figure 11 and, although it is complex in nature, its design is relatively uncomplicated. In particular, although the functionality of the decoder is similar to that shown in Figure 9 (and therefore the same reference numbers are used), its complexity is greatly increased by including the requirement to generate 15 measures of branches instead of only 4. The measures of branches or branches represent the difference between the level of a received symbol and each of the 15 possible points of the constellation of the comb filter characteristic 42 output (ie the linear combination of the symbols of 8 levels provide 15 possible levels of output).

The table of Figure 12 illustrates a technique in accordance with the invention for reducing the complexity, and therefore the cost, of the Viterbi decoders 44A-44L, used to retrieve the Xj and X2 bits of the output of the feature filter 42. hair comb. This simplification, which becomes possible by precoding the bit X2 as shown in FIG. 4, is accomplished by ignoring some of the state information of the delay element 76 of the comb characteristic filter 42, in the construction of the trellis diagram, forming the decoder base. In particular, as will be explained in greater detail below, the simplification of decoding is achieved in accordance with this aspect of the invention by considering only the information identifying the subsets a, b, c, and d of the 8 possible states of the delay element 76 from the comb characteristic filter. If the output of the delay element 76 is represented by the reference letter V, the combined state of the codifier and sanal can be represented, Cj ^ (n) QQ (n) V ^ VQ (n), where the subset V ^ VQ (n) = subset Z ZQ (n-1). That is, the state of the delay element 76 is represented by the subset of the previous symbol.

Referring now to the table of Figure 12, the first column represents the state of the combined encoder and channel (using only subset information to represent the state of the delay element 76) QI OV ^ VQ at time n. As shown, there are 8 possible states 0000, 0010, 0100, 0110, 1001, 1011, 1101 and 1111 (note that in all cases Q-¿= VQ). These eight states are derived from the last two columns of the table of Figure 6 which gives the states i QQ of the encoder 32b and the associated subset V ^ VQ of the output V of the delay element 76 in an arbitrary time (n + 1 ). It will be noted that the subset V ^ VQ at time (n + 1) is the same as the output bits Z-¿ZQ at time n (see the third column of the table in Figure 6). Each QIQOVIVQ state of the combined encoder and channel is listed twice in the table of Figure 12, once for each possible value of the input bit X-j_, see the third column of the table). The fourth column of the table represents the subset Z ^ ZQ at time n for each encoder / channel state and each value of the input bit Xj_. These values are derived based on the relationships Z = > »X-y and ZQ = QQ. Both the subset V-? VQ of the first column of the table, as the subset Z ZQ comprising the fourth column of the table, are identified by the identifiers (a-d) of subsets, which are shown in the map constructor 49 of Figure 5 in the second and fifth columns respectively, of the table. Referring again to Figure 8, the output of the linear additive 74 of the comb characteristic filter 42, applied to each decoder 44A-44L, is identified by the letter U and comprises the value of a received symbol minus the value of the previous symbol . This value is represented in the sixth column of the table of Figure 12 as the difference between the subset Z, Zi ZQ, and the subset V, Vj VQ, in terms of the identifiers (a-d) of the subsets. Thus, for example, the subset U at time n for the first row of the table is (d - d), for the fifth row (c - d), and so on. In Figure 13 the possible values of the subset U are derived by subtracting or subtracting each subset V (a, b, c and d) from each subset Z (a, b, c and d). In particular, each possible subset Z is identified along the upper part of the figure, by means of circles filled with black that correspond to the levels of the resinous subsets. For example, the subset of the levels -1 and +7 of the levels 8, the subset b comprises the levels -3 and +5, and so on. Similarly, each possible subset V is identified along the margin of the left side of the figure. The results of subtracting each subset V of each subset Z to derive the subsets U (U-Z-V) are shown inside the Figure. For example, the subset U, (a - a), see the last row of the table of Figure 12, is derived by subtracting or subtracting the levels -1 and +7 of subset a, from levels -1 and +7 of the subset a , which gives the three levels +8, 0, -8 as shown in the upper left corner of Figure 13. Similarly, the subset U (ab), see the row ostava of the table in Figure 12, it is derived by subtracting the levels -3 and +5 from subset b, from levels -1 and +7 of the subset, which gives the three levels +10, +2, -6, as shown, and so on. The examination of the 16 sub-sets U shown in Figure 13 reveals that if one belongs to one of the seven sub-sets somunes to the suals has been referred to hereafter we are together. These 7 items are shown in Figure 14 and the sosonjuntos A (subsets U, aa, bb, ss and dd), Bl (subsets U, ba, sb and dc), B2 (subset U, ad), Cl are identified. (subsets U, ca and db), C2 (subsets U, ac and bd), DI (subset U, da) and D2 (subsets U, ab, bc and cd). The cosonjunto for sada subsonjunto U is also shown in the seventh column of the table of Figure 12. It will be noted that each subset comprises 3 of 15 possible levels. The final column of the column in Figure 12, which corresponds to the last two columns of the table in Figure 6, represents the QIQOV ^ VQ state of the codifier / sanal in time (n + 1). The first and last soloms of the table can not be used to construct a transitions diagram of trellis states for the sodifisador / sanal sombinados, as shown in Figure 15. In this figure, VQ has not been considered since it is redundant. - The diagram of transitions of states trellis somprende thus 8 states, are two branches or derivations that emanate from sada state. Each branch or derivation is marsa or label are the input bit Xj and the sosonjunto A, Bl, B2, Cl, C2, DI and D2 asosiado are the transgressive transgression. The trellis diagram of Figure 15 can now be used to provide the basis for a depleted Viterbi de-shuffler (for one of the de-spreaders 44A-44L) to estimate the input bit X ^ of the U output of the filter's adder 74 42 from sarasterí stisa en comb. This deodorizer, which forms an alternative embodiment of the optimal Viterbi de-splicer of Figure 11, can take the form of the Viterbi de-diffuser as illustrated in Figure 16. The apparatus used to implement this Viterbi de-splicer can be similar to that used in the desodifier. of FIGS. 9 and 11 and thus a generator 84 for measuring branches or branches, a unit 86 ACS, a memory 88 for storing route measurements and a backward tracking memory 90. In the case of the decoder of Figure 16, the branch measurement generator 84 is programmed to generate seven measures of branches each of which represents the Euclidean square distance, between the symbol level U and the output of the adder 74 of the filter 42 of comb characterístisa and the sersano of the 3 valid levels of sada one of the 7 sosonjuntos A, Bl, B2, Cl, C2, DI and D2. For example, assuming a level U - (-6), the 7 measures of the branches would be derived as follows: A = 22 = 4; Bl-42-16; B2 - 42-16; Cl-22-4; C2-22-; DI - 0 and D2 - 0. Based on these branch measures and the trellis diagram of Figure 15, the decoder provides an estimate of the X-bit bit and the identification of the associated set, which are known from the decisions of survivor route made by the decoder. However, it is still necessary to provide an estimate of the inbit X2 and this can be done in response to the information of the sets, provided by the Viterbi de-modifier of Figure 16. The wisdom of estimating bit X2 in this way is fasilite providing the presodifessor 32a in the inbit path X2 of FIG. 4. In partis, it will be seen that the precoder 32a is configured in such a way that whenever the inbit X2 (n) -1, the outbit Y2 (n), corresponding to the precoder, is different from the previous outbit Y2 (n-1). That is, if Y2 (n) at Y2 (n-1), then X2 (n) = l. Also, if X2 < n) - 0, then the corresponding outbit Y2 (n) will be equal to the previous outbit Y2 (n-1). That is, if Y2 (n) ™ Y2 (n - 1), then X2 (n) = 0. Also, they are reference to the map construsor 49 of Figure 5, it will be observed that a positive level symbol suing Z2 is provided. (is desir Y2) = 1 and a negative level symbol is supplied Z2 - 2"0 * The presedant sarasteristisas are used to estimate the X2 bit as shown in Figure 17. The U level of the symbol in the outof the adder 74 of the filter 42 of sarasterí stisa in comb is aplised through a delay 100 (so sorted that the delay of the Viterbi 444 - 44L deodorizers is added) to an inof a plurality, ie 7, of disconnectors 102. The identification signal of the set, at the outof the decoder 44A-44L, is aplised to the second inof the sessionador 102. An estimation of the bit X2 is developed by the switch 102, determining whether the level of the symbol U, of the filter 42 of sarasteristisa in comb, is more sersano to one of the most external levels (for example in the levels + 8 0 - 8 of the sosonjunto A) of the sosonjunto A, Bl, B2, Cl, C2, DI, or D2 identified by the respectable decoder Viterbi 44A - 44L, saso in the sual bit X2 is deodified as a 1, or if it is more sersan at the intermediate level (for example, the level 0 of the joint A) of the level of the identified setpoint, saso in the sual bit X2 is deodorized as a 0. The presedent is based in the hesho that in the positive outer level (for example +8 of the sosonjunto A) of each of the cosonjuntos results only suando the bits Y2 sussivos in the outof the predodifisador 32a are sarasterizan by the values Y2 () == 1 e Y2 (n - 1) = 0, the negative external level (for example -8 of the set A) of sada co-assembly only when the suffixive Y2 bits have the values Y2 (n) - 0 and Y2 (n - 1) - 1 and the intermediate level (for example, 0 of cluster A) of each set, only by suffixing the remaining Y2 bits res Y2 (n) - 1 ß Y2 - (n - 1) - 1 6 Y2 (n) = 0 and Y2 (n - 1) - 0. In the two previous sessions X2 () = 1 [given that Y2 (n ) m Y2 (n-1)] and in the last saso X2 (n) - 0 [given that Y2 (n) - Y2 - 1)]. Finally, it will be understood that the inclusion of the precoder 32a in the inbit path X2 requires the incorporation of a somplementary decoder 104 in the estimated bit path X2 where an optimal Viterbi MLSE decoder is used, to process the outof the filter 42 sarasterí stisa in comb, as shown in Figure 11. In the sirsuito of the sirsuito of Figure 17 a somplementary possodifisador is not required since the estimated bit X2 is produced direstly. As previously disengaged, the data provided by the source 24 is preferably arranged in subsets of the subjective data, since one of the suals comprises a plurality of data segments of 684 symbols., although the following aspects of the invention are similarly apllied to arrangements that have different numbers of data segments per frame and different numbers of symbols per data segments. It is also desirable to incorporate a signal for the synchronization of frames, which may comprise one or more pseudo-random sequencies, in the first data segment of the previous data and a signal for the unscrambling of data segments in the expositions of the first symbols symbols of each data segment. Referring again to Figure 4, the signals for segment synchronization are inserted at the appropriate times within the data sorbet at the output of the multiplexer 62 by the generator 66 for the syncronization of suffixes and data segments. During these intervals the input B of the multiplexer 46 of the pre-demipher 32 a and the inputs B of the multiplexers 53 and 55 of the sonofisador 32b of sonvolusión are selessionan. Also, the last 12 symbols of the last sada data segments are read in memory 64 and are blown in the last intervals of 12 symbols of the segment for the syncronization of supers at the output of multiplexer 62. As will be explained, they are greater Afterwards, the preset sonsions or provisions are effective to ensure that in the receiver the symbols of each of the sub-segments A-L (see Figure 3) are processed only with symbols of the same subsegment. More specifically, during interval 4 of segment unscrambling, the predetermined unscrambling symbols, SQ, S ^, S2 and S3 are inserted into the data stream by the generator 66 and the multiplexer 62 while at the same time the data input of source 24 are temporarily suspended. Also, since the output of the delay elements 48, 54 and 56 are being fed back into their respective inputs, each of the delay elements will be faceted as shown in Figure 18 immediately after the segment unscrambling interval, in where the state of the delay elements is defined by a symbol of subsegment E. The signal in the form of the signal of unscrambling of segments SQ, S, S2 and S3 is illustrated in Figure 19, in which the segment The data containing the synchronization signal is presented at time n and the preceding and following segments are presented at time (n - 1) and (n + 1) respectively. In relation to this figure, it will be noted that the integrity of the subsegments is maintained (all the symbols of the same subsegment are separated from each other by 12 symbol intervals) despite the insorporation of the syncronization symbols in the data soruent. bundled. Figure 20 shows a modality of the filter 42 of the comb characteristic of Figure 8, modified for its operation in accordance with the insertion aspestos for synchronization, of the invention. Modification includes the supply of a multiplexer 110 having an input A to directly support the output of the comb-shaped filter and an input b to receive the output of an adder 112. An input of the actuator 112 is directly outputted. of the comb-like filter while its second input is detected at the outlet of the filter in a comb-style, by means of a delay element of 12 symbols. The input B of the multiplexer 110 is selected during the symbol intervals 13-16, (ie, the synchronization interval delayed by 12 clock times in symbols) and otherwise the input A is selessiona. When it is in operation, the output of the filter 42 of sarasterística in comb, during the interval of synchronization, somprende: so - A (n - 1) S i - B (n - 1) s2 - C (n - 1) s3 - D (n - 1) This information, which is apllied to the de-modifier via the A input of the multiplexer 110, does not represent data and is therefore ignored by the dessofisador. However, if they are the next symbol in the data segment, which occurs at time n, is desir, a symbol of subsegment E), the symbols of the same subsegments appropriately resonate the sarasterí stisa in comb, jointly, and are provided to the decoder via the input A of the multiplexer 110. During the first 4 symbols of the data segment that is presented in time (n +1) the input B of the multiplexer 110 is selessioned. The output of the characteristic filter 42 in Comb, during this period, is A (n + 1) - S0 B (n + 1) - Sx s (n + 1) - S2 D (n + 1) - S3 These values are combined in the adder 112 with the 4 outputs of the comb filter, in the combing interval, during the interval of sintering, in the delay 114 to provide the 4 suressive outputs A (n + 1) - A (nl), B (n + 1) - B (nl), C (n + 1) - C (nl) and D (n + 1) - D (nl). It will be noted that the output represents data symbols that have acquired comb-likeness, from the same subsegment, as desired. Therefore, the input A of the multiplexer 110 is selected again and the normal processing continues. Figure 21 shows an embodiment of the post-decoders used in the receiver of the invention, see for example the possipipisers 48A-48L of Figure 8 and 10, modified for the sputtering of the synchronization are the synchronization insertion aspetas of the invention. The modified postcoder, comprising a module 120 addressee and a forward feed delay 122, further includes a multiplexer 124 for pumping the delay output 122 back to its input during the synchronization interval and otherwise applying the input signal from the post-decoder to an input of the locker 120 through the delay 122. As a result, after the interval of unscrambling during the sual, the output of the possumifier is ignored, as one of the possipipisers 48A -48L will have souls in their delay 122 the symbol of the subsegment are the sual is asosiado as desired. The insertion of frame synchronization and processing is effected in a very similar way as described above in relation to the synchronization of data segments. More specifically, during the interval for the synchronization of items, it is to describe the first data segment of sudo, the generator 66 and the multiplexer 62 have to be operated inisially for the insertion of symbols VQ-Vg7 ?, for unsynchronization of suds. , in the expositions of the first 672 symbols of the SQ segment for the syncronization of frames, this is shown in Figure 22. The last 12 symbols of the segment for the synchronization of frames are inserted into the data stream by RAM 64 and comprise the last 12 symbols of the last S3X2 data segment of the previous frame (which has been previously written in RAM 64). Also, since the B inputs of the multiplexers 46, 53 and 55 are selected during the interval for frame synchronization, the delay elements 48, 54 and 56 will assume the conditionality shown in Figure 18 at the end of the interval for the synchronization of segments of the next data segment S? f which will then be formed as previously described and as described in Fig. 22. The circles of Figs. 20 and 21 operate as previously disengaged to ensure that the symbols of Each of the subsegments A - L are prosecuted are symbols only of the same subsegment. The outputs of the two sirsuites during the SQ segment for the synronization of frames do not represent data and are therefore ignored during the subsessing process. As previously mentioned, the system of the invention can be used with different constellations of formation or mapping, to provide for example speeds or increased bit rates and with different modulation schemes such as the QAM. Figure 23 illustrates an application of the invention to a system where each symbol represents 3 bits instead of 2 bits as previously described. as illustrated in the drawing 3 the X? f X2 and X3 bits of input data are provided at the symbol rate or rate, the bits X3 and X2 are converted by a precoder 32a ', module 4, which includes a combiner 44"module 4, to the bits Y3 and Y2 for the application of two bits Z3 and Z2 to a map constructor 49 'of symbols of 16 levels.The X bit of the data is applied as a bit Z to a third input of the construstor of maps 49 'and the sonographist 32b of sonvolusion that develops the ZQ bit for the aplissation to the smooth input of the sonorst of maps 49. As in the previously described mode, the Z ZQ bits identify subsets a, b, c and d, one of The suals includes 4 levels of symbols, also, within the subsonic sada the amplitudes of symbols, respectable, differ by a magnitude of 8 units and subsessive levels of symbolic symbols, (for example -15, -13) by means of somune bit states Z3 Z2 2. The signal generated A by the sirsuito of Figure 23 can therefore be dessodifisarse using the tesisas previously dessritas. In this example, an optimal MSLE deodorizer (that is, one that does not take into account the precoder and that is used to decode the output of the comb character filter would have 8 times the number of states that the sodifier has. The modulator 4 modifier allows the decoder to operate in a trellis having only twice the status of the sodifisator and to dessodify the non-sodipized bits without propagation of errors.Figures 24A and 24B illustrate the application of the invention to a QAM modulator. shown in Figure 24A, 3 inputs of bits X, X2 and 3 are provided and bits X3 and X2 are presodifixed independently by module-2 and the presodifisors 32a '' and 32a,,, respecitive, to provide the bits of output Z3 and Z2 and bit Xx is supplied to sonofusion generator 32b to generate the output bits Z and ZQ.The output bits Z3 Z2 Z ZQ are api nstrustor of symbol maps 49 '* to generate 16 relased symbols, in surature (see Figure 4B) that belong to one of the subsets a-d for the aplissation to a modulator 36' QAM. In recession they are the presedent, they will again denote that the bits Z ZQ identify their sets a-d of symbols, respectively. Optimal decoding without the precoders would require a decoder to have 2 ^ - 8 times the number of states the encoder has. With the presodifixers, the dessodifisator would only have two times the number of states. The resepters for the systems of Figures 23 and 24 can take the form that is illustrated in general form in Figure 8. In the saso of the system of Figure 23, a 48A 'module 4 modifier, which insulates a combiner 92' module 4, as shown in Figure 25a, would replace each module 2, 48a, and, in the saso of the system of Figures 24A and B, a pair of the modulators 2, 48A '' and 48 '•'; It is shown in Figure 25B, to replace it with the possible modifier 48A module 2. It is recognized that many changes in the described embodiments of the invention will be apparent to those skilled in the art without departing from its true spirit and scope. Therefore, the invention will be limited to what is defined in the claims.

It should be noted that in relation to this date, the best method conosido by the solisitante to bring to the prástisa the present invention, is the sonvencional for the manufacture of the objects to which it refers. Having described the invention as above, the content of the following is claimed as property:

Claims (20)

1. A data receiver, which is sarasterized because it includes means for developing a received data signal, which includes a plurality of regularly spaced symbols, each of which represents 3 or more bits, ZQ, Z? Z2 - N produced by the encoding of 2 or more data bits Xx X2 - X as a codifier that includes a multi - state sonowner sodifisator, a multi - state linear filter to reduce common channel interference, which features the signal from data received, and means of dessiffifing that include a Viterbi dessodifisador to estimate data bits X? r X2 - from the linearly filtered data signal, in response to a determination of the most probable sesuensia of transitions between a symbiosis of the states of the sonofisador of sonvolusión and at least a parsial representation of the states of the linear filter.

2. The sonicity reseptor is claim 1, characterized in that the linear filter comprises a linear filter of M states and the received data signal includes M groups of interspersed symbols, individually sodifiscated, the M nominator of the deodorisation means and means for aplying Sada one of the M groups of symbols to sada one of the respectable means of dessodifisasión M.

3. The sonic reseptor is claim 1 or 2, which is sarasterized because it includes a second Viterbi deodorising means for estimating data bits Xx, X2 -X from the received data signal, in response to a determination of the most probable sequence of transitions between the states of the convolution encoder.

4. The receiver according to claim 1, characterized in that 3 or more bits ZQ, Zl, Z2-ZN include bits ZQ, Z? Z2, produced by X encoding data bits? X2 and because the decryption means includes a means for estimating the data bits X? X2 from the linearly filtered data signal, in response to a determination of the most probable sequencing between a symbiosis of the states of the convoluted sodifixer and a subset of the linear filter states.

5. The sonic reseptor is claim 4, which is sarasterized because the states of the linear filter can be represented by a value of 3 bits and because the subset includes one of the bits of the 3-bit value.

6. The soundness receiver is claim 4 or 5, sarasterized in that the dessodification means includes a Viterbi decoder for estimating the data bits Xx and for identifying one of a plurality of discrete value sets representing a predetermined number of filter anti-peer outputs. linear.

7. The sonic reseptor is claim 6, which is sarasterized because it includes means responsive to the linearly filtered signal and the identified set of discrete values for estimating the data bit X2.

8. The receiver according to claim 7, is sarasterized because the outputs of the linear filter can be represented by different discrete values and because one of the co-assemblies of the plurality includes a different combination of 3 of the 15 different discrete values, the means for estimating the data bits X2 include a means for determining whether the level of the signal at the output of the linear filter is closer to the intermediate value or to one of the output values of the 3 discrete values of the identified co-set.

9. A data receiver, which is sarasterized because it includes means for developing a received data signal that includes a plurality of regularly spaced symbols, each of the symbols represents 3 bits, ZQ, Z? F Z2 produced by encoding a first data bit Xx using a multi-state sonvolus sodifisator to derive the bits ZQ, Z? and a second data bit X2 using a modulo-2 presodifisator to derive the bit Z2 where the ZQ bits, Z? identifisan reshaping subsets (a - d) of the symbols, one of these subsets (a - d) includes two values of equally spasmodic symbols, and the symbols Z, Z2 identify respective pairs of those symbols, each of which includes two adjacent symbol values, a multi-state linear filter for reducing the common channel interference NTSC defining the received data signal, a first decoder means including a Viterbi decoder for insulating the data bits X? f X2 of the signal of linearly filtered data, in response to a determination of the most probable sequencing of transitions between a combination of the states of the convolution encoder and a subset of states of the linear filter, a second decoding means for estimating the data bits X? X2 of the received data signal, and a means for selecting the first de-spreading means or the second de-spreading means for providing the estimated data bits X X2 •

10. The receiver according to claim 9, sarasterized in that the Viterbi decoder includes a measuring or metric generator of branches or branches, for generating a plurality of measures of branches or branches, each of which represents the distance between the output of the Linear filter and the most common value of a ressantive set of 3 values, all of which represent the linear difference between the values of the symbols of the 2 subsong untos.

11. The sonicity reseptor is claim 10, characterized in that the Viterbi decoder includes means for estimating data bits Xx and for identifying an associated one among the co-sets.

12. The receiver according to claim 11, characterized in that it includes means sensitive to the linearly filtered signal and to the identified cosonjunto, to estimate the data bit X2 •

13. The sonic reseptor is claim 12, characterized in that the means for estimating the data bit X2 includes a means for determining whether the level of the linear filter output is more than the intermediate value or one of the external values of the 3 values. of the identified co-set.

14. The sonic reseptor is any one of claims 9 to 13, characterized in that the states of the linear filter are represented by a value of 3 bits, VQ, V? V2 and because the subset includes the Vx bit of the 3-bit value.

15. The receiver according to any of claims 9 to 13, characterized in that the first and second decoding means include a Viterbi decoding means responsive to the means of separation, to assume a configuration and to carry out the function of the first deodorizing means or a configuration for carrying out the function of the second decoding means.

16. A Viterbi decoder for decoding the signal generated by a multi-state channel, the Viterbi decoder includes a metric generator or measures of branches or drifts, sensitive to the received signal, to generate a plurality of measures of branches or drifts, and a means sensitive to the measurements of branches or derivations, to determine the most probable sesuensia of transitions between a symbiosis of states of the sonofisador of sonvolusión and a subset of the states of the sanal.

17. The coding of soundness is the vindication 16, sarasterized because one of the metrics or measures of the branches or derivations represents the distance between the value of the signal received and the sersano value of the signal received and the value more sersano a sosonjunto respectable of N values.

18. The sound-distorter with the claim 17, sarasterized because the means of determination includes a means to estimate directly a first data component of the received signal and to identify one of the associated co-sets.

19. The sonic demodulator is claim 18, characterized in that it includes means responsive to the received signal for the identified co-set to estimate a second data component thereof.

20. The deformity modifier is the claim 19, which is sarasterized because one of the two sets of data includes 3 data values and because the means for estimating the second data component includes a means to determine if the level of the signal received is more than the value intermediate or one of the external values of the 3 values of the identified co-set. SUMMARY OF THE INVENTION The present invention refers to a codified trellis modulation system which comprises a source of data symbols X? X2, 2-bit, susesivos, arranged in a format of suadros where suda subsample a plurality of data segments sada one of the suals includes a plurality of groups of interspersed data symbols. Each set of interspersed data symbols is separately bifurcated through a presodifixer (32a) and a sonofusion amplifier (32b) to derive output symbols sodifiscated ZQ, Z? Z2, of the suals is raised or is constructed a map of resplendent symbols of 8 levels, for the transmission in sonjunta form are symbols for the synchronization of segments and tables, generated periodically. The received signal can be filtered by means of a linear filter (42), for example a combstring filter (42), to reduce the interference of sanal somún and sada group of filtered symbols is applied to a first Viterbi (44) destructive deodorizer , to estimate X bit data? X2 Each first deodorizer (44) preferably comprises a Viterbi decoder of reduced complexity (44) sensitive to a partial representation of the state of the linear filter (42). Each group of received symbols can also be applied directly to a respective Viterbi second demodulator (46) to estimate the data bits X? F X2 • The estimated data bits Xx X2 of the first or second decoders (44 or 46) are selected for the additional processing.