KR970029104A - Group Adaptive Segment Cache Buffer Implementation - Google Patents

Group Adaptive Segment Cache Buffer Implementation Download PDF

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Publication number
KR970029104A
KR970029104A KR1019950043985A KR19950043985A KR970029104A KR 970029104 A KR970029104 A KR 970029104A KR 1019950043985 A KR1019950043985 A KR 1019950043985A KR 19950043985 A KR19950043985 A KR 19950043985A KR 970029104 A KR970029104 A KR 970029104A
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KR
South Korea
Prior art keywords
cache memory
group
segment
external device
cache
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Application number
KR1019950043985A
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Korean (ko)
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KR100385238B1 (en
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이해승
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김광호
삼성전자 주식회사
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Priority to KR1019950043985A priority Critical patent/KR100385238B1/en
Publication of KR970029104A publication Critical patent/KR970029104A/en
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Publication of KR100385238B1 publication Critical patent/KR100385238B1/en

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • G06F12/1036—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] for multiple virtual address spaces, e.g. segmentation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/12—Replacement control
    • G06F12/121—Replacement control using replacement algorithms
    • G06F12/123—Replacement control using replacement algorithms with age lists, e.g. queue, most recently used [MRU] list or least recently used [LRU] list

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)

Abstract

1. 청구범위에 기재된 발명이 속한 기술분야1. TECHNICAL FIELD OF THE INVENTION

하드 디스크 드라이브에 캐시버퍼에 관한 것으로, 특히 세그먼트되어 있는 캐시버퍼를 다수의 그룹으로 구분하여 운영할 수 있는 그룹 적응형 세그먼트 캐시버퍼 구현방법에 관한 것이다.The present invention relates to a cache buffer in a hard disk drive, and more particularly, to a method for implementing a group adaptive segment cache buffer capable of operating a segmented cache buffer into a plurality of groups.

2. 발명이 해결하려고 하는 기술적 과제2. The technical problem to be solved by the invention

호스트컴퓨터와 같은 외부장치에서 요구하는 데이타 리드/라이트 명령에 효율적으로 적응시킬 수 있는 그룹 적응형 세그먼트 캐시메모리를 제공함에 있다.An object of the present invention is to provide a group adaptive segment cache memory capable of efficiently adapting to a data read / write command required by an external device such as a host computer.

3. 발명의 해결방법의 요지3. Summary of Solution to Invention

하드 디스크 드라이브의 그룹 적응형 세그먼트 캐시메모리 구현방법에 있어서, 호스트컴퓨터와 같은 외부장치로부터 수신되는 데이타 리드명령에 응답하여 상기 외부장치가 요구하는 데이타의 용량을 산출하는 제1과정과, 우선순위별로 상기 캐시메모리내 각 그룹을 서치하여 해당 그룹내 상기 리드데이타 용량 산출과정에서 산출된 데이타 용량이 히트하는가를 검사하는 제2과정과, 상기 검사결과 세그먼트 히트가 발생되는 경우 해당 세그먼트내의 데이타를 독출하여 출력한 후 상기 캐시메모리 관리 테이블을 업데이트시키는 반면, 세그먼트 히트가 발생되지 않는 경우 상기 캐시메모리내 우선순위가 낮은 그룹을 서치하여 LRU방식에 따라 특정 세그먼트를 할당하여 주는 제3과정으로 이루어짐을 특징으로 하는 그룹 적응형 캐시메모리 구현방법.A method for implementing a group adaptive segment cache memory of a hard disk drive, the method comprising: calculating a capacity of data requested by an external device in response to a data read command received from an external device such as a host computer; A second process of searching each group in the cache memory to check whether the data capacity calculated in the read data capacity calculation process in the corresponding group is hit; While updating the cache memory management table after outputting, if a segment hit does not occur, a third process of searching for a low priority group in the cache memory and allocating a specific segment according to the LRU method is performed. Group adaptive cache memory implementation method.

4. 발명의 중요한 용도4. Important uses of the invention

캐시메모리를 이용한 시스템 메모리 제어방법에 사용될 수 있다.It can be used in a system memory control method using cache memory.

Description

그룹 적응형 세그먼트 캐시버퍼 구현방법Group Adaptive Segment Cache Buffer Implementation

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제3도는 본 발명의 일실시예에 따른 그룹 적응형 세그먼트 캐시버퍼의 개략적인 포맷도.3 is a schematic format diagram of a group adaptive segment cache buffer according to an embodiment of the present invention.

Claims (1)

하드 디스크 드라이브의 그룹 적응형 세그먼트 캐시메모리 구현방법에 있어서, 호스트 컴퓨터와 같은 외부 장치로부터 수신되는 데이타 리드명령에 응답하여 상기 외부장치가 요구하는 데이타의 용량을 산출하는 제1과정과, 우선순위별로 상기 캐시메모리내 각 그룹을 서치하여 해당 그룹내 상기 리드데이타 용량 산출과정에서 산출된 데이타 용량이 히트하는가를 검사하는 제2과정과, 상기 검사결과 세그먼트 히트가 발생되는 경우 해당 세그먼트내의 데이타를 독출하여 출력한후 상기 캐시메모리 관리 테이블을 업데이트시키는 반면, 세그먼트 히트가 발생되지 않는 경우 상기 캐시메모리내 우선순위가 낮은 그룹을 서치하여 LRU방식에 따라 특정 세그먼트를 할당하여 주는 제3과정으로 이루어짐을 특징으로 하는 그룹 적응형 캐시버퍼 구현방법.A method for implementing a group adaptive segment cache memory of a hard disk drive, the method comprising: calculating a capacity of data requested by an external device in response to a data read command received from an external device such as a host computer; A second process of searching each group in the cache memory to check whether the data capacity calculated in the read data capacity calculation process in the corresponding group is hit; While updating the cache memory management table after outputting, if a segment hit does not occur, a third process of assigning a specific segment according to the LRU method by searching for a low priority group in the cache memory, Group adaptive cache buffer implementation method. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950043985A 1995-11-27 1995-11-27 Method for realizing segment cash buffer for group adaptation type KR100385238B1 (en)

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Application Number Priority Date Filing Date Title
KR1019950043985A KR100385238B1 (en) 1995-11-27 1995-11-27 Method for realizing segment cash buffer for group adaptation type

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KR970029104A true KR970029104A (en) 1997-06-26
KR100385238B1 KR100385238B1 (en) 2004-02-25

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100404374B1 (en) * 1999-03-31 2003-11-05 인터내셔널 비지네스 머신즈 코포레이션 Method and apparatus for implementing automatic cache variable update
KR100556462B1 (en) * 1998-11-25 2006-04-21 엘지전자 주식회사 Mehtods for Memory Management of Mini Disc Recording/Reproducing Apparatus

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4835686A (en) * 1985-05-29 1989-05-30 Kabushiki Kaisha Toshiba Cache system adopting an LRU system, and magnetic disk controller incorporating it
US5163131A (en) * 1989-09-08 1992-11-10 Auspex Systems, Inc. Parallel i/o network file server architecture
JPH0652060A (en) * 1992-07-28 1994-02-25 Hitachi Ltd Lru list control system
JPH0659952A (en) * 1992-08-07 1994-03-04 Toshiba Corp Magnetic disk device
KR950020169A (en) * 1993-12-06 1995-07-24 이헌조 Cache Data Transfer Control Method of I / O Subsystem with Cache Module

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100556462B1 (en) * 1998-11-25 2006-04-21 엘지전자 주식회사 Mehtods for Memory Management of Mini Disc Recording/Reproducing Apparatus
KR100404374B1 (en) * 1999-03-31 2003-11-05 인터내셔널 비지네스 머신즈 코포레이션 Method and apparatus for implementing automatic cache variable update

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