KR970010389B1 - Television receiver - Google Patents

Abstract

None.

Description

TV receiver performing strobe display

1 is a block diagram showing an embodiment of the present invention.

2 is a block diagram showing a part of another embodiment of the present invention.

3 is a flowchart for explaining an embodiment.

* Explanation of symbols for main parts of the drawings

2: Tuner circuit 3: PLL circuit

4: microcomputer 13: color image signal processing circuit

15 memory 16 controller

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a television receiver which enables strobe display (coma photographic display) of a video signal.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a television receiver for strobe display, which switches a receiving channel and demodulates a received interlaced video signal, and detects a vertical synchronization signal in the video signal. Means, storage means for storing one field of the video signal, a counter for counting the detected vertical synchronization signal, and the video signal in a period from the output of the counter to a value of 1 until reset. The storage means is controlled to write, the writing means is terminated when the output of the counter reaches 1, and the storage means is controlled to read out the stored video signal repeatedly, and the output of the counter is predetermined. When the count value becomes 2n (where n = 1, 2, 3, ...), the counter is reset and the reading of the video signal is finished to write the video signal. The control means for controlling the storage means so as to start the operation is made so that the fluctuation in the vertical direction of the image at the time of strobe display is avoided.

Background Art Conventionally, television receivers capable of strobe display of video signals have been proposed. Such conventional television receivers provide a memory (video RAM) capable of storing field signals (video signals) of video signals. In the strobe display mode, one field of the input video signal is spread over one field. Write to the storage means, stop writing thereafter, repeat reading over a predetermined field period, for example, eight field periods, and supply the video signal for one repeated field to the CRT for display. After that, the writing is stopped, and as described above, one field of the input video signal is written into the storage means over one field period, and this is repeated thereafter, thereby repeating the input image on the screen of the CRT. Strobe display is performed in which the image changes every nine field periods of the signal.

In the strobe display, when the strobe display is performed on the full screen of the CRT according to the video signal of a certain channel, the screen of the CRT is divided into two, and on one split screen, the normal display according to the video signal of a certain channel is displayed. In the other divided screen, strobe display is performed in accordance with video signals of different channels, and the divided screen for performing normal display and strobe display is alternated every predetermined time.

By the way, in the television receiver which enables such a strobe display, as described above, one field of the input video signal is written into the storage means over one field period every 9 (= 1 + 8) fields, that is, odd field periods. At the same time, the writing is stopped after that, and the video signal for one field stored in the storage means is repeatedly read out for eight fields longer than the writing period, so that the input video signal is an interlaced video signal. In this case, the odd number of fields of the first video signal of the video signal written into the storage means for each of nine fields, that is, odd fields, is odd, even, odd,... Since the video signal is changed alternately, the video signal appears to fluctuate vertically in the case of a video signal in which the movement of the input video signal is small.

In view of this point, the present invention intends to propose a television receiver in which the vertical direction of the image in the strobe display is avoided.

A television receiver for strobe display according to the present invention includes a channel switching unit for switching reception channels and demodulating interlaced video signals at any time, means for detecting vertical synchronization signals in the video signals, and the video. Storage means for storing one field of the signal, a counter for counting the detected vertical synchronization signal, and the storage means for writing the video signal in a period from when the output of the counter is reset to 1; Control the storage means so as to finish writing of the video signal when the output of the counter becomes 1, and to repeatedly read out the stored video signal, and output the counter to a predetermined count value 2n (where, n = 1, 2, 3, ...), the counter is reset, the reading of the video signal is terminated, and the writing of the video signal is started. That comprises the control means for controlling the storing means is characterized.

According to the present invention, since the odd number of the field of the video signal stored in the storage means is fixed to either odd or even number, even in the case of the video signal of the image with little movement of the input video signal, Variation in the vertical direction of the image is avoided.

EMBODIMENT OF THE INVENTION Next, the Example of this invention is described in detail according to drawing.

1 shows an embodiment of a television receiver according to the present invention, which will be described next. In Fig. 1, the received signal from the antenna 1 is supplied to the tuner circuit 2, where a television signal of a desired channel is selected, and at the same time the selected television signal is converted into an image intermediate frequency signal. Is converted.

In this television receiver, a PLL synthesizer type tuning circuit is employed, and AFT control is performed in the tuning. Next, this will be described.

The PLL circuit 3 shown in FIG. 1 is composed of a pre-divider, a divider, a phase comparator, a reference signal oscillator, and a low pass filter (all of which are not shown above). The local oscillation signal from the local oscillator (not shown) of the tuner circuit 2 is supplied to the phase comparator through the pre-divider and divider of the PLL circuit 3. On the other hand, the reference signal from the reference signal oscillator of the PLL circuit 3 is supplied to the phase comparator. In this phase comparator, the output of the divider and the reference signal from the reference signal oscillator are compared in phase, and the comparison output is supplied to the tuner circuit 3 through a low pass filter. The oscillation frequency of the local oscillator is controlled according to this comparison output.

At the time of the first selection, AFT control is performed. In other words, the division ratio of the divider of the PLL circuit 3 is set so that the local oscillation frequency is in the vicinity of the frequency corresponding to the normal carrier frequency. This division ratio is set by the microcomputer 4 on the basis of the channel data held in advance. Then, the local oscillation frequency is operated stepwise on the upper side and the lower side, that is, AFT control is performed. When the television signal is introduced by the AFT control, offset channel data corresponding to the division ratio at that time is stored. At the next time of tuning, the offset channel data stored at the time of this first tuning is stored. In the next tuning, a desired channel is selected using the offset channel data stored in this tuning.

Incidentally, the above-described microcomputer 4 is provided with various commands such as a channel change command, a source change command, and the like from the key switch 5 and the remote control transmitter 6. When the channel switching instruction is given to the microcomputer 4, the division ratio of the frequency divider of the PLL circuit 3 is reset in correspondence with the desired channel. When the source switching command is given to the microcomputer 4, the first switch circuit 7 is switched in accordance with the commanded input source.

The video intermediate frequency signal output from the tuner circuit 2 is supplied to the intermediate frequency signal processing circuit 8. In this intermediate frequency signal processing circuit 8, the image intermediate frequency signal is amplified, and the image is detected, and the composite color video signal is output. This composite color video signal is supplied to the first switch circuit 7.

Numeral 9 denotes an input terminal of an external video signal, and the input terminal 9 is supplied with an external complex color video signal from a video device such as a VTR or a video disk player. The external composite color video signal from the input terminal 9 is supplied to the first switch circuit 7.

In the first switch circuit 7, the color video signal is switched in accordance with the control signal output from the microcomputer 4 in accordance with the source switching command of the remote control transmitter 6 or the key switch 5. . That is, one of the composite color video signal from the intermediate frequency signal processing circuit 8 or the external complex color video signal from the input terminal 9 is selected by the first switch circuit 7.

The composite color video signal output from the first switch circuit 7 is supplied to the Y / C separation circuit 10.

In the Y / C separation circuit 10, the selected composite color video signal is separated from the luminance signal Y, and the red and blue difference signals RY and BY, and the blur signal Y and the color difference signals RY and BY are separated by A / D. While supplying to the conversion circuit 11 and the second switch circuit 12, respectively, a vertical simultaneous signal separated from the luminance signal is supplied to the microcomputer 4.

The luminance signals Y and the color difference signals RY and BY supplied from the Y / C separation circuit 10 across the second switch circuit 12 are supplied to the color image processing circuit 13 to provide three primary color signals, R and G. And B are demodulated, and these three primary color signals R, G, and B are supplied to the color CRT 14 to display a color image.

On the other hand, the A / D conversion circuit 11 performs A / D conversion on the luminance signal Y, the color difference signal R-Y, and B-Y supplied from the Y / C separation circuit 10, respectively. One field (possibly one frame) of the digital luminance signal and both digital color difference signals from the A / D conversion circuit 11 is a field memory (video RAM) designated by the controller 16 (frame memory is also possible). It is sequentially written to the address of (15). This memory 15 is used when performing straw display in accordance with commands from the remote control transmitter 6 or the key switch 5.

Then, when the channel switching command or the source switching command for switching the channel of the television signal from the remote control transmitter 6 or the key switch 5 is input to the microcomputer 4, the control from the microcomputer 4 is controlled. The signal is supplied to the controller 16.

The controller 16 writes and reads digital video signals (digital luminance signals and both digital color difference signals) in the memory 15 in accordance with a control signal from the microcomputer 4, and a second switch circuit. Control the switching of (12). The controller 16 stops (freezes) the digital video signal after writing it into the memory 15 for one field period in accordance with the control signal input thereto. Thus, in the memory 15, the digital video signal for one field of the last odd or even field (the odd number is set by either of the microcomputers 4) is stored. The controller 16 reads out this digital video signal, performs D / A conversion by the D / A conversion circuit 17, obtains the luminance signal Y, the color difference signal RY, BY, and the second switch circuit 12. To feed. The controller 16 supplies a switch switching signal to the second switch circuit 12 so that the luminance signal Y from the D / A conversion circuit 17, the color difference signal RY, BY, and the like are the color image signal processing circuits. To (13).

The luminance signal Y, the color difference signals R-Y, and B-Y are demodulated by the video signal processing circuit 13 as three primary color signals R, G, and B, and are supplied to the color CRT 14 to perform strobe display.

Then, a digital video signal corresponding to one field of odd or even fields in the memory 15 is read out, for example, seven fields displayed on the color CRT 14 as a strobe display composed of seven still images, for example. During the period, the switching operation of the input color video signal is performed. In this switching operation, for example, in the case of a television signal, the frequency of a new channel is locked by the PLL circuit 3 and a new television signal is introduced. When the input source of the composite color video signal is changed, the switching between the television signal and the external composite color video signal from the video device is performed. Therefore, the disturbed image by the synchronized flow or the black image to which the blocking has been applied is not displayed, and it can provide a comfortable user feeling to a user. In addition, this operation is performed by the software of the microcomputer 4 which controls the memory 15, and the burden of software is small, and it can implement it without cost increase.

After the digital video signal in the memory 15 is read out for seven field periods, one field equal to the above-mentioned odd number of digital video signals is written into the memory 15 within one field period, and then the writing is stopped. Then, the digital video signal is read out over the seven field periods, and strobe display is performed on the color CRT 14.

In addition, in the above-described embodiment, the second switch circuit 12 receives the luminance signal Y from the Y / C separation circuit 10, the color difference signals RY and BY, and the D / A conversion circuit 17 from the second switch circuit 12. FIG. Although the luminance signal T and the color difference signal RY and BY are switched, the present invention is not limited thereto. For example, as shown in FIG. 2, the output terminal of the D / A conversion circuit 17 is directly connected to the color image signal processing circuit ( 13). That is, the control signal from the microcomputer 4 stops writing of the digital video signal to the memory 15 input to the controller 16, reads the digital video signal in the memory 15, and converts the D / A conversion circuit. The D / A conversion is performed by (17). At the same time, a control signal is supplied from the controller 16 to the color image signal processing circuit 13 to apply blanking. The video signal subjected to the blanking may be superimposed on the video signal from the above-described D / A conversion circuit 17 to display a still image on the color CRT 14.

Next, the operation of this embodiment, particularly the operation during strobe display, will be described with reference to the flowchart of FIG.

First, in step ST-1, by the vertical synchronization signal detection means of the microcomputer 4, it is judged whether or not the detection of the vertical synchronization signal separated from the luminance signal Y in the Y / C separation circuit 10 is performed. When a signal is detected, the process proceeds to step ST-2, and when no signal is detected, the process returns to step ST-1.

In step ST-2, the count value of the counter (counter means) for counting the vertical synchronization signal of the microcomputer 4 is added by one each time the vertical synchronization signal arrives at zero. In this case, it is determined from which the vertical synchronization signal of the odd or even field is to start counting the vertical synchronization signal.

In step ST-3, the count value detecting means for detecting the count value of the counter of the microcomputer 4 determines whether or not the count is 8, and when the count value of the counter reaches 8, the process proceeds to step ST-4. If no, 8, the process proceeds to Step ST-6.

In step ST-4, the counter control means of the microcomputer 4 sets the count value of the counter to 0 (reset) and proceeds to step ST-5. In step ST-5, the instructing means of the microcomputer 4 indicates the start (freeze) (and thus the end of reading) of the writing of the digital video signal (digital luminance signal and both digital color difference signals) to the memory 15, After instructing the controller 16, the process returns to step ST-1.

In step ST-6, the count value detecting means for detecting the count value of the counter of the microcomputer 4 determines whether the count value of the counter is 1, and when the count value of the counter is 1, the step ST-7 is determined. If it is not 1, the process returns to Step ST-1.

In step ST-7, the instruction means of the microcomputer 4 instructs the controller 16 of the end of the writing (freeze) (and thus the start of reading) of the digital video signal against the memory 15. Return to ST-1.

According to the above-described television receiver, since the odd number of the fields of the video signal stored in the storage means 15 is fixed to either the odd or even field, fluctuations in the vertical direction of this image at the time of strobe display are avoided.

According to the present invention described above, a television receiver can be obtained in which fluctuations in the vertical direction of the image at the time of strobe display are avoided.

Claims (1)

A channel switching section for demodulating a received channel and demodulating a received interlaced video signal, means for detecting a vertical synchronization signal in the video signal, and one field of the video signal The storage means to control the storage means, the counter for counting the detected vertical synchronization signal, and the storage means to write the video signal in a period from the output of the counter to the time of being reset to 1, When the output is 1, writing of the video signal is finished, and the storage means is controlled to read out the stored video signal repeatedly, and the output of the counter is given a predetermined count value 2n (where n = 1, 2, 3). And control means for resetting the counter and controlling the storage means to finish reading the video signal and start writing the video signal. A television receiver for strobe display, characterized by the above-mentioned.

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