KR960013225B1 - Channel equalization circuit for high definition tv - Google Patents

Abstract

The circuit controls the channel equalizing operation by utililzing a channel converting signal from the TV receiver or the remote controller. An equalizer filter(10) is for the equalizing-filtering of the received signal. A blind equalizing filter(20) is for blind-filtering the output signal from the equalizer filter. The output of the blind equalizing filter is equalized with the input from the equalizer filter. A direct decision equalization carrier recovery block(50) recovers the received signal and provides the coefficient, and a derotator(40) for recovering the output of the equalizer filer to the original signal. A selective control means outputs a control signal to select the output signal of the direct decision equalizer and the blind equalizer. A selection means chooses the output signal from the blind equalizer and direct decision equalizer.

Description

Adaptive High Definition TV Channel Equalization Circuit

1 is a channel adaptive circuit of a conventional adaptive high definition TV.

2 is a channel equalization circuit of an adaptive high definition TV according to the present invention.

* Explanation of symbols for main parts of the drawings

61: selection control means 60: equalizer selection logic

G1: logic element

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a channel equalizer circuit of an adaptive high definition television (HDTV). In particular, a channel equalization of a received signal is performed by using a two-level equalizer. It relates to a channel equalization circuit for.

In general, there are two types of adaptive equalization in high definition TVs. One of them uses the LMS (Least Mean Square) algorithm, and the other one uses the blind algorithm. High-definition TVs using the double-blind algorithm include DigiCipher high-definition TVs and ADTV (Advanced Digital Television). For more efficient channel equalization, ADTV uses channel equalization of blind equalization and decision-directed equalization to perform channel synchronization of received signals. At this time, the blind equalizer and the direct correction equalizer are selectively operated according to the noise state of the received signal. That is, the blind equalizer operates to compensate the error of the received signal from the initial convergence stage without using the training signal transmitted during the training period, which is a period for transmitting a known signal to the receiver. The crystal equalizer has a weak property for catching, but has better performance when the open eye is open, and operates to compensate the received signal with some error adjusted by the blind equalizer.

The channel equalization circuit of the conventional adaptive high definition TV using the blind equalizer and the direct crystal equalizer described above will be described in detail with reference to FIG. When a signal received through a tuner (not shown) is applied to the channel equalization circuit, the equalizer filter 10 equalizes the average value of the original signal output from the selecting means 70 to the received signal. Equalization filter. However, in the initial convergence stage, the assimilation filter 10 and the equalizer selection logic 60 are operated so that only the blind equalizer 20 is operated until the error is sufficiently small (when the eye patten is opened). It works. Selection means 70 feeds back the signal output from the blind equalizer 20 to the equalization filter 10 only by the selection control signal output from the equalization selection logic 60.

The equalization selection logic 60 calculates an error value output through the derotator 40 and transmits a control signal to the selection means 70 so that the signal output from the blind equalizer 20 is selected as described above. Output During this period, the blind equalizer 20 continues the equalization operation to compensate for the error of the received signal as described above.

As a result of the calculation by the equalization selection logic 60, if the error between the average value of the received signal and the original signal is small enough to open the eye opening, the equalization selection logic 60 is directly connected to the selection terminal S of the selection means 70. A selection control signal is output so that the output signal of the crystal equalizer 30 is tracked by the equalization filter 10. At this time, the Decision-Direct Equalization Carrier Recovery (50), which has not been operated during the period in which the blind equalizer 20 is operated, is operated to convert the signal received through the derotator 40 into the state of the original signal. It is restored to and output to the next trellis decoder (Trellis Decoder).

In this channel equalization operation, if the channel characteristic is greatly changed, the error between the received signal and the average value of the original signal increases, so that the blind equalizer 20 works as in the initial convergence step, and the error as described above. If it is small enough, the operation of performing direct decision equalization on the actual data is repeatedly performed. Here, the channel characteristics include a change in the position where the TV is placed, a change in the climate, a change in the time axis of the channel characteristics due to a moving object (for example, an airplane), and a channel change due to a channel change, but are large enough to use a blind equalizer. Most of the change is caused by channel switching.

The channel equalization work according to the channel change has a problem that the work speed is slow compared to the data rate due to the limitation of hardware or algorithm.

Accordingly, an object of the present invention is to control channel equalization by using a channel telephone signal output from a TV main unit or a remote controller (remote control, also known as a remote controller) in order to make channel equalization faster in adaptive high definition TV. In providing an equalization circuit.

In order to achieve the above object, the present invention provides an adaptive high-definition TV channel equalization circuit, comprising: an equalization filter for equalization filtering on a received signal, and a magnitude of an error between an average value of the received signal and the received original signal. A blind equalizer that equalizes until the open eye is opened, a direct crystal equalizer that performs equalization when the open eye is opened, and a result value equalized by the blind equalizer determines whether or not the magnitude of the error is equal to ten open eyes. Selection control means for outputting a control signal for selecting a signal output from the direct decision equalizer by the channel equalization signal applied from the blind equalizer, and a blind equalizer and direct decision equalizer according to the signal output from the selection control means; Adaptation consisting of selection means for selectively outputting the signal output from the equalization filter Provides a channel equalization circuit of high definition TV.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

2 is a channel equalization circuit of an adaptive high definition TV according to the present invention. 2 shows an equalization filter 10 for equalizing and filtering the received signal, a blind equalizer 20 for blind equalizing the signal output from the equalization filter 10 as an input signal, and an equalization filter 10. A direct-crystal equalizer 30 for equalizing blind equalized substantial data using the signal output from the input signal as an input signal, and a direct-crystal equalizer for providing the coefficients of the direct-determination equalizer 30 and restoring the received signal. The trellis decoder (not shown) restores the signal output from the equalization filter 10 to the original signal by the signal output from the carry restorer 50 and the direct crystal equalization carry restorer 50. By the derotator 40 for outputting the signal, and the result of calculating the error value of the average value of the original signal and the signal received by the signal output through the derotator 40 and the channel switching signal applied from the outside. specification Selection control means 61 for outputting a control signal for selecting output signals of the blind equalizer 10 and the direct crystal equalizer 30, and a signal output from the selection control means 61 is a selection control signal. It is applied to the input terminal (S) and comprises a selection means 70 for selectively outputting the signal output from the blind equalizer 20 and the direct crystal equalizer 30 as the filtering coefficient value of the equalization filter 10.

In particular, the selection control means 61 outputs from the equalization selection logic 60 and the equalization selection logic 60 which outputs the result of calculating the error value of the average value of the received signal and the original signal as the equalizer selection control signal. And a logic element G1 for outputting the output signal to the selection control signal input terminal S of the selecting means 70 as the input signal and the channel switching signal applied from the outside.

Next, an operation process of the channel equalization circuit according to the present invention will be described with reference to FIG. 2. 3, the equalization filter 10, the blind equalizer 20, the direct crystal equalizer 30, the derotator 40, the direct crystal equalization carrier restorer 50, and the selection shown in FIG. Since the means 70 is substantially the same element performing the same function, a detailed description thereof will be omitted. When the channel switching control signal is applied by the user through the front panel or the remote controller of the main body, a high level signal is applied to one input terminal of the logic element G1 of the selection control means 61. The logic element G1 is a logic sum element OR gate, and outputs a high level regardless of the level of the input signal applied to the other input terminal when the input signal of one input terminal is high level. Therefore, when the channel switching control signal is applied, the selection control means 61 outputs a high level to the selection means 70 irrespective of the error calculation result made by the equalization selection logic 60.

Accordingly, the selecting means 70 outputs the signal output from the blind equalizer 20 as the filtering coefficient value of the equalization filter 10 so that the channel equalization signal is applied and the blind equalizer 20 is operated. In this case, the channel switching signal applied to the logic element G1 becomes a high level only when the channel telephone signal is generated. Since the average value of the signal received by the compensating action of the blind equalizer 20 and the original signal is opened, the high level is output from the equalization selection logic 60 to the control terminal S of the selection means 70 until the open eye is opened. The selecting means 70 continuously outputs the signal output from the blind equalizer 20 to the equalization filter 10. The equalization selection logic 60 outputs a low level and the logic element G1 outputs a low level to the control signal input terminal S of the selecting means 70 when the result of the calculation of the error value reaches the opening point of the eye opening. Therefore, the signal output from the direct decision equalizer 30 is output as a filtering coefficient value of the equalization filter.

The logic element G1 of FIG. 2 may be changed to another logic element according to the level change of the applied logic signal. For example, when the signal output from the equalization selection logic 60 is at a low level, the selecting means 70 selects a signal output from the blind equalizer 20 and is applied when a channel switching signal applied from the outside occurs. When the logic level is a low level, the above-described logic device G1 may be replaced with a logical product. In addition, the selection means 70 described above may use a general multiplexer.

As described above, the present invention enables the blind equalization to be performed immediately without performing the process of calculating the error values of the received signal and the original signal during channel equalization by channel switching, so that the screen can be restored to high quality in a shorter time. There is an advantage to provide a two-level channel equalizer.

Claims (7)

An adaptive high-definition TV channel equalization circuit for performing two levels of equalization on a received channel signal, comprising: an equalization filter 10 for equalizing and filtering the received signal and the received signal and the received original signal. A blind equalizer 20 which equalizes an error with an average value of until the size opens the eye opening; A direct crystal equalizer 30 which performs equalization following the blind equalizer 20 when the opening degree is opened; According to the result value equalized by the blind equalizer 20, it is determined directly by the blind equalizer 20 based on a value that determines whether the magnitude of the error is equal to the opening degree of the eye or by a channel switching signal applied from the outside. Selection control means (61) for outputting a control signal for selecting a signal output from the equalizer (30); Selection for selectively outputting the signals output from the blind equalizer 20 and the direct crystal equalizer 30 by the signals output from the selection control means 61 as equalization coefficient values of the equalization filter 10. Adaptive high-definition TV channel video circuit, characterized in that consisting of means (70). The equalization selection logic (60) according to claim 1, wherein the selection control means (61) outputs a value for determining whether the magnitude of the error is equal to ten opening eyes by a signal output from the equalization filter (10). And a logic element G1 for logical combination using the signal output from the equalization selection logic 60 and the channel switching signal as an input signal and outputting it as a selection control signal of the selection means 70. An adaptive high definition TV channel equalization circuit. The adaptive high-definition TV of claim 2, wherein the logic element G1 is operated by prioritizing the channel switching signal among the channel switching signal and the signal output from the equalization selection logic 60. Equalization circuit. 3. The adaptive high-definition TV channel equalization circuit as claimed in claim 2, wherein the logic element (G1) comprises an element for performing a logical sum of the channel switching signal and the signal output from the equalization selection logic (60). The method of claim 4, wherein the selection means (70) is a signal output from the blind equalizer (20) and the signal output from the direct crystal equalizer (30) by the output signal of the selection control means (61) An adaptive high-definition TV channel equalization circuit, characterized in that consisting of a multiplexer to selectively output. 3. The adaptive high-definition TV channel equalization circuit as claimed in claim 2, wherein the logic element (G1) comprises an element which logically multiplies the channel switching signal by the signal output from the equalization selection logic (60). The method of claim 1, wherein the selection means (70) is a signal output from the blind equalizer (20) and the signal output from the direct crystal equalizer (30) by the output signal of the selection control means (61) Adaptive high-definition TV channel equalization circuit, characterized in that consisting of a multiplexer for selectively outputting.