KR960004060B1 - Bank choosing pre-assembling method of multi-memory bank system - Google Patents

Abstract

The memory bank is selected according to the subroutine call data of an assembler program. The method comprises the steps of: (A) storing bank positions of subroutines on a bank table; (B) checking the end of a source code; (C) checking the starting line of a subroutine; (D) storing the name of the subroutine and checking the subroutine call request; (E) transmitting the data stored in an input buffer to an output buffer when no subroutine call request is detected and otherwise, checking that the called subroutine is in a specific bank; and (F) generating an intermediate program according to result of the step (E) .

Description

Bank-selection preassembly method for systems with multiple memory bank structures

1 is a general memory bank structure diagram.

2 is a block diagram of a system for selecting the memory bank of FIG.

3 is a flowchart of a conventional program creation.

4 is a program of a memory bank created by the creation flow of FIG.

5 is a flow chart of programming according to the present invention.

6 is a link information table according to the present invention.

7 is a control flowchart of a preassembler according to the present invention.

8 is an intermediate program written by the preassembler of FIG.

The present invention relates to a method of controlling a memory bank of a system using a microcomputer, and more particularly, to a preassembly method for a microcomputer having a multi-memory bank structure.

In general, a bank control circuit is generally used to expand an address area of a memory in a system using a central processing unit (Micro-processor) having a small addressing space.

For example, in the case of 16 bits (Central Processing Unit), 64Kbyte of memory can be accessed. At this time, a method of expanding the size of the memory without replacing the CPU is to use a memory bank, as is well known.

As is known from FIG. 1, when the CPU address is OOOOH-FFFFH, the memory bank has a first RAM and a first ROM as a first bank, and is parallel to the first ROM. The second ROM is connected to select the first bank and the second bank as the second bank.

When configuring a memory bank with a memory map as shown in FIG. 1, a circuit for selecting a bank by decoding an input / output (I / O) signal output from a CPU should be configured.

2 is a well-known system block diagram for selecting a memory bank of FIG. 1, where 10 is a CPU, 12 is an I / O decoder, 14 is a bank register, 16 is a memory decoder, 20 and 22 are first and second ROMs; 18 is the first RAM.

In order to select the same bank as the first diagram, a bank selection signal must be generated as the memory decoder 16 as shown in the second diagram by allocating one or more I / O bits called banks. Shows an example of allocating one bit A15 for this convenience).

When the first ROM 20 and the first RAM 18 are used in the same system as the second diagram, Bank = 0 (A15) is used to select the first ROM 20 by the memory decoder 16 circuit. At this time, the second ROM 22 is not selected. If the second ROM 22 is to be used while the first ROM 20 is used, Bank = 0 (A15) is used to select the second ROM 22 by the memory decoder circuit 16 of FIG. At this time, the first ROM 20 is not selected. In the case of using the bank, only the first ROM 20 and the second ROM 22 may be used exclusively as described above.

In the case of configuring the bank selection system as shown in the second diagram, even if a subroutine in any of the first ROM 20 or the second ROM 22 is called from the first RAM 18, the desired bank is previously selected. If you choose it, you can use it without any problem. However, the first ROM 20 cannot call (Subroutine) of the second ROM 22 in the program.

This is because the second bank must be selected from the first bank before calling the subroutine from the first ROM 20 to the second ROM 22. If the bank is changed, the next instruction CPU in the first ROM 20 ( 10) can no longer be performed.

In general, a programmer who writes a program considers this and designs software so as not to call a subroutine directly between the first ROM 20 and the second ROM 22. Otherwise, in order to solve this problem, the same instruction may be made at the same address of both the first and second ROMs 20 and 22 and the bank may be selected. However, it is very difficult to write all programs in consideration of the above situation because general program is developed by the same writing flow as the third diagram. That is, when developing a program having a large program size, it is very complicated, and when it is necessary to change the bank positions of subroutines in the near-developed state, much effort is required to fix the program.

Accordingly, an object of the present invention is to provide a pre-assembler for automatically performing memory bank selection control by transforming program data written by a programmer according to call position information of a subroutine in each program routine. .

Another object of the present invention is to provide a pre-assembly method of automatically generating an intermediate program as an link information table and automatically selecting a memory bank.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

4 shows an example of a program written in the same bank circuit as in FIG. 1, which is shown to make the operation of the present invention easier.

It is assumed that (a) has a command (Command; Routine) for calling the subprogram SUB1 as a main program, which is stored in the first RAM 18.

(b) has a command (Command; Routine) programmed to call the subprogram SUB2 as the subprogram SUB1, which is located in the first ROM 20, and (c) the second ROM 22 as the subprogram SUB2. ) Is a program. In this case, the first ROM 20 is the first bank BANK0 and the second ROM 22 is the second bank BANK1.

5 is a flow chart for creating a program according to the present invention, which generates an intermediate program as a link information table of a source program, generates an object code as the intermediate program, and links using the link information. .

6 is a link information table according to the present invention, in which the first RAM 18 and the first ROM 20 are the first bank BANK0 and the second ROM 22 in FIGS. 1 and 2 described above. ) Is a link table when it is assumed that the second bank BANK1 is.

7 is a flowchart of a pre-assembler according to the present invention.

FIG. 8 is an intermediate program written to call different banks by FIG.

Hereinafter, the operation of preassembly according to the present invention will be described in detail.

If the system of FIG. 2 is operated while being stored in the first RAM 18 and the first and second ROMs 20 and 22 of the source program FIG. In FIG. 7A, the link information table as shown in FIG. 6 is read, and the bank position of each subroutine is recorded in the bank table set in the internal memory area. Then, in step 7b, the first line data of the source program of (a) of the source program as shown in Fig. 4 (a), (b), (c) is read first to find out whether it is the end of the source program. Store one line of the program in the input buffer.

In step 7d, it is checked whether the subroutine is started. In step 7f, the name of the subroutine is stored in a buffer (C-sub-name; Call-sub Routine Name Buffer). Check if you have a call command.

If the subroutine call instruction is performed in step 7g, the subroutine to be called in step 7i is searched for in the bank stored in the C-Sub-name. At this time, since the subroutine call command (Call SUB) of FIG. 4 (a) is included in the same bank, the above-described process is repeated in step 7b.

On the other hand, if it is not the start of the subroutine in step 7e and does not have the instruction of the subroutine in step 7g, the CPU 10 repeats the above-described step 7b after recording the contents of the input buffer in the output foil in step 7h. .

When the subroutine 5a (Call SUB2) of FIG. 4 (b) is detected by repeating the above process, the start of the subroutine is detected in step 7e and the name of the subroutine is checked in step 7f. Store in the C-Sub-name buffer.

In step 7g, it is checked whether the call instruction is included. If the call instruction is executed, it is checked whether the subroutine to be called in step 7i is in the same bank as the C-Sub-name.

At this time, it is determined that the bank of the subroutine SUB1 is the first bank BANK0 and the subroutine SUB2 is the second bank BANK1 (see the bank information table of FIG. 6), and generates an intermediate program in step 7j.

In step 7j, the CPU inserts the following four commands into the output file:

1. Record the bank bit information of the place to go to mem1, that is, the bit information of the second bank BANK1,

2. Write the start address of the second ROM 22, which is the address information of the location to mem2,

3. Record the bank bit information to return to mem3,

4. Set the call switcher information to generate the output file as shown in FIG.

Thereafter, the process jumps to the process shown in FIG. 7B to be repeated to create an intermediate program for another subroutine.

A pre-assembler as shown in FIG. 7 converts a source program as shown in FIG. 4 (a) (b) (c) into a program having the same flow as in FIG. As a result, a new switcher routine, an intermediate program as shown in FIG. 8 (d), is newly entered (this switcher routine is allocated to the available RAM area regardless of the bank) and replaced with a few instructions. When calling the subprogram SUB1 (SUB1 is included in the first ROM 20 or BANK0) from the main of the changed program (Main is always available regardless of the bank), it is still different. This can be done without any problem, but the subprogram SUB2 is called when the subprogram SUB2 (SUB2 is in the second ROM 22 or BANK1) is called in a different bank. Before calling, it saves BANK1 of SUB2 and BANK0 to return to mem1 and mem3 respectively, saves address of SUB2 to mem2 and calls the switcher. There, select the bank of mem1 previously stored, select the second ROM 22, then call the subprogram SUB2, finish execution of the subprogram SUB2, and return to the original subprogram SUB1 when returned. To return, select the bank stored in mem3 (select the first ROM 20) and a Return operation takes place. In this way, the SUB1 subprogram SUB2 returns to the subprogram.

Claims (2)

A first bank in which program data for calling a subroutine is stored; and a program of a subroutine initiated by a call instruction of a subroutine of the first bank is stored to select one of the first bank and the second bank; A method of pre-assembling a bank of a system having a multi-bank structure having a control unit for operating the system, the method comprising: a first process of reading link information and storing a bank position of each subroutine in a bank table; A second step of reading information at the end of the source by reading information, and storing the first line of the source program read in the input buffer when the second step ends and ends the search result source and starts the subroutine. Storing the name of the subrouting in an internal buffer when it is determined that the third process of searching for authorization is the start of the search result subroutine of the third process; Search for whether there is a call command, and if the subroutine is not the start, immediately detects whether there is a call command, and if it is determined that there is no call result call command of the fourth process, the contents of the input buffer are immediately written to the output buffer. And a fifth step of searching whether the called subroutine is in the same bank as the internal buffer when determining that there is a call instruction, and returning to the second step when determining that the call is not the same bank as the search result of the fifth step, And a sixth step of generating an intermediate program when switching to the bank. The method of claim 1, wherein the fifth process includes the bank bit information and the address information from the bank of the routine having the instruction to call the subroutine to the bank of the subroutine to be called, and the bank bit and the call change bit to be returned to an internal predetermined area. The process of recording.