KR950007498A

KR950007498A - Frame conversion device of video signal

Info

Publication number: KR950007498A
Application number: KR1019930015367A
Authority: KR
Inventors: 이동호
Original assignee: 이헌조; 주식회사 금성사
Priority date: 1993-08-07
Filing date: 1993-08-07
Publication date: 1995-03-21

Abstract

본 발명은 영상신호의 프레임 포맷간의 변환에 관한 것으로, 현재 세계적으로 존재하는 에치디티브이(HDTV)의 프레임 혹은 필드율 50, 60, 59.94Hz 3가지가 있다.The present invention relates to the conversion between video signal frame formats. There are three frame or field rates of HDTV currently present in the world.

따라서, 60Hz의 필드율을 채택하는 뮤즈방송과 59.94Hz를 채택하는 인터리브(interleave)와 프로그레시브(progressive)의 두가지 영상포맷간에 서로 변환할 수 있는 장치가 필요하다.Therefore, there is a need for a device capable of converting between two video formats, muse broadcasting employing a 60 Hz field rate and interleaved and progressive progressive employing 59.94 Hz.

이에 따라, 본 발명은 프레임 포맷의 상호 변환을 위해 선입선출 메모리와 프레임 메모리 및 이를 제어하는 장치에 의해 상호 변환이 가능하게 한 것이다.Accordingly, the present invention enables the first-in-first-out memory, the frame memory, and the apparatus for controlling the same for mutual conversion of the frame format.

Description

Frame conversion device of video signal

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도(가)는 60Hz영상을 59.94Hz로 변환하는 본 발명의 영상신호의 프레임 변환장치의 구성도,1A is a block diagram of a frame conversion apparatus of a video signal of the present invention for converting a 60 Hz video to 59.94 Hz;

제1도(나)는 제1도(가)의 선입선출 제어부(2)의 기능적 구성도,FIG. 1 (b) is a functional configuration diagram of the first-in, first-out control unit 2 of FIG.

제2도는 제1도의 동작에 따른 타이밍도,2 is a timing diagram according to the operation of FIG.

제3도(가)는 59.94Hz영상을 60Hz로 변환하는 본 발명의 영상신호의 프레임 변환장치의 구성도,3A is a block diagram of a frame conversion apparatus of a video signal of the present invention for converting a 59.94 Hz video to 60 Hz;

제3도(나)는 제3도(가)의 메모리 제어부(12)의 기능적 구성도,FIG. 3B is a functional diagram of the memory controller 12 of FIG.

제4도는 선입선출 메모리(10)와 프레임 메모리의 제어 파형도,4 is a control waveform diagram of the first-in first-out memory 10 and the frame memory,

제5도는 제3도(가)의 각부 제어파형의 타이밍도.FIG. 5 is a timing diagram of each control waveform of FIG.

Claims

A first-in first-out memory 1 for storing and outputting one frame from a video signal input at 60 Hz, and a first-in first-out control unit for receiving a 60 Hz frame synchronization signal and resetting the first-in-first-out memory at the 1000th frame synchronization 2) and a 59.94 Hz synchronous signal generator (3) for generating a synchronous signal for a 59.94 Hz video signal.

The method of claim 1, wherein the first-in first-out control unit 2 compares a counter 2-1 that receives a frame synchronization signal of 60 Hz and counts it, and whether the output value of the counter 2-1 is 1000. A frame converting apparatus for a video signal, characterized by comprising a comparator (1-2) for outputting data.

A first-in first-out memory 10 for storing one frame of a 59.94 Hz video signal and outputting the same according to the storage order, and a frame memory 11 for receiving and storing frame data stored in the first-in first-out memory 10 and outputting at 60 Hz. ), A memory control unit 12 for controlling data input / output of the first-in first-out memory 10 and the frame memory 11, and a 60 Hz synchronization generator 13 for generating a 60 Hz video synchronization signal. Frame conversion device of the video signal.

The memory controller 12 of claim 2, wherein the memory controller 12 compares the counter 12-1 for receiving the frame synchronization and counting the number of frames with the counter 12-1 for counting 999. A frame converting apparatus of a video signal, characterized by comprising a comparator (12-2) for outputting data.

The first-in first-out memory according to claim 2 or 4, wherein the memory controller 12 stops reading the first-in first-out memory 10 at the 1000th frame synchronization and repeatedly uses the 999th frame data as the 1000th frame data. 10) and a frame converter for controlling a video signal, characterized in that for controlling the frame memory (11).

※ Note: The disclosure is based on the initial application.