KR950005167B1 - Rf amplifier for monolithic ic - Google Patents

Abstract

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Description

RF Amplifiers in Monolithic Integrated Circuits

1 is a schematic diagram of a conventional type high frequency RF radiofrequency amplifier of the prior art;

2 is a schematic diagram of a first embodiment of an integrated circuit RF amplifier according to the present invention;

3 is a schematic diagram of a second embodiment of the present invention modified to reduce the input load effect.

4 is a plan view of an arrangement in which an integrated circuit chip is used to realize the embodiment of FIG. 2 (the resistor 54 is included in the structure of the transistor Q3 of the present embodiment) (for example, a computer generated IC chip). Domain diagram

5A, 5B, and 5C are schematic circuit diagrams for the 10 mW version of the FIG. 3 embodiment, respectively, a plan view of the IC chip arrangement, and an exploded plan view of the center thereof.

6a, 6b and 6c correspond to FIGS. 5a to 5c for a 50 mW version of the FIG. 3 embodiment, respectively.

7a, 7b and 7c also correspond to FIGS. 5a to 5c for the 150 mW version of the FIG. 3 embodiment, respectively.

8 is a plot of typical power output for various input power levels of a new amplifier over the 10 MHz to 800 MHz frequency range.

9 is a plot of the operational efficiency of a novel amplifier over various applied bias currents over a frequency range of 400 MHz to 500 MHz.

* Explanation of symbols for main parts of the drawings

10: high frequency power amplifier 12: coupling capacitor

22: radio frequency choke 52: semiconductor wafer

70: bias resistor 72: bypass capacitor

FIELD OF THE INVENTION The present invention relates to wireless frequency amplifiers in integrated circuits, and more particularly to general purpose IC modules that can be used as IC " building blocks " to provide very good RF amplification in a variety of specific applications, including high frequency (e.g. It is about.

The radio frequency amplifier has at least two main functions. The first is to amplify the input RF signal with a given gain factor to produce a given output level, and the second is that the input and output RF signals have little or no mismatch in RF impedance (often at frequencies It must be effectively coupled inside and outside the amplifier at a predetermined RF frequency (above broadband). For example, the output amplified RF signal must be effectively coupled to the RF load coupled to the output terminal. When the amplifier is operated in a linear class (e.g., class A, class AB or class B) the output stage can transmit a certain amount of RF signal power to the load at a low level of acceptable signal distortion. Moreover, the output stage has a gain independent of the load impedance. A well-designed RF output amplifier stage should be made with performance specifications when it consumes low quiescent power, operates stably under all expected input and output conditions, and does not limit the frequency response of the amplifier. Unfortunately, certain (and other) known performance specifications are difficult to obtain simultaneously in high frequency operated RF amplifiers (eg in the hundreds of MHz and in the GHz range).

In high frequency RF communications equipment, many costs and circuits have typically required the design and construction of an intermediate amplifier stage capable of generating a significant amount of power to drive a high power output stage. At high frequencies, stability problems have to be practically provided with a gain of just 5 to 8 dB. Associated short-band limiting devices are typically expensive and damage valuable parts of modern RF communications equipment (miniaturized and minimized for many reasons). The stability problem is firstly caused by the undefined reflection feedback impedance related to the effective capacitance of the active element, in addition to the layout-dependent stray capacitance. Moreover, feedback capacitance (commonly referred to as ＂miller＂ capacitance) is one of the first causes of the input impedance of the amplifier to change, such as the load impedance that varies with frequency.

The effective capacitance between the collector and base structure of a bipolar junction transistor (or between the source and gate of a field effect transistor) is such that a relatively large effective capacitance (base element capacitance multiplied by a voltage gain of +1) is in parallel with the input to the transistor. Make it appear. The process of extending device capacitance and paralleling the input terminals is often referred to as the Miller effect. This Miller effect can reduce the unity gain crossover frequency (gain bandwidth product) of the actual transistor amplifier if the amplifier is not well designed. Since the Miller feedback capacitance amount is related to the short gain, such feedback capacitance increases as the short gain increases. In the case of a tuned load, the effective input capacitance can typically vary significantly. In the fabrication problem, the undefined capacitance is expensive to change from one amplifier to another and requires critical passive trimming or tuning of passive components.

Whenever the amplifier stage is used in battery operated equipment, additional DC power is required. Over DC current is typically required to ensure that the DC bias current in the RF amplifier stage at the appropriate level ensures that the desired RF output power is set (e.g., due to expected transistor gain variations between different devices in large scale manufacturing situations). The overcurrent is sometimes required to resolve the biasing change that has been made). Unfortunately, when induced in the battery power supply, the overcurrent greatly shortens the life of the power supply, thereby reducing equipment reliability and increasing equipment maintenance costs.

1 is a schematic diagram of one discrete high frequency power amplifier 10 of the prior art commonly used. The input signal is coupled to the amplifier 10 via a coupling capacitor 12 and matching network 14 (the purpose of which is to match the input impedance of the amplifier with the impedance of the signal source to transmit a more effective signal). The RF output of the amplifier 10 is coupled to the load 16 through another coupling capacitor 18 at the collector of the transistor 20. Amplifier 10 typically includes bipolar junction transistors 20, radio frequency (RF) chokes 22 (L1), bias voltage split resistors 24 and 26, and RF bypass capacitors, typically connected in a common emitter configuration. (28). Along with the bypass capacitor 28, the supply voltage V _CC is connected to the collector of the transistor 20 via the RF choke 22, which prevents the application of sufficient RF energy to the power supply.

When the circuit configuration shown in FIG. 1 is used in a wide variety of different applications, it also has many advantages, all of which are more critical when the operating frequency increases or when a given operating frequency band becomes wider. . The input and output capacitance of the amplifier 10 is unacceptably high due to the Miller effect described above. Moreover, input and output capacitances vary with the amplifier's instantaneous gain, load, signal level, and frequency. A trade-off of the amplifier 10 is made between stability and high gain which greatly limits the maximum power gain that can be expected. Moreover, the installation of amplifier 10 around integrated circuits presents another problem, as wire bond inductances result in critical and higher packaging costs at high power levels. Since the integrated circuit installation of the amplifier 10 typically requires the back side of the integrated circuit chip to be connected to the output terminal, a ground insulation technique is required to be used in the packaging of the IC chip.

Other high frequency amplification circuits are more suitable for the installation of integrated circuit types. For example, US Patent Application No. 4,240,041 by Hashimoto et al. (1980) discloses a high frequency amplification circuit that can be integrated onto a single semiconductor chip. The output transistors of the disclosed amplifiers are operated in class AB, class B or class C by setting the circuit parameters as desired. Moreover, the amplifier disclosed in the above reference can be placed on a chip with relatively few five leads. However, the disclosed amplification circuit inverts twice (ie, the output voltage is the same polarity as the input voltage), so that positive feedback from the output terminal to the input terminal has the potential to cause instability at high frequencies. Moreover, the amplifier gain is a complex function of the mutual conductance and relative bias bias of the various transistors used in the circuit. Finally, the bias resistors are made relatively small to mask the expected change in transistor gain, thereby consuming power.

Other embodiments of the prior art related to the present invention include the following (maybe more examples): US Patent Application No. 3,392,342 (1968) by Odor; United States Patent Application No. 3,626,313 to Juke (1971); US Patent Application Re. 30,297 (1980) by Whitlinger; No. 3,992,676 (1976) to Knight; United States Patent Application No. 3,942,129 (1976) by Hall; United States Patent Application No. 3,950,708 by Hall (1976); US Patent Application No. 3,952,257 (1976) by Skade II; United States Patent Application No. 4,028,631 to Amed (1977); United States Patent Application No. 4,140,977 by Ahmed (1979); US Patent Application No. 4,237,414 (1980); United States Patent Application No. 4,242,643 by Leich (1980).

The patents listed above disclose various bipolar junction transistor configurations that can be used in high frequency amplifier applications. For example, U.S. Patent Application No. 3,392,342 by Odor discloses a current mirror bias. Juke describes a current mirror amplifier with a cascaded output arrangement using scaled geometry for the input and output transistors, and Whitlinger describes a current mirror amplifier that holds the collector potential of the input and output transistors at the same level, Knight describes a current mirror amplifier similar to Wittlinger with its self-biased and cascaded output stage, and Knight represents a current mirror amplifier similar to Wittlinger with its own biased and cascaded output stage. U.S. Patent No. 4,028,631 to Ahmed, describes a current mirror amplifier with a collector-base shunted input bias resistor used to reduce input impedance.

Despite the novel advantages of integrated circuit technology and many prior art circuits as identified above, it is possible to accurately control the DC output current for a given DC input current to minimize the DC input power for a given RF output power. No monolithic (ie integrated circuit) RF amplifier building blocks have been developed that can provide very accurate, relatively high gain and power levels over a wide frequency band of RF. Moreover, most integrated circuit high frequency amplification stages that have been devised suffer from significant high frequency stability problems due to over input capacitance that varies widely with changes in load impedance. The critical manufactory trim of each device due to capacitance changes in the active amplifier device has typically required obtaining a certain gain factor in the past, and cascade stages are also typically used to drive RF power devices or modules when such trimming techniques are used. There is a need. Conventionally, integrated circuit building blocks that solve all of these problems with simplicity and low cost have not been used. If available, such building blocks may be used in the product line of various RF communication equipment, including mobile, compartmentalized and handheld battery communication equipment. Where such building blocks can achieve stability with high efficiency, they are ideally suited for a variety of different applications within such devices, such as RF preamplifiers, RF power drivers, RF power modules, and receive mixers or IF amplifiers. .

SUMMARY OF THE INVENTION The present invention provides an RF amplifier for a high frequency integrated circuit, wherein the amplifier provides accurate high gain over a wideband RF frequency, utilizes DC input power very efficiently, at very high RF frequencies (i.e. above 1 GHz). It is stable and has a sufficiently reduced input capacitance that is largely independent of the load impedance. In a very simple summary, the module of the new amplifier includes two cascade amplifier stages, the current gain followed by the voltage gain. The input current gain stage is biased by a current mirror device alternately supplied by a forward bias diode (e.g., shorted collector-base transistor) with a stable voltage drop across the bottom diode. The diode provides temperature compensation when maintaining a relatively low voltage across the current gain stage to minimize voltage swing across the cascode low voltage gain stage.

The amplifier according to the invention comprises four transistors well fabricated on the same semiconductor wafer (although the composite pads are connected in parallel to some four terminal points in order to maximize wire connection conductance or minimize inductance). Only four external access leads (ie, IC'pad ') can provide sufficient external access to the amplifier chip. Since only four connections are required externally, all modules can be very advantageously packaged in conventional four-lead “micro-X” IC packages / carriers.

The first and second transistors Q1 and Q2 are connected together in a current mirror configuration (i.e., the emitter regions of the first and second transistors are scaled, and the electrode is a current flowing through the second transistor Q2 to the first transistor Q1). Interconnected to be a plurality of currents flowing through). The first current mirror transistor Q1 operates to bias the second transistor Q2. The third transistor Q3 (collector-base short-circuit diode) provides a DC bias supply source for the first and second transistors coupled to the current mirror, while the second transistor Q2 (current gain stage) is suitably in the active region (unsaturated). Provide the correct voltage drop to work. The second transistor Q2 (common emitter current gain) and the fourth transistor Q4 (common base voltage gain) are connected together in a cascode configuration, and the voltage drop across the Q3 diode is connected to the collector-emitter voltage swing across Q4. Maximize the collector-emitter voltage swing across Q2 when maximizing.

As described, the second transistor Q2 provides a current gain, while the fourth transistor Q4 provides a voltage gain. The instantaneous current flowing through the fourth transistor Q4 is a function of the current flowing through the second transistor Q2. The operating point of the two amplifying transistor stages can be controlled simultaneously through the common bias terminal. Thus, according to a very accurate gain relationship set in the scaled geometry of the first and second transistors Q1 and Q2 (ie, current mirrors), the output signal power generated by the amplifier is directly controlled by the input signal level. The relatively high breakdown voltage is set across the fourth transistor Q4 by cascading the current gain stage Q2. Furthermore, it provides a relatively low input capacitance that does not vary much with load impedance, and the load capacitance does not echo back to the input of the fourth transistor Q4 at the RF load.

Because the new amplifier module is also an inverting amplifier (although it uses two cascoded gain stages), the likelihood that signal feedback between the output-to-input will cause oscillation is significantly reduced.

The output DC current is tightly controlled by the input bias current, so that power control is achieved without loss of efficiency. Extremely wideband operation can be achieved at relatively high and accurate gains (e.g., 15 dB gain at 900 MHz easily changes to 25 dB gain at 100 MHz).

Because of the excellent performance characteristics, simplicity and low cost of the IC amplifiers manufactured in accordance with the present invention, they can be combined nicely into one, so that they are not limited to RF communication circuits. Amplifiers can be used extensively.

Hereinafter, with reference to the accompanying drawings will be described in more detail the present specification.

2 is a schematic diagram of a first embodiment of a novel amplifier 50. The active element of the amplifier 50 is fabricated on a single integrated circuit semiconductor wafer 52 (using conventional integrated circuit placement and configuration techniques) and is external circuitd by only four terminals (i.e. IC pads) A to D. Is connected to. In a preferred embodiment, terminal A is a ground lead, terminal B is an input lead, terminal C is an output lead, and terminal D is a bias lead. Because of the small amount of leads required to connect the fabricated components on the wafer 52 with external components, the amplifier 50 utilizes fewer conventional four lead IC chip packages (e.g., a "microX" package carrier). Can be prepared. One possible chip arrangement is shown in FIG.

Four transistors Q1, Q2, Q3 and Q4 are fabricated on wafer 52 in the preferred embodiment. Although all the transistors shown in FIG. 2 are NPN bipolar junction transistors, PNP bipolar junction transistors or field effect transistors (FETs) may be used instead (in the latter case, the base-collector-emitter structure is conceivable. Gate-train-source FET structure as shown in FIG. In FIG. 2, the emitter of Q1 is connected to ground terminal A, while the base of Q1 is connected to the collector of Q1. The emitter of Q2 is connected to ground terminal A, while the base of Q2 is connected to the base (also collector) of Q1. Input terminal B is connected to the common connected base of Q2 and the base and collector of Q1.

Through the emitter resistor 54 (which is included as a transistor Q3 structure on the wafer 52 by fabricating the lossy junction electrode lead structure as desired, or preferably manufactured by some other conventional method or diffusion), the collector of Q1 is Q3. Is connected to the emitter of. The collector of Q3 is connected to the base of Q3, so that Q3 functions as a collector-base shorting diode. The bases of Q3 and Q4 are both connected to the DC bias input terminal D. The emitter of Q4 is connected to the collector of Q2, while the collector of Q4 is connected to the RF output terminal C.

In a typical application, RF signal source 56 is coupled to input terminal B through coupling capacitor 58 and conventional matching network 60. The coupling capacitor 58 prevents the DC level from being coupled between the input terminal B and the source 56, while the matching network 60 matches the input impedance of the source 56 against the input impedance generated at the input terminal B. do. The RF load 62 is connected to the output terminal C through a coupling capacitor 64 connected in series. The RF choke 66 is connected in series between the output terminal C and the power supply voltage V _CC to prevent the RF energy from flowing into the power supply. Bypass capacitor 68 is connected between V _CC and ground potential to provide RF ground. The bias resistor 70 is connected between V _CC and the bias terminal D. Optionally, the controlled bias current source is directly connected to supply terminal D. A relatively large bypass capacitor 72 connected between bias terminal D and ground potential causes bias terminal D to be at RF ground potential. Ground terminal A is directly connected to the DC and RF ground potentials.

Transistors Q1 and Q2 have a scaled geometry state to provide an accurate relationship between the DC current in the output amplifier stages Q2, Q4 and the input DC bias current. For example, if the emitter of transistor Q1 is manufactured to have a relative size of 10X, and the emitter of Q2 is manufactured to have a relative size of 100X, then the multiplied current MI bias flowing through transistor Q2 is the DC flowing through transistors Q3 and Q1. It is almost 10 times the input bias current Ibias (so M is equal to 10). The direct current " current mirror " relationship between the current and bias current of transistor Q2 (known) increases the overall efficiency of amplifier 50 and also allows direct control of the amplifier RE power output. For example, the quiescent point of the amplifier 50 can be changed by simply selecting the value (or current source) of the bias resistor 70. When the bias resistor 70 has a relatively small resistance value, the amplifier 50 operates in linear class A or class B mode. On the other hand, the amplifier 50 is set to operate in the class C mode by setting the resistance value of the bias resistor 70 to a relatively large value (ie, the load current is cut off except at the peak of the input signal). In this regard, the efficiency and predetermined classes of amplifier operation are easily adjusted to suit different applications.

The shorting collector-base junction of 3 can provide low input impedance to the source 56. This causes bias terminal D to be placed on the RF ground (due to the effect of external bypass capacitor 72) and a collector-base short circuit Q3 is generated at the input source as a short circuit (i.e. Forward biased to the ＂state. The low input impedance also causes the current gain transistor Q2 to be driven by a virtually low impedance source, so that only low voltage swings are present on the collector of Q2 (so that low feedback or H Miller mirror capacitance is applied to the input terminal B). Resistor 54 only reduces the load loss associated with transistor Q3 (in this embodiment, resistor 54 has a value on the order of 30 to 100 ohms).

Transistor (diode) Q3 also serves to bias the collector voltage of transistor Q2 to a value close to ground potential to maximize the output voltage swing at the collector of Q4. By maximizing the output voltage swing at Q4, the total output power of the amplifier 50 is maximized for a given amount of input DC power, increasing the efficiency of the amplifier. Efficiency is particularly important when the amplifier 50 is provided at the power supply voltage V _CC at the battery operated power supply.

Since the base of Q4 is also located at the RF ground potential (by the external bypass capacitor 72), the RF load impedance connected to the collector of the current gain stage Q2 is extremely low. Thus, any varying capacitance reflected to the base of Q4 by the Miller effect (eg, as a result of changing load impedance 62) does not echo differently to the base of Q2. As a result, extremely low miller capacitance is reflected at the input terminal B.

The input impedance of Q4 is very low because it is connected in a common base configuration. Furthermore, transistors Q2 and Q4 are connected to the cascode device so that high output impedance is applied to output terminal C to achieve a significant amount of voltage gain at transistor Q4. The cascode device (i.e., current gain amplifier Q2 which supplied voltage gain amplifier Q4) is also the RF of the module when the load 62 is the output impedance of the amplifier 50 and the mismatched impedance, tuning circuits, etc. In addition to the high breakdown low voltage across the output terminal, it causes a lower reflection of the change in impedance of the load 62 to the base of transistor Q4.

The additional power resistance characteristic of the amplifier 50 is derived from the peak rectification action occurring at the input terminal B. As the signal generated by the source 56 increases, a DC bias voltage is generated across the coupling capacitor 58 (or internal equivalent capacitance to the matching network 60) that causes a rectifying action at the base of transistor Q1. do. The DC bias voltage reduces the DC bias current in output stages Q2 and Q4, thereby increasing efficiency (ie, output RF power ratio to DC input power). By selecting a component value, the overall output RF power of the amplifier 50 can approach the theoretical maximum value for a given amount of DC input power.

The amplifier 50 is all inverting amplifiers (ie, an increase in voltage at the input terminal B causes a decrease in the voltage at the output terminal C). This is because the first stage Q2 of the common emitter is inverted, but the second stage Q4 of the cascaded common base is not inverted. Thus, there is no possibility that positive feedback occurs from the output terminal C to the input terminal B to oscillate the amplifier 50. Any feedback between the output terminal C and the input terminal B (since the feedback is negative or degenerate feedback) slightly reduces the amplifier gain, but increases the stability of the amplifier.

The amplifier 50 has relatively good temperature stability because transistors Q1 to Q4 are all well manufactured on the same wafer 52 using similar fabrication techniques. Any change in temperature that affects one transistor also affects the other three transistors in the same way (since each device has the same temperature coefficient). In some cases, the bias resistor 70 changes in resistance value with temperature changes. Also, the voltage drop between base-emitter across Q1 and Q2 varies slightly with temperature. However, it can be seen that these coefficients only change the Ibias value in a relatively small amount, resulting in good temperature stability without the need for special measurements to reduce the temperature change of the wafer 52.

Although bipolar NPN transistors are typically configured with an N-type initiator, it is preferable to use an P-type initiator to inject an N-type pocket into the P-type opening to act as a collector electrode. In this way, the IC wafer backside is directly grounded to simplify IC packaging, allowing improved thermal contact along the IC carrier.

3 is a schematic diagram of another improved (and soon preferred) embodiment of the present invention. The embodiment shown in FIG. 3 can identify that it is related to both the embodiment shown in FIG. 2 except that resistors 74 (R2) and 76 (R1) are added. Resistor 74 is connected between the base of Q1 and the collector (Q1 no longer has a base shorted directly to the collector). The register 76 is connected between the base of Q2 and the collector of Q1. Resistors 74 and 76 serve two purposes: (1) good isolation of the amplifier at the input source 56, and (2) a predetermined current mirror for transistors Q2 and Q1 despite such improved isolation. Keep matching.

In the embodiment shown in FIG. 2, input terminal B is coupled to the emitter of Q3 through resistor 54 (labeled R3 in FIG. 3). Q3 acts as a forward-biased collector-base short-circuit diode, appearing almost like a short circuit in the RF signal applied to input terminal B. The common connected base and collector of Q3 are connected to RF ground at bias terminal D (via bypass capacitor 72). If no isolation is provided between the emitter of transistor Q3 and input terminal B, overload of the input signal applied to input terminal B occurs under some circumstances.

Resistor 54 (which is conventionally a diffused integrated circuit resistor, or typically configured in the structure of transistor Q3) reduces the predetermined load loss associated with transistor Q3. However, another resistor 76 is connected in series (as shown in FIG. 3) between the emitter of transistor Q3 and input terminal B to reduce such load loss to further insulate the input terminal. In fact, resistor 76 prevents the input RF power from flowing too much into the collector-base short circuit diode Q3, thereby minimizing the source load to more efficiently utilize the RF current applied to input terminal B (the majority of the current then Flows through transistor Q2 as a useful RF input).

As will be described again, Q1 and Q2 are geometrically scaled within the current mirror configuration so that the current matches at a predetermined rate. Thus, resistor 74 is added to maintain the current match. The resistor 76 value is selected as required to provide sufficient input isolation. As will be described again, the area of transistor Q2 is M times the area of transistor Q1. Thus, the value of resistor 74 is chosen to be M times the value of resistor 76 to maintain a scaled current match relationship between transistors Q1 and Q2. (The two transistors are manufactured on the same substrate and operate at the same current density. Assuming that βQ1 = βQ2, which is generally as follows, the base current of Q2 is M times greater than the base current of Q1. If resistor 74 is configured to be M times larger than resistor 76, the voltage drops across resistors 74 and 76 are equal. In the general case, the resistance value of resistor 74 is configured to be N times larger than the resistance value of resistor 76, where N is the value of transistor Q1 on the IC chip arrangement to maintain current matching between transistors Q2 and Q1. This is the area ratio of area to transistor Q2.

The embodiment of FIG. 3 is shown for three specific maximum power levels in FIGS. 5A-5C (10 mW), 6A-6C (50 mW) and 7A-7C (150 mW). The schematics rewritten for FIGS. 5A, 6A, and 7A show the part values, and the IC pad connection terminals out of range with respect to the external ground and bias connection points A and D are shown. 5B, 6B, and 7B are schematic diagrams of chip placement at a first scale in which various IC pads are apparent. The central " working " portion of each IC chip arrangement is shown on an enlarged scale in 5c, 6c and 7c. Since a conventional IC manufacturing process can be used, no further detailed explanation is required.

A typical output power curve for the frequencies of 100 MHz to 800 MHz, which is the various input power levels, is shown in FIG. 9 shows a typical output power curve (and efficiency) of 400 MHz to 500 MHz for various bias currents. The input and output impedances typically measured over the frequency range of 50 MHz to 860 MHz are shown in Table 1 below.

TABLE 1

It is contemplated that the new RF amplifier module can provide some or all of the following desirable features.

If desired, the IC chip is suitable in four leaded microwave packages.

The backside of the IC chip is directly connected to ground potential, improving thermal coupling and simplifying IC packaging at the same time.

Multiple ground and bias IC pads are added to mitigate wire connection inductance / conductance issues.

Through simple external circuits, good bias control is provided to easily achieve class A, B or C amplifier operation.

Power level control is also achieved through the same simple bias control and the same external bias lead junction.

The input and output capacitors are even smaller (low miller capacitance).

Input and output capacitance are not strongly related to gain, load, signal level, or frequency (which can be controlled by device design).

Stable high gain factor (eg, 15 dB gain at 960 MHz compared to only 5 dB gain for a typical discrete component design).

While only a few embodiments of the invention have been described, additional and alternative embodiments and setup configurations will become apparent to those skilled in the art. For example, although all transistors described are NPN transistors, field effect transistors (such as gallium arsenide active elements) or PNP bipolar junction transistors can be used in their place. Moreover, in some situations, direct connections or other types of circuit elements may be substituted for resistors 74, 76 or 54 if desired. It is desirable to add an additional collector short-circuit diode in series with the one diode formed by transistor Q3 so that a higher supply voltage V _CC can be used in maintaining the capacitance of transistor Q2 at a receivable low level. As can be readily seen, one or more two terminal elements (ie, PN junction diodes) can be substituted for at least transistor Q3. Transistors Q1 and Q2 are fabricated on the same wafer to achieve the described current matching, but if desired, other circuit elements do not need to be included on the same wafer, so they can be discrete external devices for certain applications. Then, additional transistor structures are added (e.g., connected in parallel with any transistor structure shown in the embodiments to generate high power). Accordingly, the foregoing and all other alternatives continuing to realize at least a few novel forms of the invention do not depart from the scope of the following broad claims.

Claims (37)

It requires only four external electrical connections and directly connects an input signal terminal, an output signal terminal, a DC bias input terminal, a ground reference terminal, a base electrode directly conductively connected to the input signal terminal, and the ground terminal. A current-gain transistor amplifier in a single common-emitter configuration having an emitter electrode electrically connected, and a collector electrode connected in series with the current-gain amplifier means and directly conductively connected to the output signal terminal. A voltage-gain transistor amplifier means of a single common-base configuration, the series amplifier means being connected to collectively provide an output signal from a module of inversion or approximately 180 ° phase difference according to the input signal, and the DC bias input terminal. Setting DC bias current with each transistor amplifier means such as To the amplifier module of the monolithic integrated circuit with a DC biasing means coupled to said transistor amplifier means. 2. The apparatus of claim 1, wherein the current-gain transistor amplifier means has a common-emitter connected first transistor, and the voltage-gain transistor amplifier means has a common having an emitter electrode connected to the collector electrode of the first transistor. An amplifier module of a monolithic integrated circuit having a base connected second transistor. 3. The monolithic integrated circuit amplifier module of claim 2 wherein each of the transistors is a bipolar NPN transistor and each of the series amplifier means comprises a single transistor structure. Requires only four external electrical connections and is in series with an input signal terminal, an output signal terminal, a DC bias input terminal, a current-gain transistor amplifier connected to the input signal terminal and a ground terminal, and the current-gain amplifier And a voltage-gain transistor amplifier connected to the output signal terminal, the series amplifier being connected to the module to collectively provide an output from a module of 180 ° phase difference or inverted according to the input signal. A DC biasing means connected to each of the transistor amplifiers for the purpose of setting a DC bias current to an input terminal and the respective transistor amplifier, wherein the current-gain transistor amplifier comprises a common-emitter connected first transistor, The voltage-gain transistor amplifier of the first transistor A DC biasing comprising respective transistors comprising a common-base connected second transistor having an emitter electrode connected to the selector electrode, each transistor being a bipolar NPN transistor, and each series amplifier consisting of only a single transistor structure; The means is multipled by a coefficient M compared to the DC current flowing in the bias transistor, whereby a first bias transistor (also NPN transistor) connected to a current mirror device with the common-emitter first transistor for setting the DC bias current therein. And a second bias transistor connected to the base-collector diode device shorted with the DC bias input terminal and the first bias transistor to supply a DC bias current and minimize the voltage swing across the current-gain transistor amplifier. And bipolar NPN transistors) A first resistor connected in series between the first and second bias transistors, a second resistor connected in series between the common-emitter first transistor base and the first bias transistor collector, and a second resistor of the second bias transistor. An amplifier module of a monolithic integrated circuit connected in series between a base and a collector, said third resistor having a third resistance value approximately M times said second resistor. An AC signal amplifier, comprising: an input signal terminal, an output signal terminal, a DC bias input terminal, a ground reference terminal, a first transistor coupled to a DC bias terminal for setting a DC bias current through a second transistor and the input; First and second transistors connected to the current mirror configuration having a second transistor connected to the terminal and suitable for providing current gain amplification of the input signal received therefrom and, as a result, a DC bias terminal for setting the DC bias current. And another transistor connected in series to the second transistor to provide voltage-gain amplification of the current-gain amplified signal supplied therefrom to the second transistor, the other transistor being connected to the output terminal. An AC signal amplifier connected to provide a current and voltage gain amplified output signal. The AC signal amplifier of claim 5, wherein the forward bias diode structure and the series resistor connect a DC bias input terminal to the first transistor. The AC signal amplifier of claim 6, wherein the diode structure comprises a base-collector connection transistor. 6. The AC signal amplifier as defined by claim 5, wherein each of the transistors is a bipolar NPN transistor made of the same monolithic integrated circuit wafer. 8. The AC signal amplifier of claim 7, wherein each of the transistors is a bipolar NPN transistor made of the same monolithic integrated circuit wafer. As an amplifier, an input signal terminal, an output signal terminal, a DC bias input terminal, a ground reference terminal, and a first transistor and an input signal terminal connected to the DC bias terminal for setting the DC bias current flowing through the second transistor. First and second transistors connected to a current mirror configuration having a second transistor coupled to and suitable for providing current-gain amplification of an input signal received therefrom, and connected to a DC bias terminal for setting a DC bias current; Another transistor connected in series with the second transistor to provide voltage-gain amplification of the current-gain amplified signal supplied through the second transistor and connected to the output signal to provide a current and voltage gain amplified output signal; Each transistor is a bipolar NPN transistor made of the same monolithic integrated circuit wafer. Wherein the integrated circuit wafer has at least one electrical connection to be provided as each respective terminal, at least one of the terminals having a plurality of pads electrically connected in parallel. 11. The RF amplifier of claim 10 wherein the ground reference terminal includes a plurality of pads electrically connected in parallel. 12. The RF amplifier of claim 11 wherein the DC bias input terminals have a plurality of pads electrically connected in parallel. An RF amplifier comprising: an input signal terminal, an output signal terminal, a DC bias input terminal, a ground reference terminal, a first transistor coupled to a DC bias terminal for setting a DC bias current through the second transistor, and the input First and second transistors connected to the terminal and connected in a current mirror configuration having a second transistor suitable for providing current-gain amplification of the input signal received therefrom, and coupled to the DC bias terminal to set the DC bias current. And connected in series with the second transistor to provide voltage-gain amplification of the current-gain amplified signal supplied through the second transistor, and connected to provide current and voltage gain amplified output signals to the output signal terminals. A transistor, while a second transistor receives the DC bias set by the first transistor And a recombination resistor connected between the signal input of the second transistor and a DC bias for setting the first transistor. 14. The apparatus of claim 13, wherein the first and second transistors have a geometrically scaled structure to set a current multiplication ratio of 1: M, and the amplifier also includes a matching resistor included in a current mirror configuration and the recombination resistor. And a ratio between the recombination and the matching resistor, wherein M: 1 is maintained to maintain the M: 1 DC current ratio between the first and second transistors. 9. The second transistor and the other transistors in series provide the output AC signal collectively inverted according to the input AC signal or inverted with a phase difference of approximately 180 degrees. Amplifier. A monolithic integrated circuit RF amplifier for amplifying signals in excess of 100 MHz, wherein the amplifier is fabricated from a P-type semiconductor substrate primitive and generates an RF voltage that crosses an output that is directly conductively connected to an output terminal. A single voltage RF amplifying transistor proportional to the input RF current supplied in series to the input, and only one single transistor amplifier stage having an output connected in series with the voltage amplifier transistor output and electrically connected directly to the input RF. A current across the collective series-connected output of the amplifying transistor having a frequency in excess of 100 MHz in response to the input RF signal to a current gain that amplifies the signals and for controlling the current supplied to the voltage amplifier transistor. Single-Current RF Amplifier Transistor Provides Voltage-Gain-Amplified RF Signal , Monolithic integrated circuit for an RF amplifier having a biasing means connected to a common DC bias input for setting the stop bias current to the amplifying transistor of each voltage and current amplifying transistors substantially independent of the respective signal level. 17. The monolithic RF amplifier of claim 16 wherein the biasing means comprises at least a first transistor and the current RF amplifier transistor is connected in a current mirror configuration with the first transistor. A monolithic RF amplifier for amplifying signals above 100 MHz, the amplifier is fabricated from a P-type semiconductor substrate primitive and generates an RF voltage across an output proportional to the input RF current supplied in series with the output. A voltage amplifier amplifying transistor and a single transistor stage having an output coupled in series with the voltage amplifier transistor output and connected to a current gain for amplifying the input RF signal, the voltage amplifier transistor in response to the input RF signal. A single current RF amplifier transistor that provides current and voltage gain amplifier RF signals across the collective series-connected output of an amplifier transistor with a frequency in excess of 100 MHz to control the current supplied to the amplifier, and each amplifier and signal level. Almost independent of each voltage and current into the amplifying transistor Biasing means connected to a common DC bias input for setting a stop biasing current, said biasing means having at least a first transistor and said current RF amplifying transistor in a current mirror configuration with said first transistor; While the biasing means also comprises a resistor connecting the current RF transistor and the series RF junction of the diode and the first transistor connected in series with the first transistor to supply a bias current. Monolithic RF amplifier provided. An integrated circuit amplifier comprising an RF input terminal (B), a ground terminal (A), and a first transistor (Q1) having a base, a collector, and an emitter, wherein the base is connected to the collector and is connected to the input terminal. (B) is directly conductively connected, the emitter is coupled to the ground terminal (A), the emitter is connected to ground terminal (A), the base is directly conductively connected to the base of the first transistor A second transistor Q2 having a base, a collector and an emitter and a base input terminal D, one electrode connected to the biasing terminal D, and the other electrode connected to the collector of the first transistor Q1. The diode Q3 having the combined anode and cathode electrodes, the RF output terminal C, and the collector are integrated conductively coupled to the output terminal C, and the base is coupled to the bias input terminal D. Emitter is the second transistor An integrated circuit amplifier having another transistor (Q4) comprising a base, a collector emitter, integrated conductively coupled to a collector of the transistor. 20. The RF amplifier of claim 19 wherein the first and second transistors have scaled geometry to provide a current mirror configuration. 20. The RF amplifier of claim 19 wherein the emitter size of the second transistor (Q2) is a predetermined multiple of the emitter size of the first transistor (Q1). An integrated circuit amplifier comprising a base, collector, and emitter connected to an input signal terminal (B), a ground terminal (A), a base connected to a collector and an input signal terminal (B) and an emitter connected to a ground terminal (A). Diode Q3 including an anode and a cathode electrode connected to a first transistor Q1 and a biasing terminal D of one electrode, and the other electrode connected to a collector of the first transistor Q1. A base connected to an output signal terminal C, a collector connected to an output signal terminal C, a base connected to a bias input terminal D, and an emitter connected to a collector of the second transistor Q2; Another transistor (Q4) having a collector and an emitter, and resistance means for coupling the other electrode of the diode to the collector of the first transistor (Q1). An integrated circuit amplifier, having an input signal terminal (B), a ground terminal (A), a base connected to a collector and an input signal terminal (B), and an emitter connected to a base, collector, emitter connected to the ground terminal (A). The first transistor (Q1) having a and the emitter is connected to the ground terminal (A), the base is connected to the base of the first transistor (Q2), the second transistor (Q2) having a base, collector and emitter and A diode (Q3) having an anode and a cathode electrode connected to the bias input terminal (D), one electrode connected to the biasing terminal (D), and the other electrode connected to the collector of the first transistor (Q1); The base, collector and emitter are connected to the output signal terminal C and the collector to the output signal terminal C, the base to the bias input terminal D and the emitter to the collector of the second transistor Q2. Other transistors 4 with emitters A first resistor R1 connected between the collector of the first transistor Q1 and the base of the second transistor Q2, the base of the first transistor Q1, and the collector of the first transistor Q1. An integrated circuit amplifier having a second resistor (R2) connected therebetween. An integrated circuit amplifier, an input signal terminal (B), a ground terminal (A), a base coupled to a collector and the input signal terminal (B), and an emitter coupled to a ground terminal (A), a base, a collector And a base, a collector, and an emitter having a first transistor Q1 including an emitter, the emitter coupled to a ground terminal A, and a base connected to a base of the first transistor Q2. Anode and cathode electrodes connected to the transistor (Q2), the base input terminal (D), one electrode is connected to the biasing terminal (D), the other electrode is connected to the collector of the first transistor (Q1) The diode Q3, the output signal terminal C, and the collector are connected to the output signal terminal C, the base is connected to the bias input terminal D, and the emitter is the second transistor Q2. With base, collector, and emitter And the other transistor (Q4), the other electrode of said diode are integrated circuit amplifier having a resistance means for coupling the collector of the first transistor (Q1). 20. The amplifier of claim 19 wherein the first, second and other transistors and the diodes are all configured on a common substrate. 20. The diode of claim 19, wherein the diode comprises a transistor Q3 comprising a base, a collector and an emitter coupled to the collector, the connected collector base having an anode of the diode, and the emitter therefrom being the cathode of the diode. An amplifier with an odd. An integrated circuit amplifier, a base, collector and emitter having an input signal terminal (B), a ground terminal (A), a base connected to a collector and an input signal terminal (B), and an emitter connected to a ground terminal (A). And a second transistor Q2 including a base, a collector, and an emitter coupled to the ground terminal A and a base coupled to the base of the first transistor Q2. A diode Q3 comprising an anode and cathode electrode, the base input terminal D, one electrode coupled to a biasing diode, the other electrode coupled to a collector of the first transistor Q1, Base, collector, output signal terminal (C), collector coupled to output signal terminal (C), base coupled to bias input terminal (D), emitter coupled to collector of the second transistor (Q2) And another transistor Q4 comprising an emitter, A bypass capacitor means externally connected between the biasing terminal D and the ground potential, and a DC biasing current to maintain the biasing terminal at a reference potential according to the signal frequency. An integrated amplifier circuit having external means for supplying it. A monolithic integrated circuit AC signal amplifier module comprising two series signal amplifying transistors comprising a signal input and output terminal, a PC bias input terminal, and a single current gain terminal transistor carrying a single voltage gain terminal transistor. In series transistors, the transistors provide signal conversion as well as current and voltage gain between source signal input and output terminals, respectively, by direct conductive connections, to control the instantaneous DC bias stop operating point for the two transistors. And a common DC bias control means connected to said bias input terminal and said transistors. A monolithic integrated circuit amplifier comprising: two series signal amplifying transistors comprising a signal input and an output terminal, a DC bias input terminal, and a current-gain stage transistor for delivering to a voltage-gain stage transistor; A common DC connected to the bias input terminal and the transistors to provide current and voltage gain as well as signal inversion between the signal input and signal output terminals, and to instantaneously control the DC bias stop operating point for the two transistors. A bias control means, said common DC bias control means comprising a current mirror transistor connected by a current mirror associated with said electrically-gain stage transistor, and having a resistor and a forward-bias diode connected in series to said current-mirror transistor. Monolithic integrated circuit amplifier provided. 30. The device of claim 29, further comprising an isolation resistor connected in series between the current-mirror transistor and the current-gain stage transistor for increasing by the forward bias diode, in other words to increase the input impedance of the RF input terminal. Monolithic integrated circuit RF amplifier. 31. The monolithic integrated circuit RF amplifier of claim 29 or 30, wherein the amplifier is packaged with four leaded micro-X integrated circuit packages providing only four external electrical connection points. An amplifier comprising: an input signal terminal, an output signal terminal, a DC bias input terminal, a ground reference terminal, a first transistor connected to the DC bias terminal for setting a DC bias current flowing through the second transistor and the input signal First and second transistors connected in a current mirror configuration with a second transistor connected to the terminal and suitable for providing current-gain amplification of an input signal received therefrom and, as a result, a DC bias terminal for setting the DC bias current. And another transistor connected in series with the second transistor to provide voltage gain amplification of the current-gain amplified signal supplied through the second transistor, the other transistor being connected to the output signal terminal. And a DC bar connected to provide voltage gain amplified output signals. A forward-bias diode structure coupling the earth input terminal to the first transistor and a series resistor, the diode configuration having a base-collector connection transistor, each of the transistors being made of the same monolithic integrated circuit wafer And an integrated circuit wafer having at least one electrical connection to provide each terminal, at least one of the terminals having a plurality of electrical pads connected in parallel. A monolithic integrated circuit amplifier, comprising: signal input and output terminals; Two series signal amplifying transistors comprising a DC bias input terminal and a current-gain stage transistor delivered to a voltage-gain stage transistor, the series transistors collectively between the signal input and signal output terminals as well as signal conversion. A common DC bias control means connected to said transistor for instantaneously controlling a DC bias stop operating point for said bias input terminal and said two transistors, while said amplifier provides Monolithic integrated circuit amplifiers packaged with four leaded micro-X integrated circuit packages providing only four external electrical connection points. A monolithic integrated circuit AC signal amplifier module, comprising: two series signal amplifying transistors comprising a signal input and output terminal, a DC bias input terminal, and a current-gain stage transistor delivered to a voltage-gain stage transistor; Series transistors collectively provide current and voltage gain between the signal input and signal output terminals as well as signal conversion, and provide for instantaneous control of a DC bias stop operating point for the bias input terminal and the two transistors. A common DC bias control means connected to said bias control means comprising predetermined isolation resistor network means for at least one of said transistors, said network being operative to separate bias control means from said amplified signal. Monolithic integration Circuit AC signal amplifier module. 35. The apparatus of claim 34, wherein the bias control means comprises a current mirror bias transistor and the resistance network means has a predetermined scaled resistance value corresponding to a current mirror ratio set between the current mirror transistor and at least one of the transistors. Monolithic integrated circuit AC signal amplifier module comprising a pair of resistors. A monolithic integrated circuit AC signal amplifier module comprising two series signal amplifying transistors including a signal input and output terminal, a DC bias input terminal, and a current gain terminal transistor delivered to a voltage-gain terminal transistor. The transistor collectively provides current and voltage gain between signal input and output terminals as well as signal conversion, and is connected to the transistor to instantaneously control a DC bias stop operating point for the bias input terminal and the two transistors. A monolithic integrated circuit having common DC bias control means, said module having at least one electrical connection pad to provide said respective terminals while at least one of said terminals has a plurality of electrical pads connected in parallel AC signal amplifier module. A monolithic integrated circuit AC signal amplifier module comprising two series signal amplifying transistors comprising signal input and output terminals, a DC bias input terminal, and a current-gain stage transistor delivered to a voltage gain stage transistor. Transistors collectively provide current and voltage gain between the signal input and output terminals as well as signal conversion, and are connected to the bias input terminal and the transistors for instantaneous control of DC bias stop operating points for the two transistors. Common DC bias control means, a bypass capacitor means externally connected between the biasing terminal and the ground potential to maintain the biasing terminal at a signal ground potential, and a DC biasing current to the biasing terminal. With external means for supply It is a monolithic integrated circuit AC signal amplifier module.

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