KR930003202B1 - Transmitting apparatus of digital picture image signal - Google Patents

Abstract

The multiplexer for transmitting the data of image coding effectively by minimizing the waste of channel comprises: a frame alignment (26); a priority server (34), which outputs the data of frame unit outputted from the frame alignmet in priority order; a transmitting buffer (36), which stores the data outputted from the priority server temporary and outputs the data; a forward error correction (FEC), which inserts a parity bit into the frame data outputted from the transmitting buffer for detecting and correcting the error; a controller (40), which converts the data outputted from the FEC (38) into the data of high level data link control (HDLC) protocol format; a channel connecting section (42).

Description

Multiplexer, Demultiplexer and Transmission Frame Structure for Digital Video Signal Transmission

1 is a block diagram of a conventional multiplexing device for digital production signals.

2 is a frame structure diagram according to FIG.

3A and 3B are block diagrams of a multiplexing device and a demultiplexing device according to the present invention.

4 is a structural diagram of a transmission frame according to the present invention.

* Explanation of symbols for main parts of the drawings

26: Frame Arranger 34: First-come-first-served processor

36: Transmission buffer 38, 50: FFC

40, 48: HDLC controller 42, 46: channel connector

52: receiving buffer 54: frame divider

The present invention relates to a digital video signal transmission device for transmitting an encoded digital video signal, and more particularly, to a multiplexing device for transmission of a digital video signal for multiplexing and transmitting a digital video signal, an audio signal, control data, and user data. The present invention relates to a multiplexing device and a frame structure.

Multiplexing and demultiplexing are used to transmit control data from audio coders, still picture data, and motion picture data generated by a video encoder that currently compresses a digitalized video signal using one transport channel. ) Is required. In order to determine and demultiplex what kind of information the transmitted data is, a frame structure must be defined. In addition, the transmission channel capacity must be appropriately divided, and in order to transmit within the limited delay time, a multiplexing system and a multiplexing system having a demultiplexing function must be designed.

1 is multiplexing the audio data, the still image data, the moving image data and the control data output from the video encoder as described above, and transmitting them to the transmission line, receiving data from the transmission line and separating the data into the same data as above (distribution). A conventional multiplexing system for

10 is a frame arranger, 12 is an HDLC controller, 14 is an interface, 16 is a frame divider, 18 is a receiving buffer, 20 is a channel interface, 22 is a transmitting buffer, and 24 is a first-come first-served processor.

2 shows a frame structure for multiplexing and transmitting data by the system of FIG. 1, (a) shows a frame structure of an audio signal, (b) shows a video signal and frame structure, and (c) shows a still image. And a data frame structure diagram.

The conventional multiplexing device such as the first diagram and the frame structure such as the second diagram are published in the United States in November 1986 by HIROHISA YMAAGUCHI and two others, "IEEE JOURNAL ON SELECTED AREAS IN COMMUNCATIONS, VOL. SAC-4, No. 8 ".

First, referring to the frame structure of FIG. 2, the digital audio signal output from the video encoder is composed of one audio frame (A) as shown in FIG. 2 (a) in 0.02 seconds and transmitted at 6.4KHz. In the case of sampling, it corresponds to 320 bits.

The digital video signal is equally divided into P bits, that is, 320 bits, and transmitted by attaching a frame header as shown in FIG. 2 (b). In this case, FCS is attached when transmitting in 320bit unit, and video frame (V) which is not 320bit is attached with filler and transmitted in 320bit. In this case, the filler is data having no meaning and is only bit data so that the data of the video frame is 320 bits.

The data signal SV (still image data, user data, control data) is different from the second (b). That is, unlike the video frame shown in FIG. 2 (b), a high-level Data Link Control (HDLC) header is used to transmit a data frame (D) as shown in FIG. 2 (c) using the HDLC protocol.

The operation of the multiplexing apparatus of FIG. 1 with the frame structure of FIG. 2 will be described.

When video data V, control data C, and user data SV output from an image encoder (not shown) are output, they are input to the frame arranger 10 to arrange the frames. The output of the frame arranger 10 is input to the HDLC controller 12 and converted into the same frame as the second (c), and then to the first-come first-served processor 24 through the interface 14.

The audio data A and the image data V output from the image encoder are input to the first-come-first-served processor 24 having the frame structure as shown in FIG. 2 (a) and (b) through the direct interface. At this time, the first-come-first-served processor 24 transmits each frame to the transmission buffer 22 according to the priority of lowering each input data in the order of audio data, still image data, and image data (moving image data). . The transmission buffer 22 stores the input data and transmits the stored data in a frame unit to the counterpart through the channel access interface 20.

The other side receives data transmitted through the channel interface 20 in units of frames, and distributes the data to a voice codec, a still image codec, and a data codec for processing.

For example, when data as described above is input to the channel interface 20, it is input to the receive buffer 18. At this time, the receiving buffer 18 receives this and outputs it to the frame distributor 16. The frame distributor 16 distributes the received frames output from the reception buffer 18 for each frame and outputs them through the interface 14.

However, multiplexing devices such as the first diagram have had the following problems. Since the detection of the transmission error and the correction of the error are performed in each codec, each codec must have a function of detecting and correcting the transmission error.

-Normally, data signal and video signal are composed of several frames. Therefore, once the video signal or the data signal starts to be transmitted, the audio signal cannot be transmitted until the end of the transmission, so that the difference between the transmission time of the audio and the video signal can be very large. Therefore, the motion image of the human mouth and the voice of the speaker (the signal restored through the codec) do not coincide with each other.

-Since synchronization must be done frame by frame, the loss of information is very high when the synchronization is read.

-Since there is no information indicating the order in which each frame is to be restored between each frame of the video signal and each frame of the data signal, a problem occurs that can be used only in a circuit-switched network and not in a packet-type switching network.

Accordingly, an object of the present invention is to enable multiplexing and demultiplexing to efficiently transmit data of an image encoder by minimizing channel waste by enabling detection and correction of transmission errors when transmitting various data through one transmission channel. An object of the present invention is to provide a frame structure capable of efficiently performing an apparatus and transmission.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

FIG. 3A is a block diagram of a multiplexing apparatus according to the present invention, and includes a frame aligner for inputting a digital audio signal, a digital video signal, a digital video signal, and control data to be arranged in a frame of each data. 26), a first-come-first-served server 34 for processing the data in units of frames output from the frame arranger 26 in order of priority, and storing the data in a transmission buffer 36, and the first-come-first-served processor 34. Forward Error Correction (FEC) for inserting and transmitting the transmission buffer 36 for temporarily storing and outputting the output data of the data and the extra bit data for having error detection and error correction functions in the frame data output from the transmission buffer 36. 38, an HDLC controller 40 for converting the output data of the FEC 38 into HDLC protocol format data, and an output data of the HDLC controller 40 Songseon consists of a connecting channel 42 to be transmitted to a.

3B is a block diagram of the demultiplexer according to the present invention, which may be connected between a channel connector 46 connected to a digital network and receiving data from the digital network and a frame distributor 54. .

4 is a frame structure diagram according to the present invention, wherein (a) is a frame structure of voice data, in which a link header and a frame header are inserted before the data of the voice signal, indicating that the beginning or end of the frame is independent of each header. Frogs are attached before and after the frame.

(b) is a digital video data frame structure diagram in which sequence numbers, frame headers, and link headers are attached to the front of the video data signal, and flags are inserted before and after the frame.

For example, the digital signal output from the image encoder and input to the frame arranger 26 is configured in the form of frames in units of screens. If the number of bits in the units of the screens is greater than or equal to the maximum allowable frame, as shown in FIG. It is divided into frames. In this case, since the frames of the image data signal include the same screen information, they have the same link header.

(c) shows a frame structure of digital still image data or digital control data, and has the same frame structure as that of the moving image data.

In the fourth (a) (b) and (c), the sequence number indicates the sequence number of the divided frames, and the frame header includes information on the generation time of the data. The link header includes information about the type of frame.

Hereinafter, operations of FIGS. 3A and 3B according to the present invention will be described with reference to FIG.

Digital voice data output from the digital voice codec of a video encoder (not shown), digital video signal output from the digital video codec, a digital transmitter, or digital data output from a computer. And when the control data of the digital video telephone is inputted to the terminals 28, 30 and 32 of FIG. 3A, respectively, the frame arranger (configurer) 26 sends the respective input data to the fourth (a) (b). (c) are arranged in the form of a frame as shown in the figure and output to the first priority server (priority server) 34.

At this time, the data output from the frame arranger 26 is output in units of frames, and the first-come-first-served processor 34 stores the data in the transmission buffer 36 in order of priority. That is, the digital audio signal is the highest priority unit, the digital video signal is the next priority, and the digital data has the lowest priority.

The data stored in the transmission buffer 36 is input to the FEC 38 circuit, which adds redundant (error correction data) data so as to have error detection and error correction functions in the receiving system. Output to the controller 40. In this case, the extra data means that the FEC 38 adds and inserts an error correction parity bit for bits in the remaining areas except for the flags in each frame (hereinafter referred to as user information). As described above, the user information into which the error correction parity bits are inserted is input to the HDLC controller 40.

The HDLC controller 40 converts the data of the frame structure to which the error correction data is added in the FEC 38 into the HDLC data format and transmits the data to the digital network through the line 44 connected to the channel connection 42. At this time, the HDLC controller 40 adds and transmits a separate frame check sequence (FCS) bit so that the HDLC controller 48 at the receiving side can detect an error in the transmission process, as specified in CCITT Recommendation I.441.

The encoded data in units of frames transmitted by the multiplexing apparatus of FIG. 3a are received by demultiplexing on the receiving side. Referring to FIG.

Channel connector 46 connected to line 44 receives data from line 44 and inputs it to HDLC controller 48.

At this time, the HDLC controller 48 detects an error of HDLC data included in the data received in the HDLC data format and inputs the received data to the FEC 50 together with the received data. That is, the HDLC controller 48 detects an error of the HDLC data format received through the transmission path, and if there is an error in the transmission state of the HDLC data format, corrects it and outputs it to the FEC 50.

The FEC 50 detects an error of the received frame data by using an error correction bit added to the error detection and error correction function in the FEC 38 on the transmitting side, and stores the error in the reception buffer 52. . At this time, the reception buffer 52 inputs the received data to the frame distribution circuit 54. The frame distribution circuit 54 receiving the data output from the reception buffer 52 analyzes the link header of the received data to determine the frame type, and outputs the frame type to the receiving codec according to the determined frame.

For example, if the determined frame is a digital audio signal, the digital audio data is output to the line 56 connected to the digital audio codec on the receiving side. If the digital frame is a digital video signal, the line connected to the digital video codec on the receiving side ( 48) output digital video data.

If the received data frame is digital data, the frame distributor 54 outputs the received data to the line 60 connected to the control circuit of the digital video telephone.

Therefore, the present invention can simplify the encoding and decoding system on the transmission and reception side by inserting and transmitting error correction data when transmitting frame data and performing error correction upon receiving the data. Since digital voice data is transmitted with higher priority, digital voice data can be transmitted even while digital video data and digital data are being transmitted, so the delay time and dispersion of the digital voice signal are very low. The operation (video) and the voice is time-matched, there is an advantage that can communicate without awkwardness.

Claims (3)

A multiplexing device for transmitting a digital video signal, comprising: a frame arranger 26 for outputting an input digital audio signal, a digital video signal, and control data into frames of each data; First-come-first-served processor 34 for processing and outputting the data in frame units outputted from the subframe according to the priority of the data, a transmission buffer 36 for temporarily storing and outputting the data output from the first-come-first-served processor 34, and the transmission. The FEC 38 which inserts and transmits a parity bit having an error detection and error correction function in the frame data output from the buffer 36, and converts the data output from the FEC 38 into data in the HDLC protocol format. HDLC controller 40 for transmitting, and the channel connection unit 42 for transmitting the output data of the HDLC controller 40 to the transmission line of the digital network A multiplexing device for the transmission of digital video signals. A demultiplexer for receiving a digital video signal through a digital network, the apparatus comprising: a channel connector (46) for receiving data of an HDLC protocol format from the digital network, and an HDLC protocol format outputted from the channel connector (46). The HDLC controller 48 receives data, detects and corrects an error of data in an HDLC protocol format, and outputs frame data, and inputs frame data output from the HDLC controller 48, and includes the received frame data in the input frame data. An FEC 50 that extracts the parity bits, detects and corrects an error of the received data, and outputs a buffer; a reception buffer 52 that temporarily stores data output from the FEC 50 and buffers the data; A frame distributor 54 for distributing data output from the unit 52 in units of frames and outputting the audio data, the video data, and the control data. Demultiplexing device for transmission of a digital image signal, characterized by configured. In a transmission / reception frame structure of a multiplexing device and a demultiplexing device for transmitting a digital video signal, a link header and a frame header are inserted before the digital audio data and indicate the beginning and end of the frame before and after the digital audio data. A digital audio data frame comprising a flag inserted therein, a link header, a frame header and a sequence number inserted before the digital video data, and a flag indicating the start and end of the frame after the digital video signal before the link header is inserted. A moving picture data frame, a link header, a frame header, and a sequence number are inserted before a data signal such as still picture data, control data, and user data, and a flag indicating the start and end of the frame before the link header and after the data signal. Inserted and configured Digi A transmission frame of a multiplexing and demultiplexing apparatus, characterized by consisting of de-data frames.

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