KR920008328B1 - Double scanning device for tv - Google Patents

Double scanning device for tv Download PDF

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Publication number
KR920008328B1
KR920008328B1 KR1019860010180A KR860010180A KR920008328B1 KR 920008328 B1 KR920008328 B1 KR 920008328B1 KR 1019860010180 A KR1019860010180 A KR 1019860010180A KR 860010180 A KR860010180 A KR 860010180A KR 920008328 B1 KR920008328 B1 KR 920008328B1
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South Korea
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data
selection switch
memory
converter
time
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KR1019860010180A
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Korean (ko)
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KR880006890A (en
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최용훈
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주식회사 금성사
구자학
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N3/00—Scanning details of television systems; Combination thereof with generation of supply voltages
    • H04N3/10—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical
    • H04N3/14—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by means of electrically scanned solid-state devices
    • H04N3/15—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by means of electrically scanned solid-state devices for picture signal generation
    • H04N3/155—Control of the image-sensor operation, e.g. image processing within the image-sensor
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/71—Charge-coupled device [CCD] sensors; Charge-transfer registers specially adapted for CCD sensors
    • H04N25/745—Circuitry for generating timing or clock signals
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
    • H04N25/77—Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components

Abstract

The system improves the resolution of television set by inserting the average value of the two adjacent lines of one field into the middle horizontal line of the other field. It comprises a conventional A/D converter (1) connected to 3-stage selecting switches (SW1,SW4) in parallel,3 1-line memories (M1,M2,M3), and an adder (5) and a subtractor (6) connected to the common contact of the selecting switch (SW4).

Description

TV 수상기에서의 2중 주사장치Dual scanning device on TV receiver

제1도는, 본 발명 장치의 블록도.1 is a block diagram of an apparatus of the present invention.

제2도는, 본 발명에서 시간축상에서의 영상 입력과 출력과의 관계도.2 is a relationship between video input and output on a time axis in the present invention.

제3도는, 본 발명에서 시간축상에서의 메모리 데이타 상태 및 영상 출력신호 상태도.3 is a memory data state and a video output signal state diagram on a time axis in the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

1 : A/D 변환기 2 : 동기 분리회로1: A / D converter 2: Synchronous separation circuit

3 : 제어신호 발생회로 4 : D/A 변환기3: control signal generating circuit 4: D / A converter

5 : 가산기 6 : 제산기5: adder 6: divider

SW1-SW4: 선택스위치 M1, M2, M3: 메모리SW 1 -SW 4 : Selection switch M 1 , M 2 , M 3 : Memory

Si : 영상입력 신호단자 So : 영상출력 신호단자Si: Video input signal terminal So: Video output signal terminal

본 발명은, TV 수상기에서, 해상도를 높이기 위한 2중 주사장치에 관한 것이다. 종래의 장치에서는, 2개의 2접점 선택스위치를 이용하여 영상입력신호가 A, B, C, D, … 의 순으로 입력되면, 제어신호 발생회로의 제어동작에 의하여 선택스위치가 1주사선 구간마다 영상신호를 2개의 메모리에 교대로 공급하게 된다. 이때 제1메모리는, 홀수번째 주사선에서는 기입, 짝수번째 주사선에서는 판독의 동작을 반복하게 되며, 여기서 판독 속도가 기입속도보다 정확히 2배가 빠르므로 짝수번째 주사선 일때마다 제1메모리는 A,A/C,C/E,E/‥의 신호를 또 하나의 선택스위치에 공급하게 된다.The present invention relates to a double scanning device for increasing the resolution in a TV receiver. In the conventional apparatus, the video input signals are A, B, C, D, ... by using two two-contact selection switches. When inputted in order, the selection switch alternately supplies the video signals to the two memories every one scanning line section by the control operation of the control signal generating circuit. At this time, the first memory repeats the write operation on the odd scan line and the read operation on the even scan line. Since the read speed is exactly two times faster than the write speed, the first memory is A, A / C for each even scan line. Signals C, E and E are supplied to another selector switch.

이때 제2메모리에서는 제1메모리와 상반 동작을 하게 되므로, 이로 인하여 영상출력 신호는 영상입력신호에 대하여 2배 주사변환된 신호로 나타나게 된다. 그러나, 이와 같은 종래의 장치에서는, 동일한 주사선을 단지 2번씩 주사하는 것이기 때문에, 사선이나 곡선에 있어서는 해상도(Resolution)가 크게 저하되는 문제점이 있었다.In this case, since the second memory performs the opposite operation to the first memory, the image output signal is represented as a signal that is double-scanned with respect to the image input signal. However, in such a conventional apparatus, since the same scanning line is scanned only twice, there is a problem in that the resolution is greatly reduced in the oblique line and the curve.

본 발명은, 이러한 점을 감안하여 TV 수상기에서의 해상도를 높이는데 적합하도록한 2중 주사장치(Double Scanning System)를 제공하기 위한 것이로서, 이를 첨부한 도면에 의하여 상세히 설명하면 다음과 같다.SUMMARY OF THE INVENTION The present invention has been made in view of this point and provides a double scanning system (Double Scanning System) adapted to increase the resolution in a TV receiver, which will be described in detail with reference to the accompanying drawings.

제1도에 도시한 바와 같이, 영상입력신호단자(Si)에 A/D변환기(1)를 통하여 3단선택스위치(SW1), (SW4)를 병렬 접속하고, 이들의 선택스위치(SW1), (SW4)의 각 접점 (X1,X4), (Y1, Y4), (Z1, Z4)에 메모리(M1), (M2), (M3)를 연결하며, 이에 병렬 접속된 3단 선택스위치 (SW2), (SW3)를 연결하되, 이들의 공통 접점에 가산기(5) 및 제산기(6)를 통하여 상기 선택스위치(SW4)의 공통 접점을 연결하여 구성한 것이다. 미설명 부호 2는 통상의 동기 분리회로이고, 3은 제어신호 발생회로이고, 4는 D/A 변환기이며, So는 영상출력신호단자이고, H, V는 각각 수평, 수직 동기신호이다.As shown in FIG. 1, three-stage selection switches SW 1 and SW 4 are connected in parallel to the video input signal terminal Si via the A / D converter 1, and these selection switches SW 1 ), memory (M 1 ), (M 2 ), (M 3 ) at each contact (X 1 , X 4 ), (Y 1 , Y 4 ), (Z 1 , Z 4 ) of (SW 4 ) The three-stage selection switches SW 2 and SW 3 connected in parallel to each other are connected to each other, and common to the selection switches SW 4 through the adder 5 and the divider 6 at their common contacts. It is composed by connecting the contacts. Reference numeral 2 is a conventional synchronous separation circuit, 3 is a control signal generation circuit, 4 is a D / A converter, So is an image output signal terminal, and H and V are horizontal and vertical synchronization signals, respectively.

이와 같이 구성된 본 발명의 작용효과를 설명하면 다음과 같다. 우선, 제1도에 도시된 선택스위치(SW1)는 영상입력신호 (Si)를 저장할 메모리 선택스위치이고, 선택스위치(SW2)는 영상출력신호 (So)의 메모리 선택스위치이고, 선택스위치(SW3)는 영상출력신호 (So)와 삽입(Interpolation)할 영상신호 메모리 선택스위치이며, 선택스위치(SW4)는 삽입 데이타를 저장할 메모리 선택용 스위치인 것이다.Referring to the effects of the present invention configured as described above are as follows. First, the selection switch SW 1 shown in FIG. 1 is a memory selection switch to store the image input signal Si, and the selection switch SW 2 is a memory selection switch of the image output signal So. SW 3 ) is an image signal memory selection switch to be interpolated with the image output signal So, and the selection switch SW 4 is a memory selection switch for storing insertion data.

본 발명의 장치는, 1주사선 구간(1H)시간 동안 데이타를 주사하는 것으로서, 초기의 1/2H 시간 동안에는 원래의 데이타를 주사하고, 그 다음의 1/2H 시간 동안에는 삽입 데이타를 주사하도록 되어 있다. 따라서 제2도에 나타낸 바와 같이 초기의 2H 시간 동안에는 A, B 데이타를 저장하고, 다음의 1/2H 시간 동안에는 C 데이타의 1/2을 저장함과 동시에 A 데이타를 판독하고, 그 다음의 1/2H 시간 동안에는 C 데이타의 나머지 1/2을 저장함과 동시에 삽입 데이타 (

Figure kpo00001
)를 판독하게 된다. 이와 같은 과정을 제1도 내지 제3도에 의하여 상술한다.The apparatus of the present invention is to scan data for one scan period (1H) time, to scan the original data for the initial 1 / 2H time, and to insert the inserted data for the next 1 / 2H time. Therefore, as shown in FIG. 2, A and B data are stored during the initial 2H time, and half of the C data is read during the next 1 / 2H time, and the A data is read at the same time. During the time, the remaining half of the C data is stored and the insertion data (
Figure kpo00001
) Will be read. This process will be described in detail with reference to FIGS. 1 to 3.

제1도에서, 영상 입력신호단자 (Si)로부터 A 데이타가 입력되어 A/D 변환기(1)을 통하여 디지탈 신호로 변환된 후에 선택스위치(SW1)에 가해지는데, 이때 선택스위치(SW1)가 접점 (X1)에 접속되어 있는 상태이므로 A 데이타는 메모리 (M1)에 저장된다.In Figure 1, the image input signal terminal is from the (Si) A data input A / D converter (1) Digital after the signal is converted to makin applied to the selection switch (SW 1), wherein the selection switch (SW 1) through the Data is stored in the memory (M 1 ) since is connected to the contact (X 1 ).

만일, B 데이타가 입력되면, 이때에는 선택스위치(SW1)가 접점 (Y1)에 접속되므로 B 데이타는 메모리(M2)에 저장되고, 그 다음에 C 데이타가 입력되면, 선택스위치 (SW1)가 접점 (Z1)에 접속되므로 이때에는 C 데이타의 1/2을 저장함과 동시에, 선택스위치(SW2)가 접점 (X2)에 접속되어 있으므로 A 데이타를 판독한 후에 D/A 변환기(4)를 통하여 아날로그 신호로 변환되어 영상출력신호 단자 (So)로 출력되고, 또한 선택스위치(SW3)가 접점 (Z3)에 접속되어 A 데이타를 판독함과 동시에 B 데이타를 판독하고 가산기(5)와 제산기(6)를 통하여 연산하여 삽입 데이타를 구한 후에, 선택스위치(SW4)에 가해지는데, 이때 선택스위치(SW4)는 접점 (X4)에 접속되어 있으므로 삽입 데이타가 메모리 (M1)에 저장되는 것과 동시에 발생된다.If B data is input, the selector switch SW 1 is connected to the contact Y 1 at this time, so that the B data is stored in the memory M 2 , and then the C data is input. 1 ) is connected to the contact (Z 1 ), so at this time it stores 1/2 of the C data, and at the same time, the selector switch (SW 2 ) is connected to the contact (X 2 ). (4) is converted into an analog signal and output to the image output signal terminal (So), and the selector switch (SW 3 ) is connected to the contact point (Z 3 ) to read A data and at the same time read B data and adder 5 and after obtaining the insertion data by calculation via the divider 6, a selection switch makin applied to (SW 4), wherein the selection switch (SW 4) is inserted into the data memory because it is connected to the contact point (X 4) It is generated at the same time as being stored in (M 1 ).

그 다음에, C 데이타의 나머지 1/2이 저장되는 것과 선택스위치(SW2)가 접점 (X2)에 계속되어져 삽입 데이타를 판독하는 것이 동시에 발생된다. 그 다음에, D 데이타가 입력되면, 이때에는 선택스위치(SW1)가 접점 (X1)에 접속되어져 상기한 바와 같은 선택스위치의 제어 동작을 반복하게 되며, 그와 같은 신호 상태는 제3도에 나타낸 바와 같은 것이다.Then, the remaining half of the C data is stored and the selection switch SW 2 continues to the contact X 2 to read the insertion data at the same time. Then, when the D data is input, at this time, the selector switch SW 1 is connected to the contact point X 1 to repeat the control operation of the selector switch as described above. As shown in FIG.

이상에서 설명한 바와 같이, 본 발명에 의하면, 3개의 1라인 메모리와 4개의 3단 선택스위치를 연결 구성한 간단한 회로구성으로서, TV 수상기에서의 해상도를 높이므로서 화질 향상의 효과를 제공하는 것이다.As described above, according to the present invention, it is a simple circuit configuration in which three one-line memories and four three-stage selection switches are connected to each other, thereby providing an effect of improving image quality by increasing the resolution in a TV receiver.

Claims (1)

영상입력신호(Si)를 메모리에 저장시킨 후에 판독 속도를 기록 속도의 2배 속도로 행하는 TV 수상기의 2배 주사 변환장치에 있어서, 영상입력신호 단자(Si)에 통상의 A/D변환기(1)를 통하여 3단 선택스위치(SW1), (SW4)를 병렬 접속하고, 이들의 선택스위치(SW1), (SW4)의 각 접점 (X1,X4), (Y1, Y4), (Z1, Z4)에 각각 1라인 메모리 (M1), (M2), (M3)를 통하여 병렬 접속된 3단 선택스위치 (SW2), (SW3)를 연결하되, 이들의 공통 접점에 가산기(5) 및 제산기(6)를 통하여 상기 선택스위치(SW4)의 공통 접점을 연결하여서 구성된 TV 수상기에서의 2중 주사장치.In a double-scan scanning converter of a TV receiver which stores a video input signal Si in a memory and reads at a speed twice the recording speed, the conventional A / D converter 1 is connected to the video input signal terminal Si. ) 3-selection switch (SW 1) via a, (SW 4) for parallel connection, each contact point (X 1, of those of the selection switch (SW 1), (SW 4 ) and X 4), (Y 1, Y 4 ), (Z 1 , Z 4 ) connect 3-stage selector switch (SW 2 ), (SW 3 ) connected in parallel through 1-line memory (M 1 ), (M 2 ), (M 3 ) respectively. And a double scanning device in a TV receiver configured by connecting a common contact of the selection switch (SW 4 ) through an adder (5) and a divider (6) to these common contacts.
KR1019860010180A 1986-11-29 1986-11-29 Double scanning device for tv KR920008328B1 (en)

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