KR920006142B1 - An interface circuit of electronic switching system - Google Patents

Abstract

The circuit is for interfacing trunks and subscribers using single tone. The circuit includes a sub-highway buffer (50) for storing transmit/receive digital data temporarily, a converter (40) for digitizing analog data transmitted through analog connecting lines and for converting digital data stored onthe buffer into analog data, a time slot assigning circuit (90) for assigning channels to the sub-highway buffer (50), a relay circuit (60) for controlling th connection of a transformer (20) with other equipments; a single tone detector (70) for detecting single tone transmitted from the low pass filter (30), and a multiplex frequency transmitter and receiver (80) for transmitting and receiving multi tone signals.

Description

Interface circuit of exchange

1 is a block diagram of the present invention.

2 is a detailed circuit diagram of a sub highway buffer in FIG.

3 is an operational waveform diagram according to the present invention.

* Real names of symbols on the main parts of the drawings

20: transformer 30: low pass filter

40: Codec 50: Sub Highway Buffer

60: relay and driver circuit 70: single tone detector

80: multi-frequency transceiver 90: tisak and decoding unit

C: Relay Contact 100: Central Control Unit

1: 4-wire analog connection line

The present invention relates to an interface circuit in a private exchange, and more particularly to a trunk and subscriber interface circuit using a single tone.

In general, private exchanges must interface with many other devices to facilitate their unique functions. However, in the conventional case, a four-wire telephone such as a TA-838 is inconvenient in use because it is not easy to connect a tone signaling trunk and a private exchange period.

It is therefore an object of the present invention to provide a trunk and carburettor interface circuit using a single tone.

Hereinafter, the present invention will be described with reference to the accompanying drawings.

FIG. 1 is a block diagram of the present invention, which includes a subhighway buffer 50 connected to transmit and receive highways to temporarily store transmit and receive digital data, and a four-wire analog connection line connected to other equipment. And a converter 40 for digitally converting the analog data applied by the low pass filter 30 and analogizing the digital data applied from the sub highway buffer 50, and generating various data addresses and card enable signals. A central control unit (100) for supervising and controlling the overall operation of the system, a time slot assignment circuit (90) for allocating channels to the sub-hiware buffer (50) under the control of the central processing unit (100), A relay circuit 60 for blocking a connection state between other equipment and the transformer 20 under the control of the timeslot allocation circuit 90, and the timeslot The low pass through the control of the time slot assignment circuit 90 and the single tone detector 70 for detecting the single tone input from the low pass filter 30 according to the type under the control of the circuit 90. It is composed of a multi-frequency transceiver 80 for transmitting and receiving the multiple tones input from the filter 30.

2 is a detailed circuit diagram of the sub highway buffer 50 in FIG. 3, and FIG. 3 is an operating waveform diagram according to the present invention.

The present invention will be described in detail based on the above configuration. If a single-wire analog line (570HZ, 2250HZ, 2600HZ) is input to the 4-wire analog line input to the transmitter and receiver from other equipment such as a 30-wire exchanger SBX or 4-wire telephone, It is applied to the pass filter 30.

The analog sinkletone applied to the low pass filter is filtered at 300-3400HZ and then converted to digital at codec 40.

The digitalized singleton is applied to the subhighway buffer 50 and output through the transmit highway (hereinafter referred to as TX). Here, the sub-highway buffer 50 connected to the highway may include, for example, LS126 (BUF1, BUF2) and LS125 (BUF3, BUF4) as shown in FIG. 2, and the enable signals thereof are timeslots. It is output from the allocating circuit 90 and its waveform is shown in FIG. That is, all of the signals enabled by the LS126 are NAND-gated by the timeslot assignment circuit 90 to generate an output waveform such as (3C).

On the other hand, the digital data received from the receive highway (hereinafter referred to as Rx) to the sub-highware buffer 50 is converted into an analog form by the codec 40 and filtered by the low pass filter 30 and then the transformer 20. Outputs to external line via). The relay circuit 60 connected to the external line can cut the internal circuit (private switching system) and the external circuit (other equipment).

Therefore, when the relay circuit 60 is enabled in the system test, the tones (570HZ, 2250HZ, 2600HZ, other tones) for self-diagnosis generated from the clock module (CKM) and supplied through Rx are fed back from the Tx side and are singletons. After the digital conversion from the converter 40 through the detector 70 and input to the time slot assignment circuit 90, the central control apparatus 100 reads it and diagnoses the system itself.

In this case, the timeslot allocation circuit 90 performs functions such as reading and writing of each data, enabling, relay driving signal, and timeslot allocation. On the other hand, when the single tone input from other equipment during tone signalling is input to the input terminal IN of the singleton detector 70, different bits are set according to each single tone input and are read. In addition, dual tone multi frequency (DTMF), which uses two frequency combinations to send numeric information from the telephone to the exchange until a call is established after signal set-up is completed by call set up, is called MFRS (Multi firequency). Receive & Sender (80).

As described above, the interface circuit is configured to operate, thereby making it easy to connect with other equipment.

Claims (1)

In the exchange, the transformer 20 and the low-pass filter 30 are connected to a sub-high buffer 50 connected to the transmit and receive highways to store transmission / reception of digital data upon opening, and a 4-wire analog connection line connected to other equipment. Digital converter for converting the analog data applied through the analog and the digital data applied from the sub-highway buffer 50, and generates a variety of data address and card enable signal, etc. to monitor and control the overall operation of the system A central slot apparatus (100), a time slot assignment circuit (90) for allocating channels to the sub-hiware buffer (50) under the control of the central processor (100), and the time slot assignment circuit (90). Of the relay circuit 60 and the time slot assignment circuit 90 to block the connection state between the other equipment and the transformer 20, And a single tone detector 70 for detecting a single tone input from the low pass filter 30 according to a type, and under the control of the time slot assignment circuit 90, inputted from the low pass filter 30. Trunk and subscriber interface circuit, characterized in that consisting of a multi-frequency transceiver 80 for transmitting and receiving multiple tones.

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