KR910007772U - Direct memory access system - Google Patents

Direct memory access system

Info

Publication number
KR910007772U
KR910007772U KR2019890014604U KR890014604U KR910007772U KR 910007772 U KR910007772 U KR 910007772U KR 2019890014604 U KR2019890014604 U KR 2019890014604U KR 890014604 U KR890014604 U KR 890014604U KR 910007772 U KR910007772 U KR 910007772U
Authority
KR
South Korea
Prior art keywords
memory access
access system
direct memory
direct
memory
Prior art date
Application number
KR2019890014604U
Other languages
Korean (ko)
Other versions
KR940005003Y1 (en
Inventor
나희창
Original Assignee
주식회사 삼보 컴퓨터
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 주식회사 삼보 컴퓨터 filed Critical 주식회사 삼보 컴퓨터
Priority to KR2019890014604U priority Critical patent/KR940005003Y1/en
Publication of KR910007772U publication Critical patent/KR910007772U/en
Application granted granted Critical
Publication of KR940005003Y1 publication Critical patent/KR940005003Y1/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/1647—Handling requests for interconnection or transfer for access to memory bus based on arbitration with interleaved bank access

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
KR2019890014604U 1989-10-06 1989-10-06 Dynamic memory access system KR940005003Y1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019890014604U KR940005003Y1 (en) 1989-10-06 1989-10-06 Dynamic memory access system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019890014604U KR940005003Y1 (en) 1989-10-06 1989-10-06 Dynamic memory access system

Publications (2)

Publication Number Publication Date
KR910007772U true KR910007772U (en) 1991-05-29
KR940005003Y1 KR940005003Y1 (en) 1994-07-25

Family

ID=19290588

Family Applications (1)

Application Number Title Priority Date Filing Date
KR2019890014604U KR940005003Y1 (en) 1989-10-06 1989-10-06 Dynamic memory access system

Country Status (1)

Country Link
KR (1) KR940005003Y1 (en)

Also Published As

Publication number Publication date
KR940005003Y1 (en) 1994-07-25

Similar Documents

Publication Publication Date Title
BR8702319A (en) DIRECT ACCESS STORAGE UNIT
GB8712443D0 (en) Memory access system
DE3782756D1 (en) DIRECT ACCESS MEMORY.
DE69209670T2 (en) Data access system
DE69030908D1 (en) Acoustic-digital system
KR880700354A (en) Dafot Memory System
DE3876415T2 (en) DYNAMIC DIRECT ACCESS MEMORY.
DE69024173T2 (en) Read-only memory arrangement
DE69334149D1 (en) memory card
NO914402D0 (en) ROER-handling system
DE69027907D1 (en) Data storage access
DE69130932T2 (en) Storage system
DE68925048D1 (en) Direct memory access control
DE69122520D1 (en) Multiple bus system memory architecture
DE68927015D1 (en) Direct memory access control
DE69128562D1 (en) File access system
DE69227433T2 (en) Memory access facility
KR970008600B1 (en) Memory access system
DE69031529T2 (en) Memory control system
DE3855284D1 (en) Direct memory access control
FI900011A (en) Triple-shaft system
DE69130967D1 (en) Computer memory arrangement
TR23376A (en) PAYPLAYN MEMORY STRUEKTUERUE
DE3751693T2 (en) Memory access control
KR910007772U (en) Direct memory access system

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
REGI Registration of establishment
FPAY Annual fee payment

Payment date: 20040707

Year of fee payment: 11

EXPY Expiration of term