KR900003626Y1 - Vtr's key input automatic control circuit - Google Patents

Vtr's key input automatic control circuit Download PDF

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Publication number
KR900003626Y1
KR900003626Y1 KR2019870014487U KR870014487U KR900003626Y1 KR 900003626 Y1 KR900003626 Y1 KR 900003626Y1 KR 2019870014487 U KR2019870014487 U KR 2019870014487U KR 870014487 U KR870014487 U KR 870014487U KR 900003626 Y1 KR900003626 Y1 KR 900003626Y1
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South Korea
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key
output
key input
level
control unit
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KR2019870014487U
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Korean (ko)
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KR890005512U (en
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양병환
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삼성전자 주식회사
안시환
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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B15/00Driving, starting or stopping record carriers of filamentary or web form; Driving both such record carriers and heads; Guiding such record carriers or containers therefor; Control thereof; Control of operating function
    • G11B15/02Control of operating function, e.g. switching from recording to reproducing
    • G11B15/03Control of operating function, e.g. switching from recording to reproducing by using counters
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B15/00Driving, starting or stopping record carriers of filamentary or web form; Driving both such record carriers and heads; Guiding such record carriers or containers therefor; Control thereof; Control of operating function
    • G11B15/02Control of operating function, e.g. switching from recording to reproducing
    • G11B15/10Manually-operated control; Solenoid-operated control
    • G11B15/103Manually-operated control; Solenoid-operated control electrically operated

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  • Indexing, Searching, Synchronizing, And The Amount Of Synchronization Travel Of Record Carriers (AREA)

Abstract

내용 없음.No content.

Description

브이티알의 키이입력 자동 제어회로VT's key input automatic control circuit

첨부 도면은 본 고안의 실시 회로도.The accompanying drawings are implementation circuit diagrams of the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

1 : 카운터 메모리 2 : 신호반전부1: Counter memory 2: Signal inverting part

3 : 전원 키이제어부 4 : 재생키이제어부3: power key controller 4: playback key controller

5 : 키이입력단 R₁-R10: 저항5: Key input terminal R₁-R 10 : Resistance

TR1-TR3: 트랜지스터 JF1, JF2: 플립플롭TR 1 -TR 3 : Transistor JF 1 , JF 2 : Flip-flop

본 고안은 브이티알에 있어서, 되감기 모우드 수행중에 테이프가 카운터 메모리에 기억된 위치에 도달하면 자동으로 키이입력단에 재생 및 전원키이 신호를 입력시키기 위한 브이티알의 키이입력 자동 제어회로에 관한 것이다.The present invention relates to VT's key input automatic control circuit for automatically inputting a play and power key signal to a key input stage when the tape reaches a position stored in the counter memory during the rewind mode.

종래에는 되감기모우드 수행시 테이프가 카운터 메모리에 기억된 위치에 도달하면 자동멈춤동작만을 함으로써 일반적으로 재생을 하기 위한 되감기 모우드의 종료후에 재생키이를 입력시켜 주어야 하는 불편함과 전원인가된 상태에서 자동멈춤동작이 유지됨에 따라 전력 소모가 발생하는 등의 폐단이 있었다.Conventionally, when the tape reaches the position memorized in the counter memory during the rewind mode, only the automatic stop operation is performed. Generally, the play key is input after the rewind mode is terminated for playback. As the operation was maintained, there was a close such as power consumption.

본 고안은 이와 같은 폐단을 해결하기 위해 카운터 메모리와 키이 입력단 사이에 전원 키이 제어부 및 재생키이 제어부를 구성하여 초기의 되감기 모우드 수행중 테이프가 카운터 메모리에 기억된 위치에 도달하면 자동으로 재생키이가 입력되어 재생모우드로 작동하고 재생모우드가 끝난 후 다시 되감기 모우드를 수행중 테이프 카운터 메모리에 기억된 위치에 오면 자동으로 전원 키이가 입력되어 전원을 "오프"시키도록 안출한 것으로서, 이하 본 고안의 구성 및 작용효과를 설명하면 다음과 같다.The present invention configures the power key control unit and the play key control unit between the counter memory and the key input stage to solve the above-mentioned closure. When the tape reaches the position stored in the counter memory during the initial rewind mode, the play key is automatically input. It operates as a play mode, and after the play mode is over, the power key is automatically inputted to turn off the power when it comes to the position memorized in the tape counter memory during the rewind mode. The following describes the working effect.

카운터 메모리(1)의 출력이 저항(R1-R3) 및 트랜지스터(TR1)로 된 신호 반전부(2)에 인가되게 연결하고, 신호 반전부(2)의 출력이 저항(R8-R10s) 및 트랜지스터(TR3)로된 재생키이제어부(4)에 인가됨과 동시에 J-K플립플롭(JF1)(JF2)로된 전원키이 제어부(3)에 인가되게 연결하며, 재생키이제어부(4)의 출력 및 전원키이 제어부(3)의 출력이 저항(R7)을 통해 B+전원에 연결되는 키이입력단(5)으로 인가되게 연결한 것이다.The output of the counter memory 1 is connected so as to be applied to the signal inverting unit 2 composed of the resistors R 1 -R 3 and the transistor TR 1 , and the output of the signal inverting unit 2 is connected to the resistor R 8- . The regeneration key of the transistor R 10s ) and the transistor TR 3 is applied to the control unit 4, and the power key of the JK flip-flop JF 1 (JF 2 ) is applied to the control unit 3. The output of the fisherman 4 and the power key are connected such that the output of the controller 3 is applied to the key input terminal 5 connected to the B + power through the resistor R 7 .

이와 같이 구성되는 본 고안에 있어서, 되감기모우드 수행중 테이프가 카운터 메모리(1)에 기억된 위치에 도달하면 자동 멈춤이 되면서 카운터 메모리(1)의 출력은 '하이'레벨에서 '로우'레벨로 변환되고, 이 신호가 신호 반전부(2)에 입력되면 신호 반전부(2)에서는 '로우'레벨에서 '하이'레벨로 변환하여 J-K 플립플롭(JF1)의 출력(Q1)이 '로우'레벨에서 '하이'레벨로 변환됨에 따라 반전출력은 '하이'레벨에서 '로우'레벨로 변환되고, J-K 플립플롭(JF2)은 클럭단자(CK)에 인가되어 그 출력(Q2)은 '로우'레벨을 계속 유지함에 따라 트랜지스터(TR2)가 '오프'된다.In the present invention configured as described above, when the tape reaches the position stored in the counter memory 1 during the rewind mode, the automatic stop is performed and the output of the counter memory 1 is converted from the 'high' level to the 'low' level. When the signal is input to the signal inverting unit 2, the signal inverting unit 2 converts the signal from the 'low' level to the 'high' level so that the output Q 1 of the JK flip-flop JF 1 becomes 'low'. Inverted output as it transitions from level to 'high' level Is converted to a "low" level from the "high" level, JK flip-flop (JF 2) is applied to the clock terminal (CK) and the output (Q 2) is a transistor (TR 2 according to still maintain the "low" level ) Is 'off'.

한편, 재생키이제어부(4)에 '하이'레벨전위가 인가되면 트랜지스터(TR3)가 도통되어 키이입력단(5)에 인가되는 전압(Vi)은 다음과 같이 주어진다.On the other hand, when the 'high' level potential is applied to the regeneration key control unit 4, the transistor TR 3 is conducted so that the voltage Vi applied to the key input terminal 5 is given as follows.

이 인가전압은 재생키이에 상응하는 것으로서, 브이티알이 재생모우드로 동작하게 된다.This applied voltage corresponds to the regeneration key, and VTIAL operates as the regeneration mode.

재생모우드로 원하는 화면을 본 후 다시 되감기모우드를 수행중 테이프가 카운터 메모리(1)에 기억된 위치에 도달하면 자동멈춤이 되면서 카운터 메모리(1)의 출력이 다시 '하이'레벨에서 '로우'레벨로 변환되어 신호 반전부(2)에 인가되고 신호 반전부(2)의 출력은 '로우'레벨에서 '하이'레벨로 변환되어 J-K 플립플롭(JF1)의 클럭단자(CK)에 인가되면 J-K 플립플롭(JF1)의 반전출력은 전상태인 '로우'레벨에서 '하이'레벨로 변환되고 이 신호가 J-K 플립플롭(JF2)의 클럭단자(CK)에 인가되면 그 출력(Q2)은 '하이'레벨이 되어 트랜지스터(TR2)가 도통됨에 따라 트랜지스터(TR2)의 콜렉터의 접지전위에 의해 J-K 플립플롭(JF1)(JF2)을 레세트시켜준다.Viewing the desired screen with the playback mode and then rewinding. When the tape reaches the location memorized in the counter memory (1), it automatically stops and the output of the counter memory (1) is changed again from the 'high' level to the 'low' level. Is converted to the signal inverting unit 2 and the output of the signal inverting unit 2 is converted from the 'low' level to the 'high' level and applied to the clock terminal CK of the JK flip-flop JF 1 . Inverted output of flip-flop (JF 1 ) Is converted from the 'low' level to the 'high' level, and when this signal is applied to the clock terminal CK of the JK flip-flop JF 2 , the output Q 2 becomes the 'high' level and the transistor ( TR 2 ) resets the JK flip-flop JF 1 (JF 2 ) by the ground potential of the collector of transistor TR 2 .

한편, 전술한 바와 동일한 회로동작으로 재생키이제어부(4)가 동작하지만 전원키이 제어부(3)내의 저항(R6)값이 재생키이제어부(4)내의 저항(R10)값보다 크므로 키이입력단(5)에 인가되는 전압(Vi)은,On the other hand, since the regeneration key control unit 4 operates by the same circuit operation as described above, the value of the resistance R 6 in the power key control unit 3 is larger than the value of the resistance R 10 in the regeneration key control unit 4. The voltage Vi applied to the key input terminal 5 is

이 되고, 이 인가전압은 전원키이에 상승하는 것으로 브이티알에 전원을 '오프'시켜준다. The applied voltage rises to the power supply key to turn off the power to VTI.

이와 같은 본 고안은 초기의 되감기모우드 수행중 테이프가 카운터 메모리에 기억된 위치에 도달하면 자동으로 재생키이가 입력되어 재생모우드를 작동시키며 이재생모우드가 끝난 후 다시 되감기모우드를 수행시에 테이프가 카운터 메모리에 기억된 위치에 도달하면 자동으로 전원키이가 입력되어 전원을 '오프'시킴으로써 제품의 고급화 및 소비전력의 감소등에 기여한 유용한 고안이다.In this invention, when the tape reaches the position memorized in the counter memory during the initial rewind mode, the play key is automatically input to activate the play mode. When the rewind mode is finished, the tape is counted. When it reaches the location stored in the memory, the power key is automatically input to turn off the power.

Claims (1)

카운터 메모리(1)의 출력이 저항(R1-R3) 및 트랜지스터(TR1)로 된 신호 반전부(2)에 인가되게 연결하고, 신호 반전부(2)의 출력이 저항(R8-R10) 및 트랜지스터(TR3)로된 재생키이제어부(4)에 인가됨과 동시에 J-K 플립플롭(JF1)(JF2), 저항(R4-R6) 및 트랜지스터(TR2)로 된 전원키이 제어부(3)에 인가되게 연결하며, 재생키이제어부(4)의 출력 및 전원키이 제어부(3)의 출력이 저항(R7)을 통해 B+전원에 연결되는 키이입력단(5)으로 인가되게 연결하여 구성함을 특징으로 하는 브이티알의 키이입력 자동 제어회로.The output of the counter memory 1 is connected so as to be applied to the signal inverting unit 2 composed of the resistors R 1 -R 3 and the transistor TR 1 , and the output of the signal inverting unit 2 is connected to the resistor R 8- . A regeneration key consisting of R 10 and a transistor TR 3 is applied to the control unit 4 and at the same time is composed of a JK flip-flop JF 1 (JF 2 ), a resistor R 4 -R 6 , and a transistor TR 2 . The power key is connected to the control unit 3, and the output of the regeneration key control unit 4 and the output of the power key control unit 3 are connected to the key input terminal 5 connected to B + power through the resistor R 7 . VT's key input automatic control circuit, characterized in that the connection is configured to be applied.
KR2019870014487U 1987-08-28 1987-08-28 Vtr's key input automatic control circuit KR900003626Y1 (en)

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KR2019870014487U KR900003626Y1 (en) 1987-08-28 1987-08-28 Vtr's key input automatic control circuit

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Application Number Priority Date Filing Date Title
KR2019870014487U KR900003626Y1 (en) 1987-08-28 1987-08-28 Vtr's key input automatic control circuit

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KR890005512U KR890005512U (en) 1989-04-20
KR900003626Y1 true KR900003626Y1 (en) 1990-04-30

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