KR840002448B1 - Emergency reporting machine - Google Patents

Abstract

An emergency reporting system makes emergency calls of 3-4 automatically which are connected to the places for help, e.g, police, fire station or neighbors etc., as well as providing an emergency alarm to inner building in case of accident. The system makes sequential calls repeatedly and reports the accident with a recorder in which the emergency announcement has been already recorded until the reset botton is recovered. When the telephone line is cut by accident or burglar, the system also provides the alarm. The system records the accident time as well.

Description

Emergency alarm

1 is a diagram showing an overall emergency view of the present invention.

2 is a waveform diagram at various points of the pulse generator, the controller, and the alarm unit of the present invention.

3 is an operation diagram showing the operation of each device and circuit of the present invention.

4 is a circuit diagram showing in detail the power supply circuit 510 of FIG.

5 is a circuit diagram showing in detail the memory operation circuit 560 of FIG.

6 is a circuit diagram showing in detail the logic differential circuits 212, 276, 425 and 554 by the NAND of FIG.

FIG. 7 is a circuit diagram showing in detail the NAND R-S flip-flops 215,222,401,434,527 and 566 of FIG.

FIG. 8 is a circuit diagram showing in detail the monostable multivibrator circuits 242,246,252,266,279,403,404,445,594 and 597 by the NOR of FIG.

9 is a circuit diagram showing in detail the NOR system R-S flip-flops 244, 245, 254 and 553 of FIG.

FIG. 10 is a circuit diagram showing in detail the unstable multivibrators 601 and 533 of FIG.

FIG. 11 is a circuit diagram showing details of relay operation circuits 360, 570, 580, 590 of FIG. 1 and 811, 812, 813, 14, 815, 816, 817 of FIG.

12 is a circuit diagram showing in detail the delay circuits 285,505,523,535,555 and 578 of FIG.

13 is a circuit diagram showing in detail the DC impulse selector circuit 582 of FIG.

FIG. 14 is a circuit diagram showing in detail the complex frequency mode selection signal circuit 595 of FIG.

In the present invention, when the emergency situation is found in the building, or when it is necessary to request emergency salvage, the pushbuttons installed in each room are artificially operated, or theft alarm switch is operated when illegally intruded from the outside of the building. Immediately display and alarm the occurrence of an emergency inside and outside the building, and record the previously recorded three or four recalled calls by using the telephone line to effect one by one at a time. It is related to emergency notification which notifies each called telephone through the telephone line by operating the system.

For example, anti-theft alarm devices, police station emergency alarm devices such as banks, and fire alarms for special buildings have been used as a disaster prevention device for protecting people's lives. Anti-theft alarm system cannot achieve the purpose of anti-theft without the ability to evacuate the house or protect the property in the building from illegal intruders. Police station emergency alarm devices, such as banks, do not have a confirmation mark of alerting on the bank side. There are no alarms and indications, and the installation and maintenance costs are high, and there is a limit to installation. The fire alarm is called only by 119 special telephone number, and is limited to DC impulse selection signal system (traditional mechanical automatic telephone station). There was a costly issue at.

Therefore, the present invention is installed in the place where there is an automatic telephone line anywhere, without any limitation to solve this problem, when an emergency or found inside the building (for example, robbery, theft, intimidation, fire, fire) Poisoning and first-aid patients, etc.) If a push button installed in each room is operated or an anti-theft alarm switch is operated when an illegal invasion is received from the outside of the building, an emergency occurrence is alerted and displayed inside and outside the building, Four locations memorized in advance (for hotels, markets, department stores, high-rise buildings, and special buildings with a lot of public access, for example, 119, 112, police box telephone number, priority) Emergency telephone numbers from banks, money and valuables offices, offices, factories, apartments, houses and warehouses. For purposes of use, for example, police box, telephone number, telephone number 112, 119 to be contacted first, or three places (for example, police box or branch phone number, telephone number to be prioritized, large cities) In the case of 112, in other regions, the called telephone number of the emergency contact telephone number of the 10,000 won administrative office is repeatedly called and recorded in advance at a notification time until the push button for restoring the original is operated. It is notified of the occurrence to each called telephone through the telephone line, and it is urgently saved from the place where it is notified, calling for life and property, and stopping the daily electronic clock to guide the emergency occurrence time, banking and special buildings. Emergency alarm circuit of police station is operated at every notice time, and guard room or security post in apartment or group building Intercom facilities where the intercom facility is located are notified of emergencies from the recorder by calling the guard room or the method post every time of waiting.

If a telephone line is cut intentionally or for the purpose of a crime, or if the telephone line is cut in an accident, the telephone line line is immediately alerted to prevent the crime in advance. If there is a telephone station alarm and display, the building cannot be notified of the emergency.

If the door or window is opened while the door or window switch is turned on during the frequent opening and closing of each door and window that normally goes out of the building, the door or window is opened and notified by a buzzer and the related indicator light for a certain time. It displays the location of the door or window, whether it is opened or closed by ignition, and can be called individually for everyday call purposes without dialing by pressing the corresponding button once. When the emergency is usually used as a warning for the emergency, the state of the emergency notification of the present invention will be checked from time to time, so that each function is fully exhibited in the event of an emergency.

1 is a diagram showing the overall emergency notification of the present invention, the part shown by the dotted line 10 is a receiver 200 for receiving various signals, a pulse generator 600 for generating various pulses and the inside and outside of the building to display and alarm signals It stores the alarm unit 300 to generate and the control unit 400 to generate various control signals and 4 or 3 called telephone numbers, records the emergency notification contents, calls the called telephone by the control signal, and calls the emergency notification contents. It is a device composed of a notification unit 500 that sends out the trunk line and identifies the state of the trunk line, and the part shown by the dotted line 20 is for theft alarm which is operated when opening and closing the doors such as fences, doors and windows and valuables storage places that go out of the building. Switch (mechanical, electro-magnetic or optical transmission can be used, normally it is a high-flow circuit and the circuit is switched off when it is operated) 21 is a transmitter which includes push button 22 for emergency alarm transmission and reception of each room and 23 indicators for trunk line contact status and buzzer 24 which is operated for supervision for normal use and for alarm in case of emergency. Since the case is shown, other senders can recognize the same. The part shown by dotted line 30 is an indicator 31 indicating the same number of emergency occurrence positions as transmitter 20, and the burglar repair circuit 210 and emergency repair circuit associated with doors and windows during the day or during frequent opening and closing of doors and windows. Indicator light 33 indicating the state of switch 32 and switch 33 opening between 220 and push-button 34 for individual call invitations (31, 32, 33 and 34 are shown for one example only) and one note One includes a switch 36 for indicating the status of the switch 36 and a push button 38 for restoring the device to the original state by the alarm site 35 and emergency time being guided. The display panel, indicated by the dotted line 80, indicates the connection status 81 and the first indicating the connection status with the telephone line when two individually called telephones are memorized individually. One individual pager that includes a pushbutton 82 for calling the called phone and a pushbutton 83 for calling the second called phone.

The present invention is composed of the device 10, any number of transmitters 20, the display panel 30, and the individual pager 80, the device 10 is used as a daily clock for everyday use, the electronic clock 40 to guide the emergency occurrence time in case of emergency alarm It is equipped with an incandescent lamp or an emergency bell 50 to display the emergency place outside the building to inform the savior and to alert the intruder to the operation of the alarm system, and the usual telephone 60 used for everyday local telephones. Wherever possible, the intercom 71, the intercom signal line 72, and the police station emergency alarm circuit 73, the telephone line 91 and the alarm line 92, which are connected between the guard room or the security post and the intercom in the building, are used.

Normally, the telephone 60 is connected to the telephone line 91 through the A flat contact of the relay 570, and is used as a normal trunk line telephone. The intercom line 71 is connected to the guard room and the interphone in the building, and the interphone signal line 72 is the B-plane of the relay 360. It is used as an everyday interphone signal line by connecting the guard signal and interphone signal line in the building through the contact point.The emergency alarm circuit 73 of the police box, etc. is composed of the normal circuit by the A-phase contact of the relay 360, and the electronic clock 40 is The power circuit is constructed through the B-phase contact of the relay 350 and used as an everyday electronic clock.The electronic buzzer 24 of each transmitter 20 is used for everyday supervision by pressing the associated pushbutton 34 on the display panel 30. Telephone incoming line 90, including 91 and alarm line 92, is constructed between the device 10 and the incoming terminal box. The alarm line 92 is looped on the self-ship side, and when the telephone line 90 is cut like the one shown in FIG. 3 for the purpose of the crime or accident, the negative pole of the direct current arm through the alarm line 92, or logic 0, is removed. A voltage 0 is applied to the input of the inverter 502 via a resistor 501 for supplying the voltage of the voltage VDD, that is, the protection of the logic first-order notification unit 500, and the voltage of the DC voltage VDD. The logic 0 is applied to the switch 111 at the output of the inverter 502. Is applied to the first input of the AND gate 431 of the control unit 400 through the a, b normal contacts of the logic controller, so that logic 0 is applied to the first input of the NAND gate 431 at the output of the AND gate 431, and logic is applied to the input of the NAND gate 432. When 0 is applied, logic 1 at the output of the NAND gate 432 is biased to the base of the NPN switching transistor 332 through the voltage dividing resistor 331 of the alarm unit 300, and the transistor 332 is turned on. In this case, the potential difference between the emitter and the collector of the transistor 332 becomes almost zero, and the main alarm buzzer 35 for operating the main alarm buzzer 35 of the panel 30 is operated like the burr of FIG. After confirming the cutting state of the telephone line 90, the switch 111 is artificially operated as shown in FIG. 3, so that the positive voltage (VDD) of the DC voltage, that is, logic 1, is controlled through the operation contacts a and c of the switch 111. Applied to the first input of the AND gate 431, the logic 1 output of the AND gate 431 is provided to the first input of the NAND gate 432, so that the operation circuit of the main alarm buzzer 35 is restored, and the main alarm buzzer 35, as shown in FIG. Stop the operation.

출력), 32T(디코더 443의

출력), 48T후(디코더 443의

출력), 64T후(디코더 443

출력), 80T후(디코더 443의

출력)가운데서 설치장소에 적합한 경보개시시간을 선택하고(본 설명에서는 64T후를 선택한 것을 예로 들었음), 선택스윗치 103A 및 B에 의하여 피호출전화의수 3개소 또는 4개소 가운데서 적합한 것을 선택하며(본 설명에서는 4개소의 피호출전화를 호출할 수 있게 선택하였음), 선택스윗치 104에 의하여 화재속보용 또는 비상통보용 가운데서 적합한 것을 선택하고(본 설명에서는 비상통보용을 선택하였음), 통보부 500의 선택스윗치 105에 의하여 피호출전화번호의 자리수 7자리, 6자리, 5자리 가운데서 적합한 자리수를 선택하며 (본 설명에서는 7자리를 선택한 것을 예로 들었음), 선택스윗치 106에 의하여 전화기 60이 속하는 전화국의 선택신호방식을 선택하고(선택신호방식은 직류임펄스 선택신호방식과 복합주파수방식선택신호방식이 있으며, 본 설명에서는 복합주파수방식 선택신호방식을 선택한 것을 예로 들었음), 전원스윗치 107를 동작시킴으로서 VDD전원을 계전기 580의 A평상접점과 전원스윗치 107의 a, c동작접점을 통하여 녹음기 573에 공급하여 비상통보내용을 녹음하고 또 녹음상태를 계전기 580의 B평상접점을 통하여 녹음기 573에 스피커 S에 의하여 확인하며, 조작스윗치 108를 동작시키면 조작스윗치 108의 a, b평상접점이 개방됨으로 직류전압의 음극이 리. 다이알회로(Re Dial Circuit) 520에서 제거됨으로 리. 다이알발신이 불가능하며, 또 조작스윗치 108의 a, c동작접점에 의하여 직류전압의 음극 즉 논리 0을 BND게이트 551의 제2입력에 가하여 상기 AND게이트 551를 동작할 수 없게 하고, 또 인버터 512의 입력에 제공됨으로 상기 인버터 512의 논리1 출력이 전원회로 510에 입력되어 상기 전원회로 510의 출력에서 다이아라 칩 561의 VDD입력에 정격전압의 직류전압의 양극을 공급한다.By selecting the switch 101 of the pulse generator 600 of the device 10, select the fundamental wave T suitable for the installation place among the fundamental wavelengths 300mS, 400mS, 500ms, 600mS and 700mS indicated in T of Fig. 2 ( For emergency notification of the same simple content, if the basic wavelength of 300mS, that is, 76,8 seconds of one notification time, is selected, this example uses the 500mS basic wavelength. Therefore, the notification time is 128 seconds.) As shown in F 'of FIG. 2 by the selection switch 102 of the control unit 400, the alarm start time is 16T after the start (decoder 443

Output), 32T (decoder 443

After 48T (decoder 443 output)

After 64T (decoder 443)

80T after (decoder 443

Select the appropriate alarm start time for the installation site (in this description, the example is after 64T), and select the appropriate one out of three or four called calls by the selection switches 103A and B. In the explanation, four calls to be called are selected to be called.) By the selection switch 104, a suitable one is selected from among the fire breaking news or the emergency notification (in this description, the emergency notification is selected). The selection switch 105 selects a suitable digit from among 7, 6, and 5 digits of the called telephone number (in this description, the selection of 7 digits is taken as an example), and the selection switch 106 selects the telephone company to which the telephone 60 belongs. Select the signal method (selection signal method is a DC impulse selection signal method and a complex frequency method selection signal method, and in this description In this case, the VDD power supply is supplied to the recorder 573 through the A contact contact of relay 580 and the a, c operation contact of power switch 107 by operating power switch 107. Record and check the recording status by the speaker S to the recorder 573 through the B flat contact of the relay 580. When the operating switch 108 is operated, the a and b flat contacts of the operating switch 108 are opened to remove the negative pole of the DC voltage. Removed from Re Dial Circuit 520. Dial-out is impossible, and the AND gate 551 cannot be operated by applying the negative voltage of the DC voltage, that is, logic 0, to the second input of the BND gate 551 by the a and c operation contacts of the operation switch 108, and also disables the operation of the inverter 512. The logic 1 output of the inverter 512 is input to the power supply circuit 510 to supply an anode of a DC voltage of a rated voltage to the VDD input of the diamond chip 561 at the output of the power supply circuit 510.

4 is a circuit diagram showing in detail the power supply circuit 510 shown in FIG. The input of this circuit is coupled to the output of the inverter 512 and the Q output of the R-S flip-flop 401 of the controller 400, and the output of this circuit is coupled to the VDD input of the diamond chip 561. When logic 1 is applied to the input of the NOR gate 701, which is the input of the power supply circuit, logic 0 is applied at the output of the NOR gate 701 through the voltage divider resistor 702 to bias the base of the PNP switching transistor 703 so that the transistor 703 becomes conductive. The positive voltage (VDD) is connected to the negative voltage of the DC voltage through the voltage drop resistor 704 and the zener diode 705 of the rated voltage of the diamond chip 561, and the connection point between the resistor 704 and the zener diode 705 is When connected to the emitter, when the transistor 703 is turned on, the positive voltage of the DC voltage of the rated voltage is supplied to the input of the VDD of the diamond chip 561 at the output of the power supply circuit 510.

When the e and d normal contacts of the operation switch 108 are opened, the DP output of the diamond chip 561 and the second input of the NOR gate 539 and the B input of the monostable multi-varbrator 534 are opened. d, f The negative contact, or logic 0, of the DC voltage is applied to the second input of the NOR gate 539, the B input of the monostable multivibrator 534, and the input of the memory control circuit 560 by the operation contact to store the called telephone number. The dial impulse cuts the output to the telephone line.

5 is a circuit diagram showing in detail the memory operation circuit 560 shown in FIG. The first input of the AND gate 712 of this circuit is directly coupled to the DP output of the diamond chip 561, and the second input of the AND gate 712 connects the d, e-flat contact of the operation switch 108 to the DP output of the diamond chip 561. The AND gate 712 cannot operate in the normal state because the operation switch 108 is coupled through the inverter 711. When the operation switch 108 is operated, the negative voltage of the DC voltage through the d and f operation contacts of the operation switch 108 is called logic. Since 0 provides logic 1 to the second input of AND gate 712 through inverter 711, if logic 7 is output at DP output of dia chip 561, logic 1 is passed through voltage divider resistor 713 at NP output of AND gate 712. Is provided at the base of the transistor 714, and through the phone number memory operation indicator 110 by the light emitting diode at the anode of direct current voltage (VDD), The circuit is composed of the negative voltage of the DC voltage through the selector and the emitter, and the phone number memory control indicator 110 is blinked by an impulse output from the DP output of the chip 561 to indicate the memory progress status of the called telephone number. . Phone number memory key. The board 109 consists of three rows and four rows of pushbuttons, each row coupled to the Y1-Y4 input of the diamond chip 561, with the first row at the base of the NPN switching transistor 716. Row 2 is connected to the base of the NPN switching transistor 717, and column 3 is connected to the base of the NPN switching transistor 718, respectively, and the emitters of the transistors 716, 717 and 718 are connected to the cathode of the DC voltage, and the collector of the transistor 716 is connected to the base of the NPN switching transistor 717. The first input of the AND gate 719 and the X1 input of the diamond chip 561, the collector of the transistor 717 is coupled to the second input of the AND gate 719 and the X2 input of the diamond chip 561, the transistor 718, the collector is AND The third input of the gate 719 and the X3 input of the diamond chip 561, the output of the AND gate 719 is coupled to the input of the inverter 568, the output of the inverter 568 is coupled to the S input of the NOR RS flip-flop 553 Called Phone Number If you press any number push button of key board 109, the related transistor is connected through the push button pressed at the related Y input of the diamond board 561, and logic 0 is connected to the related input of the AND gate 719 and the related connection of the diamond chip 561. Provided to the X input, the impulse corresponding to the pushbutton pressed from the DP output of the diamond chip 561 is output, and the logic 0 output of the AND gate 719 is the SOR input of the NOR RS flip-flop 553 via the inverter 568. The logic 1 is output from the output of the inverter 568 when it is connected to the collector of 553 and is transmitted to the re dialing circuit 520 '.

As shown in F 'of Fig. 2 by the selector switch 112 of the control unit 400, the effective emergency notification time from the column to 160T (10 outputs of the decoder 443), up to 176T (11 outputs of the decoder 443) and up to 192T (of the decoder 443). 12 emergency outputs, up to 208T (13 outputs of the decoder 443) and 224T (14 outputs of the decoder 443), select the effective emergency call time appropriate for the installation location. (In this description, we have chosen up to 160T)

If the switch 32 associated with the door or window of the display panel 30 is operated as shown in FIG. 3 during a time when a door or window is frequently opened among the door or window to which the burglar alarm switch 21 is attached, the switch 32 d, f Through the operating contact, the negative voltage of the DC voltage is ignited to indicate that the switch 33 is in operation, and the a, b normal contact of the switch 32 is opened, and the burglar repair repair circuit 210 and the emergency repair circuit 220 are opened. do. In this state, when the burglar alarm switch 21 associated with the door or window is operated as shown in FIG. 3, the logic 1 is removed from the positive voltage VDD of the DC voltage as the negative voltage of the DC voltage provided through the switch 21 is removed. The logic differential circuit 212 by the NAND is provided to the input via a resistor 211 for supplying the positive and negative voltage (VDD) of the protection and the regulated voltage, and logic 0 is DC cut-off and correction for 1 nS at the output of the logic differential circuit 212 by the NAND. The charging capacitor 213 and the resistor 214 for supplying the positive voltage (VDD) of the direct current voltage are charged.Then, a trigger pulse of logic 0 through the capacitor 213 is provided to the S input of the NAND type flip-flop 215 to set it. Set).

FIG. 6 is a circuit diagram showing in detail the logic differential circuits 212, 276, 425 and 554 by the NAND shown in FIG. The input of this circuit is coupled to the first input of the NAND gate 721 and the first and second inputs of the NAND gate 721. The output of the NAND gate 722 is passed through a 1 ms time constant resistor 723 and through a 1 ms time constant capacitor 724. The connection point between the resistor 723 and the capacitor 724 is coupled to the second input of the NAND gate 721 via the protective resistor 725, and the output of the NAND gate 721 is the output of the differential differential circuit by the NAND. When logic 0 is applied to the input of this circuit, logic 1 is charged from the output of NAND gate 722 by CR time constant to 1ms time constant capacitor 724 through 1ms time constant resistor 723, and then to the first input via protective resistor 725. When logic 1 is applied to the output of the NAND gate 721 by applying logic 1 to the second input of the NAND gate 721 to which logic 0 is applied, logic 0 is output from the output of the NAND gate 722 when logic 1 is applied to the input of the circuit. The positive potential charged in the capacitor 724 is applied to the second input of the NAND gate 721 through the protection resistor 725 during the discharge period by the CR time constant through the resistor 723, i.e., 1 mS, for 1 mS at the output of the NAND gate 721. This circuit outputs logic 0.

는 NAND게이트 731의 제1입력에 결합되어 있으며, NAND게이트 731의 제2입력은 NAND게이트 732의 출력에 결합되고, 또 R-S 플립·플롭의

출력이며, 입력 R은 NAND게이트 732의 제1입력에 결합되며, NAND게이트 732의 제2입력은 NAND게이트 731의 출력에 결합되어 있으며, 또 R-S플립·플롭의 Q출력이다.

입력에 논리0이 가해지면 셋(Set)되어 Q출력에서 논리1이 출력되고

출력에서 논리0이 출력되며, R입력에 논리0이 가해지면 리셋트(Re Set)되어 Q출력에서 논리0이

출력에서 논리1이 출력되는 NAND방식 R-S플립·플롭이다.FIG. 7 is a circuit diagram showing in detail the NAND system flip flip flops 215, 222, 401, 434, 527 and 566 shown in FIG. input

Is coupled to the first input of NAND gate 731, the second input of NAND gate 731 is coupled to the output of NAND gate 732, and

The output R is coupled to the first input of the NAND gate 732, the second input of the NAND gate 732 is coupled to the output of the NAND gate 731, and is the Q output of the RS flip-flop.

When logic 0 is applied to input, it is set and logic 1 is output from Q output.

Logic 0 is output from the output. When logic 0 is applied to the R input, it is reset and logic 0 is output from the Q output.

This is a NAND RS flip-flop with logic 1 output from the output.

출력에서 논리0이 NAND게이트 231의 제1입력에 가해지며, 상기 NAND게이트 231의 입력에 논리0이 제공되면 상기 NAND게이트 231의 출력에서 논리1이 분압용 저항기 232를 통하여 NPN스윗칭 트랜지스터 233의 베이스에 바이아스전압이 가해져서 상기 트랜지스터 233을 도통시키고, 상기 트랜지스터 233의 도통으로 직류전압의 음극이 표시판 30의 관련된 표시등 31에 가해지는 표시등 31의 작동회로에 의하여 표시등 31이 3제도의 랴와 같이 점화되어 개폐된 문 또는 창의 위치를 표시한다. 또 NAND방식 R-S플립·플롭 215의 Q출력에서 논리1이 OR게이트 240의 입력에 가해지고(OR게이트 240의 입력수는 발신기 20의 수와 동일하여야 하며 본 설명에서는 4개의 발신기 20의 경우를 예로들었음), OR게이트 240의 논리1출력이 직류차단용 콘덴서 241를 통하여 NORm.m (NOR에 의한단안정·멀티·바이브레이터 monostable multivibrator) 242에 가해져서 상기 NORm.m 242의 출력에서 1ms동안 논리1를 OR게이트 243의 제1입력을 통하여 NOR방식 R-S플립·플롭 244의 245, S입력에 가하여 상기 두 R-S 플립·플롭을 셋시킨다.If NAND RS flip-flop 215 is set,

When logic 0 is applied to the first input of the NAND gate 231 at the output, and logic 0 is applied to the input of the NAND gate 231, logic 1 is applied at the output of the NAND gate 231 to the NPN switching transistor 233 through the voltage divider resistor 232. A bias voltage is applied to the base to conduct the transistor 233, and the conduction of the transistor 233 causes the indicator 31 to operate by the operating circuit of the indicator 31 in which the cathode of the DC voltage is applied to the associated indicator 31 on the display panel 30. Mark the position of a door or window that has been ignited and opened as shown. In addition, logic 1 is applied to the OR gate 240 input at the Q output of the NAND RS flip-flop 215 (the number of inputs of the OR gate 240 should be the same as the number of the transmitters 20. The logic 1 output of the OR gate 240 is applied to the NORm.m (monostable multivibrator) 242 through the DC blocking capacitor 241, and the logic 1 output for 1 ms at the output of the NORm.m 242. Is applied to the 245, S input of the NOR system RS flip flop 244 through the first input of the OR gate 243 to set the two RS flip flops.

8 is a circuit diagram showing in detail the NOR m.m (mono-stable multivibrator by NOR) 242,246,252,266,279,403,404,445,594 and 597 shown in FIG. The input through the capacitor of this circuit is coupled to the first input of the NOR gate 743 through a resistor 741 and a protective resistor 742 for supplying a negative pole of a DC voltage connected to the negative pole of a DC voltage. And supply the positive voltage of the DC voltage connected to the positive voltage of the DC voltage (VDD) through the 1 mS time constant capacitor 744 and is coupled to the first and second inputs of the NOR gate 747 through the 1 mS time resistance resistor 745 and the protective resistor 746. The output of the NOR gate 747 is coupled to the second input of the NOR gate 743 and is also the output of NOR mm. The capacitor of the input terminal is normally in a discharged state, and the negative pole of the DC voltage, that is, logic 0, is connected to the NOR gate 743 through the resistors 741 and 742. Since the logic 1 is applied to the capacitor 744 at the output of the NOR gate 743 because it is applied to the first input, the capacitor 744 is discharged, and the positive voltage VDD of the DC voltage, that is, logic 1 is low. When logic 1 is applied to the input of NOR gate 747 through 745 and 746, logic 1 is applied to the NOR mm input terminal capacitor during the output of logic 0 from the output of NOR gate 747 to the second input of NOR gate 743 and the output of NOR mm. Charge by CR time constant through resistor 741 and trigger pulse according to charging is applied to the first input of NOR gate 743 through protective resistor 742, and the logic 0 output of NOR gate 743 is CR by capacitor 744 and resistor 745. The trigger pulse of logic 0 is applied to the input of the NOR gate 747 through the protective resistor 746 and the logic 1 is output for 1 ms at the output of the NOR gate 747 during the time constant, that is, charging for 1 mS.

출력이다. S입력에 논리1이 가해지면 셋되어 Q출력에서 논리1,

출력에서 논리0을 출력하고, R입력에 논리1이 가해지면 리셋트되어 Q출력에서 논리 0,

출력에서 논리 1이 출력되는 NOR방식 R-S플립·플롭이다.9 is a circuit diagram showing in detail the NOR system RS flip-flops 244, 245, 254 and 553 shown in FIG. The input S is coupled to the first input of the NOR gate 751, the second input of the NOR gate 751 is coupled to the output of the NOR gate 752, and is the Q output of the RS flip-flop, and the input R is the first of the NOR gate 752. Coupled to the input, the second input of the NOR gate 752 is coupled to the output of the NOR gate 751, and the RS flip-flop

Output. When logic 1 is applied to S input, it is set.

Outputs logic 0 at the output, resets when logic 1 is applied to the R input, and resets logic 0,

NOR RS flip-flop with logic 1 output from the output.

출력에서 논리0이 제어부 400, AND게이트 431의 제2입력에 가해지고 상기 AND게이트 431의 논리0 출력이 NAND게이트 432의 제1입력에 가해지고, 상기 NAND게이트 432의 논리1 출력에 의한 주경보부져 35의 작동회로에의하여 제3도의 바와같이 표시판 30의 주경보부져 35를 동작시켜 문 또는 창이 개폐된 것을 경보하며, 펄스발생부 600의 16진 카운터 602의 D출력에서 논리1이 출력되는 제2도의 E 즉 기동에서 8T후에 NOR방식 R-S플립·플롭 245의 R입력에 논리1이 가해져서 상기 245가 리셋트되고, 상기 NOR방식 R-S플립·플롭 245의 셋기간중 주경보부져 35를 8T간동작시킨다. 16진 카운터 602의 D출력에서 제2도의 D(16T)와 같은 파형을 가진 펄스가 4분주 카운터 603의 E입력에 제공되어 계수되며, 4분주 카운터 603의 C출력에서 논리1이 출력되면 (16T×4=64T후) OR게이트 604의 제1입력을 통하여 상기 카운터 상기 카운터 602와 603의 R입력과 수신부 200의 NOR방식 R-S플립×플롭 244의 R입력에 논리1이 가해져서 상기 602,603과 244를 리셋트시키고, NOR방식 R-S 플립·플롭 244의 리셋트로 상기 244

출력은 논리0에서 논리1로 스윗칭됨으로 NOR m.m 246의 출력에서 1mS동안 논리1이 분압용 저항기 247를 통하여 NPN스윗칭 트랜지스터 248를 1mS동안 도통시키며, 트랜지스터 248의 도통으로 직류전압의 음극을 NAND방식 R-S플립·플롭 215의 R입력에 가하여 상기 215를 리셋트시킴으로 NAND게이트 231의 제1입력에 상기 215,

출력에서 논리1를 가하여 표시판 30의 표시등 31를 제3도의 랴에 표시한 바와같이 64T간 점화시킨후 멸화되는-도난경보 수신회로 210에 의하여 스윗치 32가 농작중에 관련된 문 또는 창이 개폐되면 그 위치를 표시한다.When the NOR RS flip-flop 244 is set, logic 1 at the Q output is applied to the am (unstable multivibrator) 601 of the pulse generator 600 through the first input of the OR gate 402 of the controller 400. A pulse of T second wave selected by selection switch 101 is supplied to the E input of the hexadecimal counter 602 and counted, and a pulse having waveforms such as A, B, C and D of FIG. Is output from the A, B, C, and D outputs of the hexadecimal counter 602. When the NOR system RS flip flop 245 is set,

In the output, logic 0 is applied to the second input of the controller 400, AND gate 431, and logic 0 output of the AND gate 431 is applied to the first input of NAND gate 432, and the main alarm by the logic 1 output of the NAND gate 432. By operating the circuit of the buzzer 35, as shown in FIG. 3, the main alarm buzzer 35 of the display panel 30 is operated to alarm that the door or window is opened and closed, and logic 1 is output from the D output of the hexadecimal counter 602 of the pulse generator 600. Logic 1 is applied to the R input of the NOR system RS flip-flop 245 after 8T of E of 2 degrees or starting, and the 245 is reset, and the main alarm buzzer 35 is set to 8T during the set period of the NOR system RS flip-flop 245. Operate. In the D output of the hexadecimal counter 602, a pulse having the same waveform as D (16T) in FIG. 2 is provided and counted at the E input of the 4 division counter 603, and logic 1 is output from the C output of the 4 division counter 603 (16T). 4 = 64T after) Logic 1 is applied to the R input of the counters 602 and 603 and the R input of the NOR RS flip-flop 244 of the receiver 200 through the first input of the OR gate 604. Reset and reset the NOR system RS flip-flop 244 to 244 above.

The output is switched from logic 0 to logic 1, so that logic 1 conducts NPN switching transistor 248 for 1mS through the voltage divider resistor 247 for 1mS at the output of NOR mm 246, and conducts the negative voltage of DC voltage by conduction of transistor 248. In addition to the R input of the RS flip-flop 215, the 215 is reset to the first input of the NAND gate 231.

If the switch 32 is opened or closed by the burglar alarm receiver circuit 210, which is extinguished after 64T ignition for 64T, as indicated in the illustration of Figure 3, by applying logic 1 at the output, Is displayed.

FIG. 10 is a circuit diagram showing details of a.m (unstable multivibrator) 601 and 533 shown in FIG. The input of this circuit is coupled to the input of the inverter 761, and via the protective resistor 763 to the output of the inverter 761 and the input of the inverter 762 via the time constant resistor 764, and the connection point between the resistors 763 and 764 is the time constant capacitor 765 (For 601B, 765B is 300mS time constant capacitor, 765C is 400mS time constant capacitor, 765D is 500mS time constant capacitor, 765E is 600mS time constant capacitor, 765F is 700mS time constant capacitor, and 533 is 1mS time constant capacitor) Is connected to one end, and the other end of the capacitor 765 (the capacitor selected by the selection switch 101 in 601) is coupled to the output of the inverter 762 and becomes the output of am. When logic 1 is applied to the input of this circuit, 533 outputs 1mS pulse at the output of inverter 762 by CR time constant by time constant resistor 764 and time constant capacitor 765. Output a pulse of wavelength.

입력에 논리0이 가해짐으로 상기 두 NAND방식 R-S플립·플롭을 셋시키며, NAND방식 R-S플립·플롭 215의 셋으로 상술한 NOR방식 R-S플립·플롭 244와 245가 셋되어 제3도의 바에 표시된 바와 같이 주경보부져 35를 8T간 동작시킨다. 또 NAND방식 R-S플립·플롭 222의 Q출력에서 논리1이 신호수신용 OR게이트 250을 통항고 직류차단 겸 시정수용 콘덴서 251를 통하여 NOR m.m 252의 입력의 트리거 펄스를 가하면, 상기 NOR m.m 252의 출력에서 1mS동안 논리1이 두곳으로 제공되는데, 한곳은 OR게이트 243의 제2입력을 통하여 NOR방식 R-S플립·플롭 244와 245의 S입력에 제공되는데 상기 244와 245는 OR게이트 243의 제1입력을 통하여 이미 셋되어 있으며, 다른 한 곳은 OR게이트 203의 제1입력을 통하여 NOR방식 R-S플립·플롭 254의 S입력에 가해져서 상기 NOR방식 R-S플립·플롭 254가 셋되고, 상기 254의 Q출력에서 논리1이 제어부 400의 AND게이트 421의 제1입력에 제공되는데, AND게이트 421의 제2입력은 D플립·플롭 274의

출력에 결합되어 있음으로 평상시 논리1이 가해져 있어 상기 AND게이트 421와 출력에서 논리1이 넷(4)곳으로 제공되며, 한 곳은 펄스발생부 600의 16진 카운터 602의 B출력에 결합되어있는 AND게이트 422의 제2입력에 제공되어 AND게이트 422의 출력에서 제2도의 B(2T간 논리0 2T간 논리1)에 표시된 바와 같은 파형을 가진 펄스를 셋(3)곳으로 출력하며, 한 곳은 경보부 200의 인버터 321를 통하여 SSR(접점을 가진 계전기와 같은 기능을 가진 固體化繼電器 Solid state relay) 322를 작동시켜 건물외부의 건물외부의 백열전등 또는 은행등의 비상벨 50을 제3도의 마에 표시된 바와같이 제2도의 B와 같은 파형을 가진 펄스로 단속 작동시켜 구원자에게 비상사태발생장소를 표시하고, 범행자에게 경보장치의 완전함을 인지시켜 범행을 포기토록 경보한다. 다른 한곳은 수신부 200의 인버터 236을 통하고 분압용 저항기 235를 거쳐 NPN스윗칭 트랜지스터 234의 베이스 바이아스전압을 가하여 상기 트랜지스터 234를 제2도의 B와 같은 파형을 가진 펄스로 온(ON) 오푸(OFF)시킴으로 NPN스윗칭 트랜지스터 233의 에미터에 직류전압의 음극이 2T간격으로 제공되는데, NAND방식 R-S플립·플롭 222가셋되면 그

출력에서 논리0이 NAND게이트 231의 제2입력에 가해지며 NAND게이트 231의 입력에 논리0이 가해지면 NPN스윗칭 트랜지스터 233의 베이스에 바이아스전압이 가해지고 상기 트랜지스터 233의 에미터에 2T간격으로 제공되는 직류전압의 음극에 의하여 표시판 30의 관련 표시등 31를 제3도의 라와같이 2T간격으로 점멸시켜 비상사태발생 위치를 표시한다. 또 다른 한곳은 경보부 300의 NAND게이트 371의 제1입력에 제공되어 부져 24의 동작회로를 준비한다. AND게이트 421의 출력에서 논리1이 제공되는 다른 한곳은 경보부 300의 AND게이트 311를 통하여 분압용 저항기 312를 거쳐 NPN스윗칭 트랜지스터 313의 베이스에 바이아스전압이 가해져서 상기 트랜지스터 313을 도통시킴으로 직류전압의 음극이 두 곳으로 제공되며, 한 곳은 PNP 스윗칭 트랜지스터 353의 콜랙터에 제공되어 계전기 350의 작동회로를 준비시키고, 다른 한곳은 NPN스윗칭 트랜지스터 342의 에미터에 제공되며, 통보부 500의 AND게이트 565의 출력에서 논리1이 경보부 300의 분압용 저항기 341에 가해지면 상기 저항기 341를 통한 바이아스전압이 NPN스윗칭 트랜지스터 342의 뻗이스에 가해짐으로, 상기 틀내지스터 342의 에미터에 직류전압의 음극이 제공되어 있으면 상기 트랜지스터 342는 도통되고, 트랜지스터 342의 도통으로 직류전압의 음극이 분압용 저항기 343을 통하여 PNP스윗칭 트랜지스터 344의 베이스에 바이아스전압을 가함으로 상기 트랜지스터 344가 도통되며, 트랜지스터 344의 도통으로 직류전압의 양극(VDD)을 각 발신기 20의 표시등 23에 가하는 표시등 23의 국선접속상태표시회로에 의하여 제3도의 사에 표시된 바와 같이 표시등 23을 점화시켜 국 선접속상태를 표시한다. AND게이트 421의 출력에서 논리1이 제공되는 또 다른 한곳은 펄스발생부 600의 16진 카운터 602의 C출력에 결합되어 있는 AND게이트 423의 제2입력에 제공되어 AND게이트 423의 출력에서 제2도의 C(4T간 논리 04, 간 논리1)에 표시된 바와 같은 파형을 가진 펄스를 AND게이트 446의 제1입력에 가하여 경보회로를 준비시키고, 끝으로 인터터 424를 통하여 NAND에 의한 논리미분회로 425의 입력에 논리0을 가하며, 비상통보완료후 표시판 30의 원상복구용 푸시버튼 38를 동작시키면 직류전압의 음극이 푸시버튼 38를 통하고 인버터 270을 통하여 NOR방식 R-S플립·플롭 254의 R입력에 논리1이 가해지는 원상복구기동회로에 의하여 상기 R-S플립·플롭 254가 리셋트되면 상기 254의 Q출력은 논리1에서 논리0으로 스윗칭되고, 따라서 AND게이트 421의 출력에서 논리0이 출력되고, 인버터 424를 통하여 NAND에 의한 논리미분회로 425의 입력에 논리1이 가해짐으로서 상기 425의 출력에서 1mS동안 논리0이 수신부 200의 분압용 저항기 255를 통하여 PNP스윗칭 트랜지스터 256의 베이스에 바이아스 전압이가해지고, 상기 트랜지스터 256이 도통됨으로 직류전압의 음극을 NAND방식 R-S플립·플롭 222의 R입력에 가하여 상기 222를 리셋트시킨다.When the switch 32 of the display panel 30 is in the normal state, any door or window is opened and closed so that the associated burglar alarm switch 21 is operated as shown in Fig. 3, so that the logic 0 for 1 mS at the output of the logic differential circuit 212 by the associated NAND. Or the pushbutton 22 for emergency alarm transmission of the transmitter 20 to which the burglar alarm switch 21 belongs is artificially operated as shown in FIG. 3C. In this case, the associated NAND RS flip-flops 215 and 222, through the a, b normal contacts of the associated switch 32 of the display panel 30,

A logic 0 is applied to the input to set the two NAND RS flip-flops, and the NOR RS flip-flops 244 and 245 described above are set to the set of NAND RS flip-flops 215, as shown in FIG. Likewise, the main alarm buzzer 35 is operated for 8T. In addition, when the logic 1 at the Q output of the NAND type RS flip-flop 222 passes the OR gate 250 for signal reception and applies a trigger pulse of the NOR mm 252 input through the DC blocking and time constant capacitor 251, the NOR mm 252 output Logic 1 is provided in two places during 1mS, one of which is provided to the S inputs of the NOR-type RS flip-flops 244 and 245 through the second input of the OR gate 243, wherein 244 and 245 are provided through the first input of the OR gate 243. Already set, the other is applied to the S input of the NOR type RS flip-flop 254 via the first input of the OR gate 203 so that the NOR type RS flip-flop 254 is set, and the logic at the Q output of 254. 1 is provided to the first input of the AND gate 421 of the controller 400, and the second input of the AND gate 421 is the D flip-flop 274.

Since logic 1 is normally applied to the output, logic 1 is provided to the four gates of the AND gate 421 and the output, and one is coupled to the B output of the hexadecimal counter 602 of the pulse generator 600. The output of the AND gate 422, which is provided to the second input of the AND gate 422, outputs a pulse having a waveform as shown in B (Fig. 2T logic 0 to 2T logic 1) in FIG. The SSR (Solid State Relay Solid State Relay) 322 is operated through the inverter 321 of the alarm unit 200, and an emergency bell 50 such as an incandescent lamp or a bank outside the building outside the building is connected to the village of FIG. As indicated, it is intermittently operated by a pulse having a waveform as shown in B of FIG. 2 to indicate the place of emergency to the savior, and alerts the killer to give up the crime by knowing the completeness of the alarm device. The other part is applied via the inverter 236 of the receiver 200 and the base bias voltage of the NPN switching transistor 234 through the voltage divider resistor 235 to turn the transistor 234 into an ON pulse with a waveform having a waveform as shown in FIG. OFF), the anode of the NPN switching transistor 233 is provided with a cathode of DC voltage at 2T intervals, and when the NAND type RS flip-flop 222 is set,

In the output, logic 0 is applied to the second input of the NAND gate 231, and logic 0 is applied to the input of the NAND gate 231, a bias voltage is applied to the base of the NPN switching transistor 233, and the emitter of the transistor 233 is spaced 2T apart. The associated indicator 31 of the display panel 30 blinks at 2T intervals as shown in Fig. 3D by the provided DC voltage cathode to indicate the location of emergency occurrence. Another is provided at the first input of the NAND gate 371 of the alarm unit 300 to prepare the 24 operating circuits. The other one where logic 1 is provided at the output of the AND gate 421 is a bias voltage applied to the base of the NPN switching transistor 313 through the voltage divider resistor 312 through the AND gate 311 of the alarm unit 300 to conduct the transistor 313 so that the DC voltage is conducted. Two cathodes are provided, one is provided to the collector of the PNP switching transistor 353 to prepare the operating circuit of the relay 350, the other is provided to the emitter of the NPN switching transistor 342, and the notification unit 500 When logic 1 at the output of AND gate 565 is applied to the voltage dividing resistor 341 of the alarm unit 300, a bias voltage through the resistor 341 is applied to the extension of the NPN switching transistor 342, thereby causing the emitter of the frame resistor 342 to be discharged. Is provided with a negative voltage of the direct current voltage, the transistor 342 is turned on, and the negative voltage of the direct voltage is divided by the conduction of the transistor 342. Transistor 344 is turned on by applying a bias voltage to the base of the PNP switching transistor 344 through 343, and conduction of transistor 344 causes the indicator 23 to apply a direct current voltage (VDD) to the indicator 23 of each transmitter 20. By the trunk line connection status display circuit, as shown in Fig. 3, the indicator 23 is ignited to indicate the trunk line connection status. Another place where logic 1 is provided at the output of AND gate 421 is provided to the second input of AND gate 423 which is coupled to the C output of hexadecimal counter 602 of pulse generator 600 so that A pulse having a waveform as shown in C (between 4T logic 04 and inter logic 1) is applied to the first input of the AND gate 446 to prepare an alarm circuit. Finally, the logic differential circuit 425 When logic 0 is applied to the input and the pushbutton 38 for restoring the original of the display panel 30 is operated after the emergency notification is completed, the negative voltage of the DC voltage is pushed through the pushbutton 38 and the logic of the R input of the NOR type RS flip-flop 254 is passed through the inverter 270. When the RS flip-flop 254 is reset by the original restoration start circuit to which 1 is applied, the Q output of the 254 is switched from logic 1 to logic 0, so that logic 0 is output from the output of the AND gate 421, and the inverter 424 Logic 1 is applied to the input of the logic differential circuit 425 by NAND, so that a bias voltage is applied to the base of the PNP switching transistor 256 through the voltage divider resistor 255 of the receiver 200 for 1 mS at the output of the 425. Since the transistor 256 is turned on, the cathode of the DC voltage is applied to the R input of the NAND type RS flip-flop 222 to reset the 222.

출력에서 논리0이 제어부 400의 여섯(6)곳으로 제공되는데, 첫째로 제2입력에 NOR m.m 445의 출력에서 논리0이 가해져 있는 OR게이트 411의 제1입력에 제공되어 NOR방식 R-S플립·플롭 412 및 10진 카운터 536의리셋트회로의 리셋트신호출력을 제거시키는데, OR게이트 411의 출력은 NRO방식 R-S플립·플롭 412의 R입력에 직접결합되어 있으며, 또 통보부 500의 OR게이트 531의 제1입력을 통하여 전화번호자리수계수용 10진 카운터 536의 R입력에 결합되어 NOR방식 R-S플립·플롭 412 및 10진 카운터 536의 리셋트회로가 구성되고, 상기 OR게이트 411의 출력에서 논리1이 출력되면 상기 412 및 536은 리셋트된다. 두번째로 인버터 413을 통하여 NAND게이트 414의 제1입력에 논리1이 제공되는데, NAND게이트 414의 제2입력은 NOR방식 R-S플립·플롭 412의

출력에 결합되어 있음으로 상기 NAND게이트 414의 출력에서 논리0이 통보부 500의 셋곳으로 제공되며, 한곳은 평상시 제2입력에 논리0이 가해져 있는 NOR게이트 571의 제1입력에 제공됨으로 상기 NOR게이트 571의 출력에서 논리1이 두 곳으로 제공되고, 한 곳은 계전기 570의 작동회로에 가해져서 계전기 570을 작동시켜, 계전기 570의 A동작접점에 의하여 전화기 60을 전화국선 91에서 개방시키고, 전화국선 91-계전기 570의 A동작접점-포오토·커플러의 다이예드 507-계전기 590의 A평상접점-유도코일 574의 S1-전화국선 91로 제3도의 아와같이 전화국선 91에 유도코일 574의 2차코일 S1이 직렬로 삽입되어 비상통보내용을 송출시키는 전화국선접속회로가 구성되고 포오트·커플러의 다이오드 507에 전류가 흐르므로서 포오트·커플러의 트랜지스터 508이 도통되어 직류전압의 음극이 인버터 504의 입력에 가해지고, 인버터 504의 출력에서 논리1이 0.1S지연회로 505를 통하여 인버터 506의 입력에 가해짐으로 상기 인버터 506의 출력에서 논리0을 두 곳으로 출력시키며, 전화국선을 다이알 임펄스에 의하여 단속시켜도 100mS지연회로 505에 의하여 인버터 506의 논리0 출력은 변함이 었다. 인버터 506의 논리0 출력이 NAND게이트 564의 제1입력에 가해지면 상기 NAND게이트 564의 출력에서 논리1이 AND게이트 565의 제1입력에 제공되며, AND게이트 565의 제2입력에 가해지는 신호에 의하여 AND게이트 565의 출력에서 표시등 23의 국선접속상태표시회로를 통하여 표시등 23을 점화 또는 단속 점멸시킨다. 또 인버터 506의 논리0 출력이 제어부 400의 NAND게이트 433의 제1입력에 가해져서 상기 NAND게이트 433의 출력에서 논리1를 NAND방식 R-S플립·플롭 434의 제1입력에 가해져서 상기 NAND게이트 433의 출력에서 논리1를 NAND방식 R-S플립·플롭 434의

입력과 NAND게이트 432의 제2입력에 제공된다.In addition, NOR system RS flip flop 254

At the output, logic 0 is provided to six (6) locations of the control unit 400. First, a logic input is provided to the first input of the OR gate 411 to which the logic 0 is applied at the output of NOR mm 445 to the second input. The reset signal output of the reset circuit of the 412 and decimal counter 536 is eliminated. The output of the OR gate 411 is directly coupled to the R input of the NRO type RS flip-flop 412. When the input circuit is coupled to the R input of the decimal counter 536 for phone number digit counting, the reset circuit of the NOR RS flip-flop 412 and the decimal counter 536 is configured, and logic 1 is output from the output of the OR gate 411. 412 and 536 are reset. Second, logic 1 is provided to the first input of the NAND gate 414 through the inverter 413, and the second input of the NAND gate 414 is connected to the NOR RS flip-flop 412.

Logic 0 is provided to the three places of the notification unit 500 at the output of the NAND gate 414 by being coupled to the output, and one place is provided to the first input of the NOR gate 571 where logic 0 is normally applied to the second input. At the output of the 571, logic 1 is provided in two places, one is applied to the operating circuit of the relay 570 to operate the relay 570, and the telephone 60 is opened on the telephone line 91 by the A operating contact of the relay 570. A-operating contact of 91-relay 570-Die coupler of photocoupler 507-A-normal contact of relay 590-S1-telephone line 91 of induction coil 574 2 to induction coil 574 of telephone line 91 as shown in FIG. When the coil coil S1 is inserted in series and a telephone line connection circuit is configured to send out emergency notification contents, a current flows through the diode 507 of the pot coupler, and the transistor 508 of the pot coupler is turned on to supply the DC voltage. The pole is applied to the input of the inverter 504, logic 1 at the output of the inverter 504 is applied to the input of the inverter 506 through the 0.1S delay circuit 505, and outputs logic 0 to the two places at the output of the inverter 506, The logic 0 output of the inverter 506 was changed by the 100mS delay circuit 505 even if the intermittent was interrupted by a dial impulse. When the logic 0 output of the inverter 506 is applied to the first input of the NAND gate 564, logic 1 is provided at the output of the NAND gate 564 to the first input of the AND gate 565, and to the signal applied to the second input of the AND gate 565. At the output of the AND gate 565, the indicator 23 is ignited or intermittently flashed through the CO line connection status indicator circuit of the indicator 23. In addition, the logic 0 output of the inverter 506 is applied to the first input of the NAND gate 433 of the control unit 400, and logic 1 is applied to the first input of the NAND system RS flip-flop 434 at the output of the NAND gate 433. Output logic 1 to NAND RS flip-flop 434

An input and a second input of the NAND gate 432.

출력에 결합되어 있으므로 AND게이트 572의 출력에서 논리1를 계전기 580의 작동회로에 가하여 계전기 580을 작동시키며, 계전기 580의 A동작접점에 의하여 직류전압의 양극 (VDD)을 녹음기 573으로 공급시켜 녹음기 573을 작동시키고, 계전기 580의 B동작접점에 의하여 녹음기 573의 출력트랜스 SC를 유도코일 574의 1차코일 P로 접속시켜 유도코일 574의2차코일 S1, S2측으로 비상통보내용을 제3도의 자와같이 송출하는 비상통보 송출회로를 구성한다. NAND게이트 414의 출력에서 논리0이 제공되는 다른 한곳은 인버터 532의 입력이며, 인버터 532의 논리1 출력이 a.m 533을 기동시켜 이곳에서 1mS펄스를 발생시켜서 재(再)트리거가 가능한 단안정·멀리·바아브레이터534의 A입력에 가한다. 또 다른 한곳은 다이아라 칩 561의 DP출력에 제2입력이 결합되어 있는 NOR게이트 539의 제1입력에 제공되어 상기 561의 DP출력에서 출력되는 임펄스에 의하여 NOR게이트 539의 출력에서 임펄스가 AND게이트 565의 제2입력과 수신부 200의 OR게이트 284의 제1입력을 통하여 NAND게이트 275의 제1입력과 통보부 500의 NOR게이트 581의 제2입력 및 직류임펄스 선택신호회로 582의 입력에 제공된다 NOR방식 R-S플립·플롭 254의

출력에서 논리0이 제공되는 세번째는 제어부 400의 NAND방식 R-S 플립·플롭 401의

입력이며, 상기 401의

입력에 논리0이 가해져서 셋되고, 그 401의

출력에서 논리0이 NOR m.m 403에 가해지고, 상기 401의 Q출력에서 논리1이 셋 곳으로 제공되는데, 한 곳은 OR게이트 402의 제2입을 통하여 펄스발생부 600을 기동시키고, 다른 한곳은 AND게이트 441의 제2입력에 제공되는데, 제2입력은 펄스발생부 600의 16진 카운터 602의 D출력에 결합되어 있어 AND게이트 441의 출력에서 제2도의 D와 같은 파형의 펄스(16T)를 16진 카운터 442의 E입력에 가하여 계수시키고, 또 다른 한곳은 통보부 500의 전원회로 510의 입력에 가함으로서 다이아라 칩 561의 VDD입력에 정격전압의 VDD전원을 공급한다.The emergency notification is sent to the guard room or the security post by the circuit from the intercom call line 71 to the intercom call line 71 of the relay 570 through the second contact coil S2 of the induction coil 574 through the contact point B of the relay 570. It is sent out. The other one where logic 1 is provided at the output of NOR gate 571 is the first input of AND gate 572, and the second input of AND gate 572 is the D flip-flop 274 of receiver 200.

Since it is coupled to the output, logic 1 is applied to the operation circuit of relay 580 at the output of AND gate 572 to operate relay 580, and the positive voltage (VDD) of DC voltage is supplied to recorder 573 by the A contact of relay 580 to recorder 573. Connect the output transformer SC of the recorder 573 to the primary coil P of the induction coil 574 by the B operating contact of the relay 580, and send the emergency notification contents to the secondary coils S1 and S2 of the induction coil 574 with the ruler of FIG. An emergency notification sending circuit is sent. Another place where logic 0 is provided at the output of NAND gate 414 is the input of inverter 532, and the output of logic 1 of inverter 532 triggers am 533 to generate a 1mS pulse here, which can be triggered again. Apply to A input of bar 534. The other is provided to the first input of the NOR gate 539 which has a second input coupled to the DP output of the diamond chip 561, and the impulse is AND gate at the output of the NOR gate 539 by an impulse output from the DP output of the 561. The first input of the NAND gate 275 and the second input of the NOR gate 581 of the notification unit 500 and the input of the DC impulse select signal circuit 582 through the second input of the 565 and the first input of the OR gate 284 of the receiver 200 are provided. Of RS flip flop 254

Third, logic 0 is provided at the output of the NAND RS flip-flop 401 of the controller 400.

Input, and the 401

Is set by applying logic 0 to the input,

At the output, logic 0 is applied to NOR mm 403, and at the Q output of 401, logic 1 is provided in three places, one of which activates the pulse generator 600 through the second input of the OR gate 402, and the other is AND A second input of the gate 441 is provided, which is coupled to the D output of the hexadecimal counter 602 of the pulse generator 600 to output a pulse 16T of the same waveform as D in FIG. It is counted in addition to the E input of the true counter 442, and another is supplied to the input of the power circuit 510 of the notification unit 500 to supply the VDD power supply of the rated voltage to the VDD input of the diamond chip 561.

출력에서 논리0이 제공되는 네번째 곳은 제어부 400의 OR게이트 455의 제1입력이며, 제2입력은 선택스윗치 103B에 의하여 4분주 카운터 454의 C출력 또는 AND게이트 453의 출력에 결합되어 있음으로 논리0이 가해져 있어, 상기 OR게이트 455의 논리0 출력에 의하여 4분주카운터의 454, 리셋트신호를 제거시키고, 다섯번째로 NOR m.m 404에 가해지며, 끝으로 NAND게이트 447의 제1입력에 제공됨으로서 NAND게이트 447의 출력에서 논리1를 NAND방식 R-S플립·플롭 401의 R입력에가하여 상기 401이 리셋트될 수 없게 한다.NOR system RS flip flop 254

The fourth place where logic 0 is provided at the output is the first input of the OR gate 455 of the control unit 400, and the second input is coupled to the C output of the four-division counter 454 or the output of the AND gate 453 by the selection switch 103B. 0 is applied to remove the 454, reset signal of the 4th division counter by the logic 0 output of the OR gate 455, and the fifth is applied to the NOR mm 404, and finally provided to the first input of the NAND gate 447. At the output of the NAND gate 447, logic 1 is applied to the R input of the NAND system RS flip-flop 401 to prevent the 401 from being reset.

FIG. 11 is a circuit diagram showing details of the relay operation circuits 360, 570, 580, 590 and 811, 812, 813, 814, 815, 816, 817 of FIG. When logic 1 via the IC is applied to the input of the circuit, a bias voltage is applied to the base of the NPN switching transistor 773 through the voltage divider resistors 771 and 772 so that the transistor 773 becomes conductive, and the conduction of the transistor 773 causes a negative voltage of direct current voltage. The anode of the transistor protection diode 774 and one end of the relay coil 775 are provided, and the DC voltage anode (VDD) is connected to the other end of the relay coil 775 and the cathode of the transistor protection ion 774, so that the relay coil 775 is an example. As the current flows, the relay is activated.

FIG. 12 is a circuit diagram showing in detail the delay circuits 285,505,523,535,555 and 578 shown in FIG. The input of this circuit is connected to one end of the time constant capacitor 782 via the time constant resistor 781, the other end of the capacitor 782 is connected to the negative pole of the DC voltage, and the connection point between the resistor 781 and the capacitor 782 is connected to one end of the protective resistor 783. The positive charge charged in the resistor 783 is discharged by the CR time constant through the time constant resistor 781, and provides the positive potential to the output side through the protective resistor 783. When the positive voltage of the DC voltage is applied to the input of this circuit, it is charged by the CR time constant to the time constant capacitor 782 through the time constant resistor 781, and when a certain positive potential is reached, the output of this circuit is reached through the protection resistor 783. It is a circuit that provides positive potential and 1mS, 0.1S, etc. are the delay time and are determined by CR time constant of resistor 781 and capacitor 782.

에서 15까지의 출력간의 상호관계와 AND게이트 441의 출력에서제2도의 D(16T)펄스가 16진 카운터 442의 E입력에 가해지는 펄스의 10진수가 제2도의 F에 표시되어 있으며, 카운터 442의 E입력에 입력된 펄스가 없는 평상시는 그 A, B, C, D 출력에서 논리0을 출력하고, 디코더 443의

출력에서 논리1를 출력하며, 카운터 442의 E입력에 첫번째 펄스(16T)가 입력되면 그 A출력에서 논리 1를 출력하고, 디코더 443의

출력에서 논리1를 출력하며, 이와같이 디코더 443,

출력으로 부터 각 출력에서 출력할 때까지의 소요시간과 각 출력의 파형이 제2도의 F'에 표시되어 있다. 16진 디코더 443의

은 두곳으로 결합되어 있으며, 상기

출력이 논리0에서 논리1로 스윗칭되면 직류차단용 콘덴서 444를 통하여 트리거펄스를 NOR m.m 445의 입력에 가하여 상기 NOR m.m 445의 출력에서 1mS동안 논리1이 OR게이트 411의 제2입력에 가해짐으로 NOR방식 R-S플립·플롭 412 및 10진카운터 536의 리셋트회로에 의하여 상기 R-S플립·플록 412와 10진 카운터 536을 리셋트시키며, 디코더 443의

출력에 결합되어 있는 다른 한곳은 통보부 500의 AND게이트 551의 제1입력이며, 평상시 저항기 511를 통하여 논리1이 AND 게이트 551의 제2입력에 가해져 있음으로 디코더 443의

출력에서 논리1이 출력되면 상기 AND게이트 551의 출력에서 논리1를 AND게이트 552의 1입력에 제공하는데, 상기 552의 제2입력과AND게이트 521의 제2입력은 제어부 400의 4분주 카운터 454의 A, B 출력에 결합되어 매 주기(周期)초에 한하여 논리1를 출력하는 NOR게이트 451의 출력에 결합되어 있으므로, AND게이트 552의 출력에서 매주기초에 한하여 논리1를 두곳으로 출력하는데, 한곳은 NOR방식 R-S플립·플롭 553의 R입력에 가해져서 상기 553을 리셋트시켜 상기 NOR방식 R-S플립·플롭 553의 Q출력에서 논리0이 다이아라 칩 561의 CE입력에 제공되어, 상기 다이아라 칩 561은 새로운 번호 또는 리. 다이알(Re dial)를 받아들이는 상태가 되고, 상기 553,

출력에서 논리1이 1mSwldus회로 555를 통하여 NAND게이트 556의 제1입력에 가해져서 HOLD준비회로의 준비를 한다. 다른 한곳은 NAND에 의한 논리미분회로 554의 입력에 제공되는데, 상기 554의 입력에 논리0이 가해진후 논리1이 가해지면(즉 리. 다이알발신이 되어 소정의 한 주기 각 통화(3통화 또는 4통화)가 완료된후), 상기 NAND에 의한 논리미분회로 554의 출력에서 1mS동안 논리0을 NAND방식 R-S플립·플롭 527의 R입력에 가장여 상기 527를 리셋트시켜 HOLD준비회로를 제거시킨다. 다이아라 칩 561은 C MOS루우프 디스콘넥트 다이아라(Loop Disconnect Dialer)이며 20자리까지의 일련의 번호를 기억시킬 수 있으며, 기억된 번호를 자동적으로 리. 다이아링(Re dialing)하는 능력어 가지고 있고, 임펄스의 단속비(斷續比)는 2 : 1이고, 임펄스의 속도는 10PPS(PulesPer Second)이며, 숫자간 간격의 포오스 IDP(Inter Digital Pause)는 800mS이다. 상기 칩 561의 CE입력에 논리0이 가해지면 발진을 하지 않으며, 입 CE 입력에 논리1이 가해지면 4mS이내에 발진한다. 상기 CE입력에 논리0이 가해지면 새로운 번호 또는 리다이알을 받아들이는 상태가 되며, CE입력에 논리1이 가해지면 발진을 하고 20자리 까지의 데이터(Data)를 키이·보오드 109로 부터 입력할 수 있으며, 상기 CE입력이 논리0에서 논리1로 스윗칭되 후 최초의 키이·보오드 입력(키이·보오드 또는 리. 다이알 신호), 확인후 다이아라 칩 561의 MI출력에서 임펄스 출력중 논리1이 출력되고, DP출력으로 부터 펄스가 출력된다. 다이아라 칩 561의 HOLD입력에 논리1이 가해지면 다이알임펄스의 출력을 중단하게 되며, 다이알임펄스 출력중에 HOLD입력에 논리1이 가해지면 회로는 다이알임펄스를 완료할 때까지는 HOLD상태가 되지않으며, HOLD상태에서는 상기 MI출력은 논리0을 유지하고, HOLD가 해제되면 다이알링이 IDP에 앞서 속행되며 HOLD는 IDP를 연장하기 위하여 사용되는 것이다.The A, B, C, and D inputs of the hexadecimal decoder 243 are coupled to the A, B, C, and D outputs of the hexadecimal counter 442 and the outputs of A, B, C, and D of the hexadecimal counter 442. Hexadecimal decoder 443

Correspondence between the outputs of the two through 15 and the output of AND gate 441, the decimal number of the pulse applied to the E input of the hexadecimal counter 442 by the D (16T) pulse of FIG. 2 is shown in F of FIG. When there is no pulse input to E input of, normally, logic 0 is output from the A, B, C, and D outputs.

Outputs logic 1 from the output. When the first pulse 16T is input to the E input of the counter 442, logic 1 is output from the A output.

Outputs logic 1 at the output, and decoder 443,

The time required from output to output at each output and the waveform of each output are shown in F 'in FIG. Hexadecimal decoder 443

Is combined in two places,

When the output is switched from logic 0 to logic 1, a trigger pulse is applied to the input of NOR mm 445 through the DC blocking capacitor 444 so that logic 1 is applied to the second input of OR gate 411 for 1 mS at the output of NOR mm 445. The RS flip-flop 412 and the decimal counter 536 are reset by the reset circuit of the NOR type RS flip-flop 412 and the decimal counter 536.

The other one coupled to the output is the first input of AND gate 551 of notification unit 500 and logic 1 is normally applied to the second input of AND gate 551 via resistor 511 so that decoder 443

When logic 1 is outputted from the output, the logic 1 is output from the output of the AND gate 551 to the first input of the AND gate 552. The second input of the 552 and the second input of the AND gate 521 are the four division counters 454 of the controller 400. Since it is coupled to the output of NOR gate 451 which is coupled to A and B outputs and outputs logic 1 every second, the output of AND gate 552 outputs logic 1 to two places only every second. A logic 0 is applied to the CE input of the diamond chip 561 at the Q output of the NOR RS flip-flop 553 by applying the ROR of the NOR-type RS flip-flop 553 to reset the 553. Is the new number or li. The dial is in a state of accepting Re dial 553,

At the output, logic 1 is applied to the first input of the NAND gate 556 through the 1mSwldus circuit 555 to prepare for the HOLD preparation circuit. The other is provided to the input of the logic differential circuit 554 by NAND, and if logic 1 is applied after the logic 0 is applied to the input of the 554 (i.e., R. dialing, each call for a predetermined period (three calls or four) After the call) is completed), the logic 0 is applied to the R input of the NAND-type RS flip-flop 527 for 1 mS at the output of the logic differential circuit 554 by the NAND, and the 527 is reset to remove the HOLD preparation circuit. The diamond chip 561 is a C MOS Loop Disconnect Dialer that can store a sequence of up to 20 digits and automatically recalls the stored numbers. It has the ability to dial (Re dialing), the impulse intermittent ratio is 2: 1, the impulse speed is 10PPS (PulesPer Second), and the interdigital interdigital pause (IDP) Is 800mS. When logic 0 is applied to the CE input of the chip 561, oscillation is not performed. When logic 1 is applied to the input CE input, oscillation is performed within 4mS. When logic 0 is applied to the CE input, a new number or redial is accepted. When logic 1 is applied to the CE input, oscillation occurs and up to 20 digits of data can be input from the key board 109. After the CE input is switched from logic 0 to logic 1, the first key board input (key board or R. dial signal) is checked, and logic 1 of the impulse output is output from the MI output of the diamond chip 561 after confirmation. , Pulse is output from DP output. When logic 1 is applied to the HOLD input of the diamond chip 561, the output of the dial impulse is stopped.If logic 1 is applied to the HOLD input during the dial impulse output, the circuit is not HOLD until the dial impulse is completed. In the state, the MI output maintains a logic 0, and when HOLD is released, dialing continues before the IDP and HOLD is used to extend the IDP.

The X1, X2, X3, Y1, Y2, Y3, and Y4 inputs of the diamond chip 561 input data from the key board 109 or the red dial circuit 525.

16T간 논리1이넷(4) 곳으로 제공되는데, 한 곳은 선택스윗치 102의 b접점으로 제공되고, 다른 한곳은 수신부 200의 직류차단겸 시정수용 콘덴서 261과 직류전압의 음극에 연결된 직류전압의 음극을 공급하고 겸하여 시정수용 저항기 262를 통하여 충전시킴으로서 발생되는 트리거 펄스가 OR게이트 265의 제1입력을 통하여 NOR m.m의 266입력에 가해지며, 상기 NOR m.m 266의 출력에서 1mS동안 논리1를 두곳으로 제공하며, 한 곳은 통보부 500의 OR게이트 531의 제2입력을 통하여 10진 카운터 536의 OR입력에 가해져서 상기 267을 리셋트시키고, 다른 한곳은 AND게이트 267의 제1입력을 통하여 통보부 500의 NAND게이트 567의 제2입력에 가하여 상기 NAND게이트 567의 제1입력에 논리1이 가해져 있으면, NAND게이트 567의 출력에서 논리0을 NAND방식 R-S플립·플롭 566의 R입력에 가하여 상기 566을 리셋트시키는 HOLD해제회로에 의하여 다이아라칩 561의 HOLD상태를 해제시킨다. 또 다른 한곳은 AND게이트 446의 제2입력에 16T간 제공되는데 상기 446의 제1입력은 AND게이트 423의 출력에 결합되어 있음으로 AND게이트 446의 출력에서 두곳으로 제2도의 H와 같은 파형을 가진 펄스를 출력하며, 한곳은 경보부 300의 계전기 360의 작동회로에 가해짐으로 계전기 360을 4T간격으로 두번 작동시켜 계전기 360의 A동작접점에 의하여 파출소 비상경보회로 73을 제3도의 차와 같이 4T간격으로 즉 제2도의 H파형으로 개로(開路)시켜 비상경보를 하고, 또 계전기 360의 B동작접점에 의하여 인터폰 신호선 72의 경비실측으로 제3도의 카와같이 4T간격으로 두번 직류전압의 양극(VDD)을 가하여 호출한다.As indicated by F 'in Figure 2, at the output of decoder 443 after 16T from the start of every notification.

It is provided as a logic 1 inlet (4) between 16Ts, one is provided as the contact b of the selector switch 102, and the other is a negative DC voltage connected to the DC blocking and time constant capacitor 261 of the receiver 200 and a negative DC voltage. The trigger pulse generated by supplying and simultaneously charging through the time constant resistor 262 is applied to the 266 input of NOR mm through the first input of the OR gate 265, and provides two logic 1s for 1 mS at the output of the NOR mm 266. One is applied to the OR input of the decimal counter 536 through the second input of the OR gate 531 of the notification unit 500 to reset the 267, and the other is the notification unit 500 through the first input of the AND gate 267. If logic 1 is applied to the first input of the NAND gate 567 in addition to the second input of the NAND gate 567 of the NAND gate 567, logic 0 is applied to the R input of the NAND type RS flip-flop 566 at the output of the NAND gate 567 to add 566. The HOLD release circuit for resetting releases the HOLD state of the diamond chip 561. The other is provided for 16T to the second input of AND gate 446. The first input of 446 is coupled to the output of AND gate 423, so the output of AND gate 446 has the same waveform as H in FIG. A pulse is output, and one is applied to the relay 360 operation circuit of the alarm unit 300 so that the relay 360 is operated twice at 4T intervals and the police box emergency alarm circuit 73 is operated by the contact point A of the relay 360 at 4T intervals as shown in FIG. In other words, emergency signal is opened by opening H waveform of FIG. 2, and the DC voltage anode (VDD) is applied twice at 4T intervals like the car of FIG. 3 to the guard room of interphone signal line 72 by B operation contact of relay 360. To be called.

입력에 제공됨으로 상기 434가 셋되어 그

출력에서 논리0이 NAND게이트 435의 출력에서 논리1이 경보부 300의 NAND게이트 37`의 제2입력에 제공되는데 선택스윗치102에 의하여 선택된 경보개시시간(본 설명에서는 디코더 443의

출력을 선택하였음)에 16T간 논리1이 선택스윗치 102를 통하고 인버터 436을 통하여 NAND방식 R-S플립·플롭 434의 R입력과 NAND게이트 435의 제2입력에 논리0이 가해져서 상기 434는 리셋트되고, NAND게이트 435의 출력은 제2도 I와 같이 60T간 논리1이 경보부 300의 NAND게이트 371이 제2입력에 제공되고 상기 NAND게이트 371의 제1입력은 제2도의 B와 같은 파형을 가진 펄스가 제공됨으로 NAND게이트 371의 출력에서 제2도의 J와 같은 파형의 펄스가 출력되는데, 상기 NAND게이트 371의 출력에서 논리 0이 분압용 저항기 372를 통하여 바이아스전압을 PNP스윗칭 트랜지스터 373의 베이스에 가하면, 상기 트랜지스터 373은 도통되어 직류전압의 양극을 다이오드 군 374를 통하여 각 발신기 20의 부져 24에 가하는 부져 24의 작동회로에 의하여 부져 24를 제3도의 랴와 같이 동작시키며, 비상사태가 발생하였으나 전화곡선이 91이 고장임을 각 실로 동시에 경보한다.The other is provided at the second input of the NAND gate 433. The logic 1 is applied to the first input of the NAND gate 433 at the output of the inverter 506 of the notification unit 500 only when the telephone line 91 is in a fault state. As shown in Figure 2, K provides two logic 0s at two intervals at 4T intervals, and one is applied to the second input of NAND gate 432 to output logic 1 twice at the output of NAND gate 432 at 4T intervals. As shown in the figure, the main alarm buzzer was operated to activate the emergency alarm, but the telephone line 91 was out of order.

The 434 is set by being provided to the input

At the output, logic 0 is provided at the output of NAND gate 435. Logic 1 is provided to the second input of NAND gate 37` of alarm 300. The alarm start time selected by selection switch 102 (in this description, decoder 443

Output is selected), and logic 1 is applied to the R input of the NAND RS flip-flop 434 and the second input of the NAND gate 435 through the inverter 436 through the selection switch 102 and the 434 is reset. The output of the NAND gate 435 is a logic 1 between 60T, as shown in FIG. 2, and the NAND gate 371 of the alarm unit 300 is provided to the second input, and the first input of the NAND gate 371 has the same waveform as B of FIG. The pulse is provided to output the pulse of the waveform as J of FIG. 2 at the output of the NAND gate 371, the logic 0 at the output of the NAND gate 371 through the voltage divider resistor 372 to the base of the PNP switching transistor 373 In addition, the transistor 373 is turned on and operated by the operating circuit of the buzzer 24 which applies the positive voltage of the DC voltage to the buzzer 24 of each transmitter 20 through the diode group 374, and operates the buzzer 24 as shown in FIG. Each state is generated, but at the same time that the alarm thread telephone curve 91 is broken.

출력에서 논리1이 제공되는 넷번째 곳은 통보부 500의 AND게이트 521의 제1입력이며, 주기초에 한하여 상기 521의 제2입력에 논리1이 가해지고, 따라서 주기초에 한하여 AND게이트 521의 출력에서 논리1이 리. 다이알회로 520의 단안정·멀티·바이브레이터 5522의 A입력에 가해지며, T1, T2입력에 연결된 40mS지연회로 523에 의하여 Q출력에서 40mS동안 논리1를 NPN스윗칭 트랜지스터 524와 525의 베이스에 가하여 이들을 도통시킴으로서 직류전압의 음극을 NOR게이트 526의 제1, 제2입력에 제공함으로 NOR게이트 526의 출력에서 논리1를 NAND게이트 556의 제2입력에 가함으로 상기 556에 제1입력에 논리1이 가해져 있어, 상기 NAND게이트 556의 출력에서 논리0을 NAND방식 R-S플립·플롭 527의 ***** 입력에 가하여 상기 527를 셋시키고, 상기 NAND방식 R-S플립·플롭 527이 셋됨으로서 그 Q출력에서 논리1이 두곳으로 제공되는데, 한 곳은 NAND게이트 528의 제1입력에 제공되어 HOLD회로를 준비시키고, 다른 한곳은 NOR게이트 529의 제1입력에 제공되는데 이것은 개별호출기 80에서 두번째 기억시켜 놓은 피호출전화를 호출할 때에 한하여 리. 다이알발신때까지 계전기 570이 작동할 수 없게하여 전자식 전화국선의 유효 다이알링 개시시간을 확보하기 위함이다.Decoder 443

The fourth place where logic 1 is provided in the output is the first input of the AND gate 521 of the notification unit 500, and the logic 1 is applied to the second input of the 521 only for the period of the second, so that the AND gate 521 of the Logic 1 is returned in the output. A 40mS delay circuit 523 connected to the T1 and T2 inputs applies logic 1 to the base of the NPN switching transistors 524 and 525 for 40 mS at the Q output by the 40mS delay circuit 523 connected to the T1 and T2 inputs. The conduction is provided to provide the negative voltage of the DC voltage to the first and second inputs of the NOR gate 526, thereby applying logic 1 at the output of the NOR gate 526 to the second input of the NAND gate 556, thereby applying logic 1 to the first input at 556. In the output of the NAND gate 556, logic 0 is applied to the ***** input of the NAND type RS flip-flop 527 to set the 527, and the NAND type RS flip-flop 527 is set, thereby providing logic at the Q output. One is provided in two places, one to the first input of the NAND gate 528 to prepare the HOLD circuit, and the other to the first input of the NOR gate 529, which is memorized a second time on the individual pager 80. Lee only when you call the phone call. This is to secure the effective dialing start time of the electronic telephone line by disabling the relay 570 until dialing.

출력에서 논리0이 1mS지연회로 555를 거쳐 1mS후에 NAND게이트 556의 제1입력에 제공됨으로 HOLD준비회로를 제거시킨다.Secondly, if push button 83 is pressed to individually recall the called telephone for everyday use, D flip-flop 283 of receiver 200 is set. If the circuits of the NOR gates 529 and 571 are not present, the dial impulse of the second stored telephone call is stored after about 20T of the time when the dial impulse of the first called telephone number stored after 16T starts. Will be sent to. Therefore, the dial impulse is sent to the telephone line 91 only after 36T (approximately 18) after the emergency call is connected to the telephone line 91. Generally, the electronic telephone line is dialed if the telephone line is not dialed within 14 seconds. The telephone line is locked out (cannot be used by disconnecting from the telephone station machine), which constitutes the circuits of NOR gates 529 and 571.In this case, the first pulse of the dial impulse of the first telephone number Since the emergency call is connected to the telephone line 91 from the beginning, the effective pulse start time can be secured by sending the first pulse of the dial impulse of the called telephone which is memorized for the second time within about 20T or 10 seconds. In addition, a cathode of DC voltage through the collectors of transistors 524 and 525 is applied to the X3 and X4 inputs of the diamond chip 561. The logic 0 signal of X3 is input to the memory control circuit 560, and logic 1 is applied to the S input of the NOR RS flip-flop 553 at the output of the inverter 568 to set 553. In the output, logic 1 is applied to the CE input of the diamond chip 561 to output the impulse of the stored telephone number,

At the output, logic 0 is passed through the 1mS delay circuit 555 to the first input of the NAND gate 556 after 1mS to eliminate the HOLD preparation circuit.

에서

-선택스위치 106의 g, i접점-직류임펄스선택신호회로 582-선택스윗치 106의 j, l접점-부릿지 다이오드 575의

에서

-전화국선 91로 직류임펄스선택신호방식을 선택하였을 때의 선택신호송출회로를 구성한다.The dial impulse output is provided to four (4) paddy fields through the inverter 562 when logic 1 is output from M1 of the diamond chip 561, and one is provided at the C contact of the selection switch 106. Is selected, the induction coil 574 inserted in series to the telephone line 91 by the A operating contact of the relay 590 when the operating circuit of the relay 590 is operated through the inverter 577 because the a and c contacts of the selection switch 106 are connected. Open the secondary coil S1 from the telephone line, and the A operating contact of the telephone line 91-relay 570-the diode of the photocoupler 507-the A operating contact of the relay 590-the bridge diode 575

in

G of the selector switch 106, i-DC impulse selection signal circuit 582-j of the selector switch 106, of the contact-bridge diode 575

in

-Configure the selection signal sending circuit when the DC impulse selection signal system is selected by telephone station line 91.

단자간과 전압조절소자 576의 양단을 쇼오트(Short)시켰으며, 계전기 590이 작동되면 계전기 590의 B동작접점에 의하여 브릿지·다이오드575의

단자간 쇼오트를 개방시키고, 상기 브릿지·다이오드 575를 전화국선접속회로에 직렬로 삽입시키며브릿지. 다이오드 575의

단자간에 병렬로 접속된 전압조절소자 576은 선택신호 송출에 따른 전화국 선양선간에 발생되는 이상전압(異常電壓)을 흡수하여 관련기기를 보호, 기 위한 것이다.In addition, by B normal contact of relay 590 of bridge diode 575

Short between the terminals and both ends of the voltage regulating element 576. When the relay 590 is operated, the bridge diode 575 of the bridge diode 575

The bridge between terminals is opened, and the bridge diode 575 is inserted into the telephone line connection circuit in series. Diode 575

The voltage regulating element 576 connected in parallel between the terminals is for protecting and protecting related equipment by absorbing the abnormal voltage generated between the line and the line in response to the transmission of the selection signal.

The other is provided at the first input of the NOR gate 581 to prepare the counting circuit of the dial impulse when the selection switch 106 is selected as the complex frequency select signal side, and the other is provided at the first input of the AND gate 563. The AND gate 563 cannot be operated during a dial impulse output, and is finally provided to a second input of the NAND gate 564, and a logic 1 is applied to the first input of the AND gate 565 at the output of the NAND gate 564. Prepare the 23 CO line connection status display circuit.

When the output of the dial impulse is completed, logic 0 is output from the M1 output of the diamond chip 561, and logic 1 is provided to the second input of the NAND gate 564 through the inverter 562. When the telephone line 91 is in a normal state, the output of the inverter 506 is output. The logic 0 is applied to the first input of the NAND gate 564, so that the output of the NAND gate 564 is applied to the first input of the AND gate 565 of the logic 1, so that the indicator 23 of each transmitter 20 is shown in Fig. 3. When the emergency call is connected to the telephone line 91 and the emergency call is connected, and when the telephone line 91 is in a fault state, logic 0 is applied to the first input of the NAND gate 564 at the output of 506 of the inverter. As logic 0 is applied to the first input of AND gate 565, the indicator 23 of each transmitter 20 is extinguished, as indicated by the sha in Figure 3, indicating that the telephone line 91 is not connected to this scattering alarm. The.

단자에 연결되며, 상기 저항기 794와 795간의 연결점은 PNP스윗칭 트랜지스터 796의 베이스에 연결되어 있으며, 상기 트랜지스터 796의 콜렉터와 793의 에미터는 직류전압의 음극과 브릿지. 다이오드 575의

단자에 연결되어 있어, 이 회로의 입력에 논리1이 가해지면 분압용 저항기 791과 792를 통하여 NPN스윗칭 트랜지스터 793의 베이스에 바이아스전압이 가해져서 트랜지스터 793의도통으로 직류전압의 음극을 분압용 저항기 794와 795를 통하여 PNP스윗칭 트랜스터 796의 베이스에 바이아스전압을 가함으로, 상기 트랜지스터 796이 도통되어 브릿지·다이오드 575의

,

단자간을 루우프시키며, 이 회로의 입력에 논리0이 가해지면 상기 트랜지스터 793과 796이 오프됨으로 브릿지·다이오드 575의

,

단자간이 개로되며, 이와같이 이 회로의 입력에 임펄스가 가해지면 입력된 임펄스에 의하여 전화국선 91를 단속시켜 직류임펄스 선택신호를 송출한다.FIG. 13 is a circuit diagram showing in detail the DC impulse select signal circuit 582 shown in FIG. The input of this circuit is connected to the negative pole of direct current voltage through the resistors 791 and 792 for the mains, and the connection point between the resistors 791 and 792 is connected to the base of the NPN switching transistor 793, and the collector of the transistor 793 is divided for the voltage divider. Through 794 and 795 the emitters of the PNP switching transistor 796 and the bridge diode 575

And a connection point between the resistors 794 and 795 is connected to the base of the PNP switching transistor 796, and the collector of the transistor 796 and the emitter of the 793 are a DC voltage cathode and a bridge. Diode 575

Connected to the terminal, when logic 1 is applied to the input of this circuit, a bias voltage is applied to the base of the NPN switching transistor 793 through the voltage divider resistors 791 and 792 so that the negative voltage of the DC voltage is conducted through the transistor 793. By applying a bias voltage to the base of the PNP switching transformer 796 via 794 and 795, the transistor 796 is turned on and the bridge diode 575

,

Loops between terminals, and when logic 0 is applied to the input of this circuit, the transistors 793 and 796 are turned off so that the bridge diode 575

,

When the impulse is applied to the input of this circuit in this way, the telephone station line 91 is interrupted by the input impulse and the DC impulse selection signal is sent.

The dial impulse of the phone number memorized in the DP output of the diamond chip 561 is output to three locations, one of which is the e contact of the operation switch 108, and the operation switch 108 is used only when the called phone number is stored in the diamond chip 561. In the normal operation, the dial impulses through the contact points e and d of the operation switch 108 are provided in three places, one of which is a NOR at the output of the NAND gate 414 of the control unit 400 where a logic 0 is applied to the first input. It is applied to the second input of the gate 539 to relay the dying pulses from the output of the NOR gate 539 to two places, one of which is the second input of the AND gate 565 in which logic 1 is applied to the first input of the dial impulse output. By using the dial impulse, the indicator 23 of each transmitter 20 is displayed on the trunk line connection state display circuit of the indicator 23 of the output of the AND gate 565 as shown in FIG. The other one is provided at the output of the OR gate 284 through the first input of the OR gate 284 of the receiver 200, and the third is provided at the first input of the NAND gate 275, so that the trunk line of the indicator 81 at the individual call A signal is provided to the connection status display circuit, and the other is provided to the second input of the NOR gate 581 of the notification unit 500. The logic 0 of the dial impulse output is applied to the first input of the 581, so that the NOR gate 581 The dial impulse input from the output is applied to the E input of the hexadecimal counter 591 through the d and e contacts of the selection switch 106 to count the dial impulse, and another is provided to the input of the DC impulse select signal circuit 582. When 106 is selected as the DC impulse selection signal side, the telephone line 91 is interrupted by an impulse to transmit a DC impulse selection signal as shown in FIG.

출력에서 논리0이 직류차단겸 시정수용 콘덴서 593에 가해지면 상기 콘덴서 593은 방전을 하며, 하나의 다이알 임펄스가 완료된 200mS후에 상기 534의

출력이 논리0에서 논리1로 스윗칭되면, 상기 콘덴서 593의 충전으로 인한 트리거펄스가 NOR m.m 594에 입력됨으로 그 출력에서 1mS동안 논리1이 16진 디코더 592의 래치 LT입력에 가해져서 하나의 다이알임펄스를 계수한 16진 카운터 591의 A, B, C, D출력에서 제공되는 데이터를 16진 디코더 592의 A, B, C, D입력에 입력시킨다. 즉 하나의 다이알임펄스를 계수시켜 그 데이터를 16진 카운터 591의 A, B, C, D출력에서 출력된 것을 하나의 다이알임펄스가 완료된 200mSgn에 16진 디코더 592의 B, B, C, D입력에서 입력시킨후 유지시키며, 상기 16진 디코더 592에 입력된 데이터에 해당되는 출력을 상기 592의

-10출력에서 공지공용의 복합주파수방식 선택신호회로 595로 출력하는데, 상기 16진 카운터 591의 출력과 16진 디코더 592의 출력과의 상호관계와 하나의 계수된 다이알임펄스의 10진수와의 관계는 제2도의 F에 표시된 바와같으며, 상기 595는 16진 카운터 591에서 계수된 하나의 다이알 임펄스에 해당되는 복합주파수를 선택스윗치 106의 j, k접점과 g, h접점을 거쳐 선택신호송출회로를 통하여 제3도의 아에 표시된 바와같이 전화국으로 약 200mS동안 송출시켜 피호출전화를 호출하며, 하나의 다이알 임펄스가 완료된 400mS후에 NAND게이트 579의 출력이 논리0에서 논리1로 스윗칭됨으로 계전기 590을 복구시켜 선택신호 송출회로를 원상복구시키고, 계전기 570의 A, B동작접점에 의한 전화국선접속회로로 제3도의 아에 표시된 바와 같이 비상통보내용을 전화국선 91로 송출시키며, 이 콘덴서 596과 NOR m.m 597를 통하여 1mS동안 논리1를 16진 카운터 591의 R입력과 16진 디코더 592의 E입력에 가하여 상기 591과 592를 리셋트시킴으로 복합주파수방식 선택신호회로 595를 원상으로 복구시킨다.The other part of the dial impulse via the d and e contacts of the operating switch 108 is provided to the B input of the monostable multivibrator 534 which can be retriggered, and the A input of the 534 is provided with 1 mS pulse from a.m533. The 0.2S delay circuit 535 is connected to the T1 and T2 inputs of the 534 so that the first pulse of one dial impulse is retried by a 1mS pulse from the time when the first pulse is applied to the B input of the 534 and is connected to the 200mS delay circuit. Logic 1 is provided in two places at the Q output of 534 between 200mS after the last pulse is completed. One is provided to the E input of the decimal counter 536, counting the number of digits of the telephone number, and the other is 0.2S. The logic 1 is provided to the first input of the NAND gate 579 after 200mS through the delay circuit 578, and the logic 1 is provided to the second input of the 579, which is a dial at the output of the NAND gate 579. Logic 1 is NAND gate until 400mS after completion (G output of monostable multivibrator 534 that can be retriggered after 200mS of dial impulse completion is switched from logic 1 to logic 0 until 200mS through 0.2S delay circuit 578) With the first input of 579), logic 0 is provided in two places, one via the inverter 577 via the a and b contacts of the selector switch 106 (when the multi-frequency selection signal is selected). The signal output circuit is constituted by the A and B operating contacts of the relay 590, and the other part is applied to the DC blocking and time constant capacitor 596 to discharge the capacitor 596, and at the output of the NAND gate 579 after the completion of the dial impulse 400 mS. When logic 1 is applied to inverter 577, relay 590 is restored, and when applied to capacitor 596, trigger pulse is input to NOR mm 597 and hexadecimal for 1mS at its output. Logic 1 is applied to the R input of the counter 591 and the E input of the hexadecimal decoder 592 to reset the 591 and 592. The first pulse of one dial impulse is input to enable the retriggering of the monostable multivibrator 534

When logic 0 is applied to DC blocking and time constant condenser 593 at the output, the condenser 593 discharges and 200 mS after one dial impulse is completed.

When the output is switched from logic 0 to logic 1, the trigger pulse from charging the capacitor 593 is input to NOR mm 594 so that logic 1 is applied to the latch LT input of the hexadecimal decoder 592 for one millisecond at that output so that one dial The data provided from the A, B, C, and D outputs of the hexadecimal counter 591 in which the impulse is counted is input to the A, B, C, and D inputs of the hexadecimal decoder 592. That is, one dial impulse is counted and the data is output from the A, B, C, and D outputs of the hexadecimal counter 591, and 200 mSgn of one dial impulse is completed at the B, B, C, and D inputs of the hexadecimal decoder 592. The input corresponding to the data inputted to the hexadecimal decoder 592 and maintained.

At -10 outputs, the output is output to a publicly available complex frequency selective signal circuit 595. The correlation between the output of the hexadecimal counter 591 and the output of the hexadecimal decoder 592 and the relationship between the decimal number of one counted dial impulse is As shown in F of FIG. 2, the 595 selects a complex frequency corresponding to one dial impulse counted by the hexadecimal counter 591 through the j, k, g, and h contacts of the selection switch 106. As shown in Figure 3h, it sends out to the telephone station for about 200mS and calls the called phone.After 400mS of one dial impulse is completed, the output of NAND gate 579 is switched from logic 0 to logic 1 to recover relay 590. Restores the selection signal sending circuit, and transmits the emergency notification to telephone station 91 as shown in A of Fig. 3 by telephone line connecting circuit by A, B operation contact of relay 570. Through the capacitor 596 and NOR mm 597, a logic 1 is applied to the R input of the hexadecimal counter 591 and the E input of the hexadecimal decoder 592 for 1 mS, and the 591 and 592 are reset to restore the complex frequency select signal circuit 595. Restore to

출력은 OR게이트 810과 850의 제1입력에 결합되어 있으며, 상기 592의

출력은 OR게이트 810과 860A의 제2입력에 결합되고, 상기 592의

출력은 OR게이트 810과 870의 제3입력에 결합되며, 상기 592의

출력은 OR게이트 820과 850의 제2입력에 결합되며, 상기 592의

출력은 OR게이트 820과 제1입력에 결합되어 있으며, 상기 592의, 출력은 AND게이트 860. 와 820의 제1입력에 결합되고, 상기 592의

출력은 OR게이트 820의 제3입력과 OR게이트 870의 제2입력에 결합되며, 상기 592의

출력은 OR게이트 850과 830의 제3입력에 결합되어 있으며, 상기 592의

출력은 OR게이트 830의 제2입력에 OR게이트 860A의 제3입력에 결합되고, 상기 592의

출력은 OR게이트 830과 870의 제1입력에 결합되며, 상기 592의 10출력은 OR게이트 860B의 제2입력과 OR게이트 840의 제1, 제2입력에 결합되어 있으며, OR게이트 860A의 출력은 OR게이트 860B의 제1입력에 결합되고, 상기 OR게이트 810.820,830,840,850,860B, 및 870의 각 출력은 계전기작동회로 811,812,813,814,815,816,817에 결합되고, 공지 공용의 자동식 전화기의 복합주파수방식 선택신호회로 879의 입력은 선택스윗치 106의 h접점에 연결되어 있으며, 상기 879의 출력은 선택스윗치 106의 k접점에 연결되어 있고, 상기 879의 저군발진회로의 L1코일과 콘덴서 C1간에 계전기 811,812,813 및 814의 각 a, b접점이 연결되고, 상기 879의 고군발진회로의 L2코일과 콘덴서 C2간에 계전기 815,816 및 817의 각 a, b접점이 연결되어 16진 카운터 591에서 제공되는 2진화 16진의 BCD코오드가 16진 디코더 592에 입력되면 상기 입력된 2진화 16진의 BCD코드에 의한 16진 디코더 592의 출력(

-10)에 의하여 관련된 계전기(저군발진회로에 속하는 하나의 계전기와 고군반진회로에 속하는 하나의 계전기)를 작동시켜 관련 계전기 a, b의접속접점에 의하여 공지 공용의 자동식 전화기의 복합주파수방식 선택신호회로 879에서 저군발진회로와 고군발진회로를 발진시켜 계수된 다이알임펄스에 해당되는 복합주파수를 발생시켜 선택스윗, 106을 통하여 전화국선 91로 피호출전화번호의 번호 숫자에 해당되는 복합주파수선택신호를 송출시킨다. 재트리거가 가능한 단안정·멀티·바이브레이터 534의 Q출력에서 제공되는 펄스에 의하여 10진 카운터 536에서 전화번호의 자리수를 계수하는데, 본 설명에서는 피호출전, 의 수를 선택스윗치 103A 및 B에 의하여 4개소를 선택하고, 또 선택스윗치 104에 의하여 비상통보용 선택하였음으로, 제어부 400의 4분주 카운터 454의 B출력에서 논리0이 출력되는 동안은(제1통보와 제2통보를 완전히 끝마칠 때까지) 선택스윗치 104의 a, b평상접점과 선택스윗치 103A의 a, b평상접점을 통하여 OR게이트 537의 제1입력에 논리0이 가해져 있으며, 또 선택스윗치 103을 동작시켜 피호출전화의 수를 3개소로 선택하였을때 상기 선택스윗치 103A의 a, c의동작접점에 의하여 논리0이 OR게이트 537의 제1입력에 제공되며, 상기 10진 카운터 536에서 전화번호의 6자라 까지 계수되면 상기 536의 B, C출력에서 논리1이 출력되며, 상기 536의 C의 논리1 출력이 OR게이트 537의 제2입력을 통하여 AND게이트 538의 제3입력이 가해지고, 또 상기 536의 B의 논리1출력의 선택스윗치 105의 접속접점(전화번호 자리수 7자리를 선택하였을 때의 위치)을 통하여 AND게이트 538의 제2입력에 가해지며, 상기 AND게이트 538의 제1입력에 피호출 전화번호의 끝자리 다이알임펄스의 첫 펄스가 다이아라 칩 561의 DP출력에서 입력되면 상기 AND게이트 538의 출력에서 논리1이 출력되는데, AND게이트 538의 출력은 NAND게이트 528의 , 2입력에 결합되어 있으며, NAND게이트 528의 제1입력은 NAND방식 R-S플립·플롭 527의Q출력에 결합되어 있어 다이아라 칩 591의 CE입력에 논리1이 가해져 있을때는 논리1이 가해져 있고, 상기 NAND게이트 528의 출력은 NAND방식 R-S플립·플롭 566의 ***** 입력에 결합되어 AND게이트 538의 출력에서 논리1이 출력되면 NAND게이트 528의 논리0 출력에 의하여 NAND방식 R-S플립·플롭 566이 셋되는 HOLD회로에 의하여 상기 R-S플립·플롭 566의 Q출력에서 논리1이 셋(3)곳으로 제공되며, 한곳은 다이아라 칩 561의 HOLD입력에 가하여 끝자리 다이알임펄스의 출력이 완료되는 즉시 다이아라 칩 561의 M1 및 DP출력에서 논리0을 출력시키고, 다른 한곳은 AND게이트 563의 제2입력에 제공되는데, 다이아라칩 561의 M1출력의 논리0이 인버터 562를 통하여 논리1를 AND게이트 563의 제1입력에 가함으로 상기 AND게이트 563의 논리1 출력이 수신부 200의 D플립·플롭 283의 R입력과 NAND게이트 286의 제1입력에 제공되며, 또 다른 한곳은 NAND게이트 567의 제1입력에 제공되어 상기 NAND방식 R-S플립·플롭 566의 리셋트회로를 준비한다. 다이아라 칩 561의 DP출력에서 조작스윗치 108의 e, d평상접점을 통한 또다른 한곳은 기억조작회로 560의 인버터를 통한 한 입력이며, 상기 560의 다른 한입력은 다이아라 칩 561의 DP출력에 직접결합되어 있어 상호상쇠작용에 의하여 표시등 110은 점화되지 않는다. 다이아라 칩 561의DP출력에 직접결합되어 있는 다른 한곳은 AND게이트 538의 제1입력인데 위하여 설명한 다이아라 칩 561의 HOLD회로에 제공된다. 이와같이 피호출전화의 수가 3개소 또는 4개소의 경우 비상통보용으로 사용될 때 첫번째로 기억시켜, 파출소 또는 지서의 전화를 호출하는 다이알임펄스를 제3도의 아와 같이 전화국선 91을 통하여 송출시키고, 또 제3도의 사와 같이 각 실의 표시등 23을 다이알임펄스에 의하여 점멸표시시켜 피호출전화를 호출하기 위하여 다이알링이 진행되고 있음을 표시한다.FIG. 14 is a circuit diagram showing in detail the complex frequency selection signal circuit 595 shown in FIG. Hexadecimal decoder592

An output is coupled to the first input of the OR gates 810 and 850, the output of 592

An output is coupled to the second input of the OR gates 810 and 860A, the output of 592

An output is coupled to the third input of the OR gates 810 and 870, the output of 592

An output is coupled to the second input of the OR gates 820 and 850, the output of 592

An output is coupled to an OR gate 820 and a first input, the output of 592 being coupled to an AND gate 860.

An output is coupled to a third input of an OR gate 820 and a second input of an OR gate 870.

An output is coupled to the third input of the OR gates 850 and 830, the output of

An output is coupled to a third input of an OR gate 860A to a second input of an OR gate 830,

An output is coupled to the first input of the OR gates 830 and 870, and the 10 output of the 592 is coupled to the second input of the OR gate 860B and the first and second inputs of the OR gate 840, and the output of the OR gate 860A is Coupled to a first input of an OR gate 860B, each output of the OR gates 810.820, 830, 840, 850, 860B, and 870 is coupled to a relay operation circuit 811, 812, 813, 814, 815, 816, 817, and an input of a complex frequency type selection signal circuit 879 of a publicly known automatic telephone is selected. The output of the 879 is connected to the k contact of the selector switch 106, and the contacts a, b of the relays 811, 812, 813 and 814 are connected between the L1 coil and the capacitor C1 of the low group oscillation circuit of the 879. The a and b contacts of the relays 815, 816 and 817 are connected between the L2 coil of the high oscillation circuit of 879 and the capacitor C2, and the binary hexadecimal BCD code provided by the hexadecimal counter 591 is input to the hexadecimal decoder 592. Output of the hexadecimal decoder 592 by the inputted binary hexadecimal BCD code.

-10) to operate the related relays (one relay belonging to the low group oscillation circuit and one relay belonging to the high group oscillation circuit), and then, by using the contact points of the relevant relays a and b, the combined frequency type selection signal of the public telephone of public use. In the circuit 879, the low frequency oscillation circuit and the high frequency oscillation circuit are oscillated to generate the complex frequency corresponding to the counted dial impulse, and through the selection switch, 106, the complex frequency selection signal corresponding to the number number of the called telephone number to the telephone line 91 Send it out. Decimal counter 536 counts the digits of the telephone number by the pulse provided from the Q output of the monostable multivibrator 534, which can be retriggered. Since the point was selected and the emergency switch was selected by the selection switch 104, while the logic 0 was output from the B output of the 4-division counter 454 of the control unit 400 (until the first and second notifications are completed), The logic 0 is applied to the first input of the OR gate 537 through the a, b normal contact of the selector switch 104 and the a, b normal contact of the selector switch 103A, and the selector 103 is operated to determine the number of called calls. When selected, the logic 0 is provided to the first input of the OR gate 537 by the operation contacts of the a and c of the selection switch 103A, and when the decimal counter 536 counts up to 6 digits of the telephone number, B of 536 is selected. , C At the output, logic 1 is output, the logic 1 output of C of 536 is applied the third input of AND gate 538 through the second input of OR gate 537, and the selection switch 105 of logic 1 output of B of 536 is applied. Is applied to the second input of the AND gate 538 through the contact point of contact (the position when seven digits of the telephone number is selected), and the first pulse of the dial digit of the last digit of the called telephone number is input to the first input of the AND gate 538. When input from the DP output of the diamond chip 561, logic 1 is output from the output of the AND gate 538. The output of the AND gate 538 is coupled to the 2 inputs of the NAND gate 528, and the first input of the NAND gate 528 is NAND. It is coupled to the Q output of the system RS flip-flop 527. When logic 1 is applied to the CE input of the diamond chip 591, the logic 1 is applied, and the output of the NAND gate 528 is the NAND RS flip-flop 566 **. *** AND gay coupled to input When logic 1 is outputted from the output of 538, logic 1 is set in the Q output of the RS flip-flop 566 by the HOLD circuit in which the NAND RS flip-flop 566 is set by the logic 0 output of the NAND gate 528. One is applied to the HOLD input of the diamond chip 561 to output logic 0 at M1 and DP output of the diamond chip 561 as soon as the output of the final dial impulse is completed, and the other is the second input of the AND gate 563. Logic 0 of M1 output of diamond chip 561 applies logic 1 to the first input of AND gate 563 via inverter 562 so that the logic 1 output of AND gate 563 is R of D-flop 283 of receiver 200. An input is provided to the first input of the NAND gate 286 and another is provided to the first input of the NAND gate 567 to prepare a reset circuit of the NAND type RS flip-flop 566. Another one of the diaphragm chip 561's DP outputs is an input through the operation switch 108's e, d normal contact, through the inverter of the memory control circuit 560, and the other input of the 560 is connected to the DP output of the diamond chip 561. Directly coupled, the indicator 110 does not ignite due to mutual deactivation. Another directly coupled to the DP output of the diamond chip 561 is the first input of the AND gate 538 provided to the HOLD circuit of the diamond chip 561 described. In this way, the number of called telephones is first remembered when three or four telephones are used for emergency notification, and the dial impulse calling the telephone at the police box or branch office is transmitted through telephone line 91 as shown in FIG. As shown in Fig. 3, the indicator 23 of each room flashes by a dial impulse to indicate that a dialing is in progress to call a called telephone.

출력에서 논리1를 16T동아 출력시키며 이와같이 차례로 각 출력에서 16T동안 논리1를 출력시키는데, 선택스윗치 102의 b-f접점에 16진 디코더 443의

-

출력이 연결되어 있으며, 선택스윗치 102에 의하여 원하는 상기 16진 디코더 443의 출력을 선택할 수 있고, 본 설명에서는 16진 디코더 443의

출력을 선택한 것을 예로 들었으며, 따라서 기동으로 부터 64T후에 경보개시시간신호가 두 곳으로 제공되는데, 한 곳은 경보부 300의 인버터 351를 통하고 분압용 저항기 352를 통하여 NPP스윗칭 트랜지스터 353의 베이스에 바이아스전압을 가함으로 상기 트랜지스터 353이 도통되어 직류전압의 음극을 계전기 350의 A평상접점을 통하여 계전기 350의 코일에 가하여 예자시킴으로 작동되어 계전기 350의 B동작접점에 의하여 전자시계 40의 전원회로를 개로시켜 상기 전자시계 40을 제3도의 파와 같이 정지시킴으로서 비상사태 발생시간을 지침시키고, 계전기 350의 A동작접점에 의하여 표시판 30의 스윗치 36의 a, b평상접점을 통하여 제공되는 직류전압의 음극이 저항기 354를 통하여 계전기 350의 코일에 제공됨으로서, 계전기 350을 작동유지시키는데, 제3도의 거에 표시된 바와같이 표시판30의 스윗치 36을 한번 동작시킬때까지 계전기 350을 작동유지시킨다. 다른 한곳은 인버터 436을 통하여 16T동안 논리0을 두곳으로 제공시키며, 한곳은 NAND방식 R-S플립·플롭 434의 R입력에 리셋트신호를 가하고, 다른 한곳은 NAND게이트 435의 제2입력에 가해지며, 상기 NAND게이트 435의 출력에서 논리1이 경보부 300의 제2도의 B와 같은 파형을 가진 펄시가 가해져 있는 NAND게이트 371의 제2입력에 가해져서, 상기 NAND게이트 371의 출력에서 제2도의 G와 같은 파형의 펄스를 부져 24의 작동회로에 가하여 제3도의 타에 표시된 바와 같이 2T간격으로34회 부져 24를 동작시켜 비상사태발생을 건물내 각실을 경보한다.As indicated by F 'in Fig. 2, the decoder 443

The output of logic 1 is outputted by 16T at the output. In this way, the output of logic 1 is outputted for 16T at each output in turn.

-

An output is connected, and the output of the hexadecimal decoder 443 desired by the selection switch 102 can be selected.

The output is selected as an example. Therefore, two alarm start time signals are provided after 64T from the start, one at the base of the NPP switching transistor 353 through the inverter 351 of the alarm unit 300 and the voltage divider resistor 352. The transistor 353 is energized by applying a bias voltage, and is operated by applying a direct current negative electrode to the coil of the relay 350 through the A normal contact of the relay 350 to operate the power circuit of the electronic clock 40 by the B operating contact of the relay 350. When the electronic clock 40 is opened and the electronic clock 40 is stopped as shown in FIG. 3, the emergency occurrence time is guided, and the negative voltage of the DC voltage provided through the a, b normal contacts of the switch 36 of the display panel 30 is controlled by the A operating contact of the relay 350. Provided to the coil of relay 350 through a resistor 354 to keep the relay 350 operating, as shown in FIG. The operation of the relay 350 is maintained until the one operating the switch 36 on the indicator panel 30, as described. The other provides two logic 0s for 16T through the inverter 436, one to apply a reset signal to the R input of the NAND RS flip-flop 434, and the other to the second input of the NAND gate 435. At the output of the NAND gate 435, logic 1 is applied to the second input of the NAND gate 371, which is pulsed with a pulse like that of B of FIG. 2 of the alarm unit 300, such that G at the output of the NAND gate 371 is equal to G of FIG. A pulse of a waveform is applied to the 24 operating circuits, and as shown in the other part of FIG. 3, 34 buzzers 24 are operated at intervals of 2T to alarm each room in the building for an emergency.

출력에서 논리0이 NAND게이트 414의 제2입력에 제공됨으로 NAND게이트 414의 논리1 출력에 의하여 제3도의 사, 아, 자에 표시된 바와 같이, 전화국선 91를 본 비상통보기에서 개방시키고, 전화국선 91은 전화기 60에 연결되며 비상통보를 받은 곳으로 부터 확인통화를 할 수 있게되고, 녹음기 573의 작동을 정지시켜 비상통보송절을 멈추고, 각 실의 표시등 23을 멸화시켜 전화국선 91에 본 비상통보기가 접촉되지 않음을 표시한다. 제2도의 F'에 표시된 바와같이 기동으로 부터 240T후에 16진 디코더443의 15출력에서 16T동안 논리1를 4분주 카운터 454의 E압력에 가하여 계수시키며, 상기 4분주카운터 454의 A, B출력에 결합되어 있는 NOR게이트 451의 출력은 AND게이트 521과 552의 제2입력에 결합되어 매 주기초에 한하여 NOR게이트 451의 출력에서 논리1를 출력하며, 또 상기 4분주 카운터 454의 A, B출력에 결합되어 있는 AND게이트 453은 선택스윗치 103B에 의하여 피호출전화의 수를 3개소로 선택하였을 때, 제1, 제2, 제3 통보를 마친후 상기 454의 A 및 B 츨력에서 논리1이 출력됨으로 상기 AND게이트 453의 출력에서 논리1이 출력되어 선택스윗치 103B의 d, f동작접점을 통하고 OR게이트 455의 제2입력을 통하여 4분주 카운터 454의 R입력에 가해짐으로 상기 4분주 카운터 454를 리셋트시켜 결국 상기 454를 3분주시키는 작용을 하며, 상기 카운터 454의 B출력에 결합되어 있는 인버터 452는 피호출전화의 수를 선택스윗치 103A에 의하여 4개소로 선택되었을 때, 화재속보용으로 사용하기 위하여 선택스윗치 104를 동작시켜 선택스윗치의104 a, c접점이 접속되어 있는 상태에서, 첫번째, 두번째 피호출전화를 호출할때 까지는 상기 454의 B출력에서 논리0이 출력됨으로 인버터 452를 통한 논리1이 선택속윗치 104의 a, c동작접점과 선택스윗치 103A의 a, b평상접점을 통하여 통보부 500의 OR게이트 537의 제1입력에 가해짐으로 상기 OR게이트 537의 논리1출력이 AND게이트 538의 제3입력에 가해져서, 피호출전화번호의 자리수를 3자리 즉 119, 또는 112로 되게하기 위한 것이며, 두번째 피호출전화를 호출하고 제2통보가 완료되면 상기 카운터 454의 B출력에서 논리1이 출력됨으로 OR게이트 537의 제1입력에 논리0이 가해져서 세번째, 네번째 피호출전화번호의 자리수는 7자리 전화번호가되며, 피호출전화의 수를 4개소로 선택하였을때, 상기 4분주 카운터 454의 C출력에서 논리1이 출력되면(제4통보가 완료된 후) 선택스윗치 103B의 d, e평상접점을 통하고 OR게이트 455의 제2입력을 통하여 4분주 카운터 454의 R입력에 가해져서 상기 454를 리셋트시켜 4분주 카운터가 되게한다.As shown in F 'of FIG. 2, logic 1 is outputted for 16T at 10 outputs of the hexadecimal decoder 443 after 160T from the start.In this way, logic 1 is outputted for 16T at each output in this way. The 10-14 outputs of the hexadecimal decoder 443 are connected, and the desired output of the hexadecimal decoder 443 can be selected by the selection switch 112. In this description, the 10 outputs of the hexadecimal decoder 443 are selected. Therefore, after 160T from the start, logic 1 is applied to the S input of the NOR type RS flip flop 412 to set the RS flip flop 412, and

In the output, logic 0 is provided to the second input of the NAND gate 414, and according to the logic 1 output of the NAND gate 414, the telephone line 91 is opened in the emergency call as shown in Figs. CO line 91 is connected to the telephone 60, and can make a confirmation call from the place where the emergency call was received, stop operation of the recorder 573, stop the emergency call transfer, and extinguish the indicator 23 in each room to make the call to the telephone line 91 Indicates that an emergency call is not touched. As shown in F 'of FIG. 2, logic 1 is counted by applying the E pressure of the four-division counter 454 for 16T at 15 outputs of the hexadecimal decoder 443 after 240T from the start, and is applied to the A and B outputs of the four-division counter 454. The output of the combined NOR gate 451 is coupled to the second inputs of the AND gates 521 and 552 to output logic 1 at the output of the NOR gate 451 every second of the cycle, and to the A and B outputs of the four-division counter 454. The combined AND gate 453 outputs logic 1 at the A and B outputs of 454 after completing the first, second, and third notifications when the number of called calls is selected by three selection switches 103B. A logic 1 is output from the output of the AND gate 453 to be applied to the R input of the 4 division counter 454 through the d and f operation contacts of the selection switch 103B and through the second input of the OR gate 455, thereby providing the 4 division counter 454. Reset to 454 minutes after all The inverter 452 coupled to the B output of the counter 454 is selected by operating the selector switch 104 for use in the breaking news when the number of called calls is selected by the selector switch 103A. With the contacts 104a and c of the switch connected, logic 0 is output from the B output of the 454 until the first and second called phones are called. cThe logic 1 output of the OR gate 537 is applied to the third input of the AND gate 538 by being applied to the first input of the OR gate 537 of the notification unit 500 through the a and b normal contacts of the operation contact and the selection switch 103A. The number of digits of the called telephone number is set to three digits, that is, 119 or 112. When the second called telephone is called and the second notification is completed, logic 1 is outputted from the B output of the counter 454. Logic 0 is applied to input 1, and the number of 3rd and 4th called numbers becomes 7-digit phone number. When 4 numbers of called calls are selected, logic 1 is displayed at C output of 4 division counter 454. When the output (after the fourth notification is completed) is applied to the R input of the four-division counter 454 through the d, e normal contact of the selection switch 103B and through the second input of the OR gate 455, the four-division counter is reset. To be.

출력에서 16T동안 논리1이 출력되어, NOR방식 R-S플립·플롭 412를 리셋트시켜 제3도의 사, 아, 자에 표시된 바와같이 전화국선 91를 본 비상통보기에 접속시키고, 녹음기 573으로 부터 비상통보내용을 전화국선 91로 송출시키며, 각 실의 표시등 23을 점화시켜 본 비상통보기가 전화국선 91에 접속된 것을 표시하며, 통보부 500의 10진 카운터536을 리셋트시켜 다음 피호출전화의 자리수를 계수할 준비를 하고, 16T후 16진 디코더 443의

출력에서 논리1이 출력되면 통보부 500의 10진 카운터 536을 리셋트 시키고, 또 NAND방식 R-S플립·플롭 566을 리셋트시킴으로 상기 566의 Q출력에서 출력되었든 논리1이 논리0으로 스윗칭되어 다이아라 칩 561의 HOLD 입력에 논리0을 가하여 다음 피호출전화번호의 다이알임펄스를 다이아라 칩 561의 DP출력에서 출력시켜 제3도의 사, 샤, 아와 같이 전화국선 91로 피호출전화를 호출하는 선택신호를 송출시키고, 또 각 실의 표시등 23을 피호출전화를 호출하는 다이알임펄스에 의하여 점멸표시시키며, 제3도의 차, 카와 같이 파출소 비상경보회로 73을 작동시키고, 또 경비실 인터폰 72를 호출하며 비상통보내용을 전화국선 91과 인터폰통화선 71로 송출시키고, 이와같이 제1통보때와 같은 순서로 제2통보, 그리고 제3통보 및 제4통보를 하는 하나의 주기통보를 하고 또다시 제1통보에서 부터 차례로 반복하여 표시판 30의 원상복구용 푸시버튼 38를 동작시킬때까지 계속한다.As indicated by F 'in Figure 2, the hexadecimal decoder 443

Logic 1 is outputted for 16T at the output, reset NOR RS flip flop 412, and connect telephone line 91 to this emergency alert as shown in Fig. 3, a. The notification is sent to the telephone line 91, the indicator 23 in each room is ignited to indicate that this emergency call is connected to the telephone line 91, and the decimal counter 536 of the notification unit 500 is reset to perform the next call. Prepare to count the digits, and after 16T hexadecimal decoder 443

When the logic 1 is outputted from the output, the decimal counter 536 of the notification unit 500 is reset, and the NAND RS flip-flop 566 is reset, so that logic 1, which is output from the Q output of 566, is switched to logic 0 and A logic 0 is applied to the HOLD input of the D chip 561 to output the dial impulse of the next called telephone number from the DP output of the DIA chip 561 to call the called telephone with the telephone line 91 as shown in FIG. It sends out a selection signal, flashes the indicator 23 of each room by a dial impulse calling the called telephone, activates the police station emergency alarm circuit 73 like the car and car of FIG. 3, and calls the guard intercom 72 The emergency notification is sent to the telephone line 91 and the intercom call 71. In this way, the second and third and fourth notifications are made in the same order as in the first notification. Claim continues until the 1 was repeated in order from the notification from the operating push-button 38 for restoration of the panel 30.

출력이 논리0에서 논리1로 스윗칭되어 계전기 570과 580이 복구됨으로 제3도의 아, 자, 사에 표시된 바와같이 전화국선 91은 전화기 60으로 전환접속되고, 녹음기 573은 작동을 멈추고, 표시등 23은 멸화되어 본 비상통보기가 전화국선 91에서 개방되었음을 표시하고, 4분주 카운터 454를 리셋트시키고, NOR m.m 404를 거쳐 OR게이트 405의 제1입력을 통하여 16진 카운터 442의 R입력에 1mS동안 논리1를 가하여, 상기442를 리셋트시키며, NAND게이트의 447, 제1입력에 논리1를 가하여 NAND방식 R-S플립·플롭 404의 리셋트회로를 준비시킨다. 4분주 카운터 454와 16진 카운터 442의 리셋트로 16진 디코더 443의

출력에서 논리1이 출려고디어 다이아라 칩 561의 CE입력에 논리0을 가하여 리. 다이알신홀르 받아들일 수 있게하고, 또 전화번호 자리수 계수용 10진 카운터 536을 리셋트시키며, 16T후에 상기 디코더 443의

출력에서 논리1이 출려되면 NAND방식 R-S플립·플롭 566이 셋되어 있으면 이를 리셋트시키고, 리. 다이알회로 520의 리. 다이알발신에 의하여 다이아라 칩 561의 CE에 논리1를 제공함으로서 상기 다이아라에 칩 561, 기억시켜둔 피호출전화번호의 다이알임펄스를 그 DP출력에서 전부 출력시킨다. 즉 전화번호 자리수 계수용 10진 카운터 536의 R입력에 논리1이 가해져 있음으로 전화번호의 자리수를 계수할 수 없으며, 따라서 다이아라 칩 561의 HOLD입력에 논리1를 제공할 수 없음으로 전화번호의 자리수를 계수할 수 없으며, 따라서 다이아라 칩 561의 HOLD입력에 논리1를 제공할 수 없음으로 결국 입력된 피호출전화번호의 다이알 임펄스를 전부 DP출력에서 출력시킴으로 다음에 본 비상통보기가 기동되면 기억시켜둔 첫번째 피호출전화번호의 다이알 임펄스에서 부터 다이아라 칩 561의 DP출력에서 출력된다.When logic 1 is applied to the input of the inverter 270 via a resistor 291 for supplying the positive pole of the DC voltage connected to the positive pole of the DC voltage of the receiving unit 200, the push button 38 for restoring the original state of the display panel 30 is removed after the emergency notification is completed. When operated as shown in 3 degrees, the NOR RS flip-flop 254 is reset by the original recovery start circuit, and the Q output of the 254 is switched from logic 1 to logic 0 so that the AND gate 421 of the controller 400 cannot operate. As shown in the llama of FIG. 3, the indicator 31 indicating the location of the emergency occurrence and the incandescent lamp or the emergency bell 50 indicating the location of the emergency occurrence stop or stop flashing or operation at 2T intervals. Various display and alarm circuits cannot be operated, and the NOR RS flip-flop 254

The outputs are switched from logic 0 to logic 1 and relays 570 and 580 are restored so that telephone line 91 is connected to telephone 60, as shown in Fig. 3, A, 3, and recorder 573 stops operating. 23 is extinguished to indicate that this emergency alert has been opened on telephone line 91, resets the 4th frequency counter 454, and passes 1 NS to the R input of the hexadecimal counter 442 via the NOR mm 404 through the first input of the OR gate 405. A logic 1 is added to reset the 442, and a logic 1 is applied to 447 and the first input of the NAND gate to prepare a reset circuit of the NAND system RS flip-flop 404. Quad division counter 454 and hexadecimal counter 442 reset to hexadecimal decoder 443.

Logic 1 is output from the output, and logic 0 is applied to the CE input of the diamond chip 561. Dialsholes and resets the decimal counter 536 for counting telephone digits, and after 16T the decoder 443

When logic 1 is output from the output, reset the NAND RS flip-flop 566 if it is set. 520 r of dial circuits. By dialing, the logic 1 is provided to the CE of the diamond chip 561 so that all the dial impulses of the chip 561 and the called telephone number stored in the diamond are output from the DP output. That is, the number of digits of the telephone number cannot be counted because logic 1 is applied to the R input of the decimal counter 536 for counting the number of digits of the telephone number. Since the logic 1 cannot be provided to the HOLD input of the diamond chip 561, the dial impulse of the called telephone number is eventually output from the DP output. It is output from the DP output of the diamond chip 561 from the dial impulse of the first called telephone number.

출력은 NAND게이트 447의 제2입력에 결합되어 있으며, 제2도의 F'에 표시된 바와 같이 기동으로 부터 80T후에 R-S플립·플롭 254의

출력에서는 논리1이 가해져 있는 NAN게이트 447의 제2입력에 논리1이 제공됨으로 상기 NAND게이트 447의 출력에서 논리0을 NAND방식 R-S플립·플롭401의Rdlqfur에 가하여, 상기 401를 리셋트시켜 상기 401의 Q출력이 논리1에서 논리0, 로 스윗칭됨으로, 펄스발생부 600의 기동을 멈추게하고, 또 다이아라 칩 561의 VDD입력을 제거시키며, 상기 401의

출력이 논리0에서 논리1로 스워칭되어 NOR m.m 403에서 1mS동안 논리1를 OR게이트 405의 제2입력을 통하여 16진 카운터 442의 R입력에 가하여, 상기 442, 리셋트시키고 또 펄스발생부 600의 OR게이트 604의 제2입력을 통하여 카운터 602와 603을 리셋트시켜 비상통보기를 원상으로 복구시킨다. 제3도의 . 에 표시된 바와같이 스윗치 36을 동작시키면, 경보부 300의 계전기 350을 복구시킴으로 전자시계 40의 시간을 교정한후 일상용 시계로 사용한다.Hexadecimal decoder 443

The output is coupled to the second input of the NAND gate 447, and the RS flip-flop 254 of 80T after the start, as indicated by F 'in FIG.

In output, logic 1 is provided to the second input of NAN gate 447 to which logic 1 is applied, so that logic 0 is applied to Rdlqfur of NAND RS flip-flop 401 at the output of NAND gate 447 to reset the 401 to 401. The output of Q is switched from logic 1 to logic 0, thereby stopping the start of the pulse generator 600 and removing the VDD input of the diamond chip 561,

The output is switched from logic 0 to logic 1, applying logic 1 to the R input of the hexadecimal counter 442 through the second input of the OR gate 405 for 1 mS at NOR mm 403 to reset the 442 and pulse generator 600 The counters 602 and 603 are reset through the second input of the OR gate 604 at to restore the emergency alert. Of FIG. 3. As shown in the figure, when the switch 36 is operated, the relay 350 of the alarm unit 300 is restored to calibrate the time of the electronic clock 40 and then used as a daily clock.

출력에서 논리0이 넷(4)곳으로 출력되며, 한곳은 제어부 400의 AND게이트 421의 제2입력에 제공되어 상기 AND게이트 421은 동작될 수 없게 되며 비상통보의 각종표시 및 경보회로가 구성될 수 없게되고, 다른 한곳은 통보부 500의 AND게이트 572의 제2입력에 제공되어 상기 AND게이트 572는 동작될 수 없게 되며 따라서 녹음기 573은 작동될 수 없게 되고, 또 다른 한곳은 NAND에 의한 논리미분회로 276의 입력에 제공되고, 끝으로 직류차단겸 시정수용 콘덴서 278에 제공됨으로 상기 콘덴서 278은 방전된다. OR게이트 273의 출력에서 논리1, 제공되는 다른 한곳은 OR게이트 253의 제2입력을 통하여 NOR방식 R-S플립·플롭 254의 S입력에 가해져서, 상기 254를 셋시키고, 상기 NOR방식 R-S플립·플롭 254의

출력의 논리0출력에 의하여 비상통보에서 상술한 바와같이 펄스발생부 600과 제어부 400 및 통보부 500의 관련회로를 작동시켜 제3도의 야, 너에 표시된 바와같이 16T동안 전화국선 접속회로에 의하여 전화국선 91이 본 비상통보기에 접속되고 또 표시등 81의 국선접속상태표시회로에 의하여 표시등 81에 국선접속상태를 표시한다. 첫번째 기언시켜둔 피호출전화의 다이알임펄스가 다이아라체 561의 DP출력에서 출력되면 NOR게이트 539의 출력에서 중계되는 임펄스는 표시등 81의 국선접속상태표시회로를 통하여 표시등 81를 제3도의 너와 같이 점멸표시시키고, 또 전화국선 91로 선택신신호송출회로에 의하여 제3도의 야에 표시된 바와같이 피호출전화를 호출하는 선택신호가 송출되며, 통보부 500에서 전화번호 자리수의 계수를 마치면 AND게이트 538의 논리1 출력에 의한 HOLD회로에 의하여 NAND방식 R-S플립·플롭 566의 Q출력에서 논리1이 출력되어 다이아라 체 561를 HOLD시키며, 상기 다이아라 체 561이 HOLD되면 AND게이트 563의 출력에서 논리1이 수신부 200의 D플립·플롭 283의 R입력과, NAND게이트 286의 제1입력에 제공되며, NAND게이트 286의 제2입력은 D플립·플롭 283의

출력에서 5mS지연회로 285를 통하여 논리1이 가해져 있음으로, 상기 NAND게이트 286의 출력에서 논리0이 직류차단겸 시정수용 콘덴서 287과 직류전압의 양극(VDD)에 연결된 직류전압의 양극을 공급하는 저항기 288를 통하여 콘덴서 287를 충전시켜서 발생되는 트리거 펄스가 인버터 289를 통하여 D플립·플롭 274의 R입력에 논리1를 가함으로, 상기 D플립·플롭 274를 리셋트시키며, 상기 274, 리셋트로 Q출력이 논리1에서 논리0으로 스윗칭됨으로 표시등 81를 제3도의 너에 표시된 바와같이 멸화시키고, 상기 274의

출력이 논리0에서 논리1로 스윗칭됨으로 NAND에 의한 논리미분회로 274에서 1mS동안 논리0를 직류차단겸 시정수용 콘덴서 277를 통하여 인버터 270의 입력에 트리거펄스를 가하여 상기 인버터 270의 논리1출력을 NOR방식 R-S플립·플롭 254의 R입력에 가하여, 상기 254를 리셋트시키며, 이후는 상술한 원상복구기동회로가 기동된후와 같은 방법과 순서로 원상복구시키며, 또 D플립·플롭 274의

출력이 논리0에서 논리1로 스윗칭되면 직류차단겸 시정수용 콘덴서 278를 통하여 트리펄스를 NOR m.m 279에 가하며, 상기 NOR m.m 279의 출력에서 1mS동안 논리1이 OR게이트 267의 제2입력을 통하여 통보부 500의 NAND게이트 567의 제2입력에 제공되어 HOLD해제회로에 의하여 R-S플립·플롭 566은 리셋트된다.When calling the first recalled call memorized for the purpose of daily call, press the Foxy Button 82 of the individual pager as shown in Fig. 3 once more to activate the DC voltage anode connected to the normal DC voltage anode (VDD). Logic 0 is provided at the output of the inverter 272 by providing a logic 0 at the input of the inverter 272 through the pushbutton 82 at the negative pole of the DC voltage, to which the logic 1 is applied to the input of the inverter 272 via a resistor 271 for supply. It is provided in two places through the first input of the gate 273, and one is applied to the S input of the D flip flop 274 so that the D flip flop 274 is set, and logic 1 is NAND at the Q output of the D flip flop 274. The first input of the NAND gate 275, which is provided at the second input of the gate 275, is coupled to the output of the OR gate 284, and logic 1 is applied when the emergency alert is connected to the telephone line 91, and the NAND gate 2 The logic 0 output of 75 applies a bias voltage to the base of the PNP switching transistor 293 through the resistor 292 for the main pressure, so that the transistor 293 is turned on, and the conduction of the transistor 293 causes the DC voltage anode (VDD) of the individual pager 80 to turn on. The trunk line connection status indicator 81, which is applied to the trunk line connection status indicator circuit 81, ignites like you in FIG.

In the output, logic 0 is output to four (4) places, one of which is provided to the second input of the AND gate 421 of the control unit 400 so that the AND gate 421 cannot be operated and various display and alarm circuits of the emergency notification can be configured. And the other is provided to the second input of the AND gate 572 of the notification unit 500 so that the AND gate 572 becomes inoperable and thus the recorder 573 becomes inoperable, and the other is the logical derivative by NAND. The capacitor 278 is discharged by being provided at the input of the circuit 276 and finally at the DC blocking and time constant capacitor 278. The logic 1 at the output of the OR gate 273 is applied to the S input of the NOR system RS flip-flop 254 via the second input of the OR gate 253, setting the above 254, and setting the NOR system RS flip-flop. 254

According to the logic 0 output of the output, as described in the emergency notification, the pulse generating unit 600, the control unit 400, and the related circuits of the notification unit 500 are operated to make a call by the telephone line connection circuit for 16T as shown in FIG. The trunk line 91 is connected to this emergency report, and the trunk line connection status is displayed on the indicator 81 by the trunk line connection status display circuit of the indicator 81. When the dial impulse of the first called telephone is output at DP output of Diache 561, the impulse relayed at the output of NOR gate 539 is connected to the indicator 81 through the trunk line connection status indicator circuit of indicator 81. Blinking signal is displayed on the telephone line, and the selected signal transmitting circuit transmits a selection signal for calling the called telephone as shown in the diagram of Fig. 3, and when the notification unit 500 finishes counting the number of digits of the telephone number, the AND gate 538 is displayed. A logic 1 is output from the Q output of the NAND type RS flip-flop 566 by the HOLD circuit by the logic 1 output to HOLD the diache 561. When the diache 561 is HOLDed, the logic 1 is output at the output of the AND gate 563. The R input of the D flip-flop 283 of the receiver 200 and the first input of the NAND gate 286 are provided, and the second input of the NAND gate 286 is of the D flip-flop 283.

The logic 1 is applied through the 5mS delay circuit 285 at the output, so that the logic 0 is supplied at the output of the NAND gate 286 to supply the positive pole of the DC voltage connected to the DC blocking and time constant capacitor 287 and the positive pole of the DC voltage (VDD). A trigger pulse generated by charging the capacitor 287 through the 288 resets the D-flop 274 by applying logic 1 to the R input of the D-flop flop 274 through the inverter 289. Switched from logic 1 to logic 0 to extinguish indicator 81 as indicated by you in FIG.

Since the output is switched from logic 0 to logic 1, logic 0 is applied to the input of inverter 270 through DC blocking and time constant capacitor 277 in the logic differential circuit 274 by NAND for 1mS to apply logic 1 output of the inverter 270. In addition to the R input of the NOR system RS flip-flop 254, the above-mentioned 254 is reset, and then the original recovery is performed in the same manner and in the same manner as after the above-mentioned original recovery start circuit is started, and the D-flop 274

When the output is switched from logic 0 to logic 1, a tripulse is applied to NOR mm 279 through DC blocking and time constant capacitor 278, and logic 1 passes through the second input of OR gate 267 for 1 mS at the output of NOR mm 279. Provided to the second input of the NAND gate 567 of the notification unit 500, the RS flip-flop 566 is reset by the HOLD release circuit.

In this manner, the first called telephone is called and the pushbutton 82 is pressed once to make a routine call on the telephone 60 without dialing manipulation.

출력이 논리1에서 논리0으로 스윗칭되어 셋(3)곳으로 제공되며, 한곳은 직류차단겸 시정수용 콘덴서 263에 가해져서 상기 콘덴서 263을 방전시키고, 다른 한곳은 5mS 지연회로 285를 가쳐 5mS후에 NAND게이트 286의 제2입력에 논리0을 제공하며, 끝으로 통보부 500의 NOR게이트 529의 제2입력에 논리0이 제공되는데, 상기 NOR게이트 529의 제1입력에는 리. 다이알발신 때까지 (다이아라 체 561의 CE입력에 논리1이 제공될 때까지), NAND방식 R-S플립·플롭 527의 Q출력에서 논리0, 제공됨으로 상기 NOR게이트 529의 출력에서 논리1이 NOR게이트 571의 제2입력을 통하여 계전기 570의 작동회로에 논리0을 가하여 계전기 570은 작동될 수 없다. 인버터 282의 출력에서 논리1이 제공되는 다른 한곳은, OR게이트 273의 제2입력을 통하여 위에서 설명한 기언시켜둔 첫번째 피호출전화를 호출할 때와 동일하게 수신부 200과 제어부 400과 통보부 500과 펄스발생부 600의 관련회로가 작동되고, 기동으로 부터 16T후에 리 다이알회로 520의 리. 다이알발신에 의하여 통보부 500의 NAND방식 R-S플립·플롭 527의 Q출력에서 논리1이 NOR게이트 529의 제1입력을 통하여 논리0을 NOR게이트 571의 제2입력에 제공되면, 상기 NOR게이트 571의 제1입력은 제어부 400의 NAND게이트 414의 출력에서 논리0이 제공되어 있음으로, 상기 NOR게이트 571의 논리1 출력이 계전기 570의 작동회로에 가해져서 상기 계전기 570이 작동됨으로 전화국선 접속회로에 의하여 제3도의 야에 표시된 바와같이 개별호출기 80에서 두번째 피호출전화를 호출할때에 한하여 기동으로부터 16T후에 전화국선 91에 본비상통보기가 접속된다.When calling and recalling the second recalled call for everyday call purpose, press the pushbutton 83 of the individual pager 80 once as shown in Fig. 3, the anode of the DC voltage connected to the VDD of the usual DC voltage. Logic 0 is applied to the input of the inverter 282 through a resistor 281 to supply an input to the input of the inverter 282 through a pushbutton 83 at the negative pole of the DC voltage. It is provided in two places, and one is provided to the S input of the D flip-flop 283 to set it. When the D flip-flop 283 is set, its Q output is switched from logic 0 to logic 1 to set the OR gate 284. 2 inputs are provided to the second input of the NOR gate 581 of the notification unit 500 and 582, input of the DC impulse select signal circuit, and are output from the DP output of the diamond set 561 when the D flip-flop 283 is in the set state. The dial impulse of the first called telephone number is invalidated to be transmitted to the telephone line 91, and is provided to the first input of the NAND gate 275. When the D flip-flop 274 is set to the second input of the NAND gate 527, Since the logic 1 is applied at the Q output of the 274, the output of the NAND gate 275 ignites the indicator 81 like the one in FIG. 3 through the trunk line connection state display circuit of the indicator 81. Of D flip flop 283

The output is switched from logic 1 to logic 0 and provided to three (3) locations, one of which is applied to the DC blocking and time constant capacitor 263 to discharge the capacitor 263, and the other to the 5 mS delay circuit 285 after 5 mS. A logic 0 is provided to a second input of the NAND gate 286, and finally a logic 0 is provided to a second input of the NOR gate 529 of the notification unit 500, and a logic 0 is provided to the first input of the NOR gate 529. Logic 0 at the output of the NAND RS flip-flop 527 is provided until logic dialing (until logic 1 is provided at the CE input of diache 561), so that logic 1 is the NOR gate at the output of the NOR gate 529. The relay 570 cannot be operated by applying logic 0 to the operating circuit of the relay 570 through the second input of 571. Another place where logic 1 is provided at the output of the inverter 282 is via the second input of the OR gate 273, the same as when calling the first called call described above, the receiver 200 and the controller 400 and the notification unit 500 and the pulse. Relevant circuit of generator 600 is activated, and redialer circuit 520 is reconnected 16T after starting. If the logic 1 is supplied to the second input of the NOR gate 571 through the first input of the NOR gate 529 at the Q output of the NAND system RS flip flop 527 of the notification unit 500 by dialing, The first input is provided with logic 0 at the output of the NAND gate 414 of the control unit 400, and the logic 1 output of the NOR gate 571 is applied to the operation circuit of the relay 570 so that the relay 570 is operated so that the telephone line connection circuit As indicated in the diagram of Fig. 3, the emergency call is connected to the telephone line 91 only 16T after the start only when calling the second called telephone from the individual pager 80.

출력이 논리0에서 논리1로 스윗칭되어 콘덴서 263을 충전시킴으로서 발생되는 트리펄스가 OR게이트 265의 제2입력을 통하여 NOR m.m 266의 입력에 제공되며, 상기 NOR m.m 269의 출력에서 1mS동안 논리1를 두곳으로 제공하는데, 한곳은 통보부 500의 OR게이트 531의 제2입력을 통하여 10진 카운터 536을 리셋트시켜 다음 전화번호의 자리계수를 준비시키고, 다른 한곳은 OR게이트 267의 제1입력을 통하여 NAND게이트 567의 제2입력에 제공되어 HOLD해제회로에 의하여 다이아라 체 561의 HOLD를 해제시켜서 두번째 피호출전화번호의 다이알임펄스를 출력시키며, 또 AND게이트 563의 출력에서 논리0를 출력시킨다. D플립·플롭 783이 리셋트되어그

출력이 논리0에서 논리1로 스윗칭되면 5mS지연회로 285를 통하여 5mS후에NANA게이트 286의 제2입력에 논리1를 가함으로, 상기 786의 제1입력은 상기 D플립·플롭 283이 리셋트된 1mSgn에 논리0이 이미 가해져 있음으로 상기 NAND게이트 286은 동작할 수 없게 된다. D플립·플롭 283이 리셋트됨으로서 그 Q출력에서 논리0을 출력함으로 다이알임펄스의 무효화회로가 해제되어 다이아라 체 561이 DP출력에서 두번째 피호출전화번호의 다이알임펄스가 NOR게이트 539의 제2입력을 통하여 OR게이트 284의 제1입력에 제공되면, 상기 OR게이트 284의 출력에서 두곳으로 다이알임펄스를 중계하는데, 한곳은 통보부 500의 NOR게이트 581의 제2입력과 직류임펄스 선택신호회로 588의 입력에 제공되어 제3도의 야에 표시된 바와같이 전화국선 91로 두번째 피호출전화를 호출하는 선택신호가 송출되고, 다른 한곳은 D플립·플롭 274가 체기간중기 Q출력에서 논리1이 제2입력에 가해져 있는 NAND게이트 275의 제1입력에 제공되며, NAND게이트 275의 출력은 표시등 81의 국선접속상태표시화로를 통하여 표시등 81은 제3도의 너에 표시된 바와같이 두번째 피호출전화의 다이알임펄스가 전화국선으로 출력됨을 표시한다. 이후는 상술한 푸시버튼 82를 한번 눌렀을때와 동일한 관련회로의 작동을 하고, 전화기 60에서 두번째 피호출전화와 일상적인 통화를 하게 된다.Lee. The dial impulse of the first called call by dialing is output from the DP output of the dialer 561. When the digit count of the first called number is completed, the dialer 561 is held by the HOLD circuit and the AND gate 563 In the output of logic 1, logic 1 is provided at the first input of the NAND gate 286 of the receiver 200 and the R input of the D flip flop 283, so that the D flip flop 283 is reset and the reset of the 283 is performed.

A tripulse, generated by switching the output from logic 0 to logic 1 to charge capacitor 263, is provided to the input of NOR mm 266 through a second input of OR gate 265, and a logic 1 for 1 mS at the output of NOR mm 269. It provides two places, one of which resets the decimal counter 536 through the second input of the OR gate 531 of the notification unit 500 to prepare the digit coefficient of the next telephone number, and the other of the first input of the OR gate 267. A second input of the NAND gate 567 is provided to release the HOLD of the diache 561 by the HOLD release circuit to output a dial impulse of the second called telephone number, and output a logic 0 at the output of the AND gate 563. D flip flop 783 is reset

When the output is switched from logic 0 to logic 1, a logic 1 is applied to the second input of the NANA gate 286 after 5mS via a 5mS delay circuit 285, so that the first input of 786 resets the D flip-flop 283. Since logic 0 is already applied to 1mSgn, the NAND gate 286 cannot operate. D flip-flop 283 is reset, outputting logic 0 at its Q output, thereby releasing the circuit for disabling the dial impulse, and the dia impulse of the second called telephone number is the second input of the NOR gate 539 at the DP output. When supplied to the first input of the OR gate 284 through, relay the dial impulse from the output of the OR gate 284 to two places, one of the second input of the NOR gate 581 of the notification unit 500 and the input of the DC impulse select signal circuit 588 As shown in Fig. 3, the selection signal for calling the second called phone is sent to the telephone line 91, and the other one is D flip-flop 274 from logic Q to the second input. It is provided to the first input of the applied NAND gate 275, and the output of the NAND gate 275 is passed through the trunk line connection status display path of the indicator 81, and the indicator 81 is displayed as shown in FIG. The dial impulse of the telephone call to indicate that the output trunk call. Thereafter, the same related circuit as when the pushbutton 82 is pressed once is operated, and the telephone 60 makes a routine call with the second called telephone.

출력에서 출력되는 논리0이 제어부 400의 AND게이트 421의 제2입력에 가해져서 상기 AND게이트 421를 동작할 수 없게함으로, 모든 표시 및 경보회로가 작동할 수 없으며, 또 녹음기 573의 복구되어 비상통보가 중단되고, 리. 다이알발신이 시작되기 전에 푸시버튼 82를 눌르면, 비상통보의 작동에서 개별호출의 작동으로 전환되어 비상통보의 오발신을 피호출전화로 전화기 60에서 대화를 통하여 알린다.When any switch 32 of the display panel 30 is connected to the normal position, when the door or window associated with the switch 32 is unconsciously opened, or when the emergency pushbutton 22 is accidentally pressed, the main alarm buzzer 35 operates for 8T. When the alarm 31 is blinked at 2T intervals to indicate its position, and the incandescent lamp or emergency bell 50 is operated at 2T intervals, it is immediately cleared when an alarm is detected inadvertently or unconsciously. When pushbutton 82 or 83 of pager 80 is pressed once, D flip flop 274 is set and

Logic 0 output from the output is applied to the second input of the AND gate 421 of the control unit 400 to render the AND gate 421 inoperable, so that all the display and alarm circuits cannot operate, and the recorder 573 is restored and the emergency notification is made. Is stopped, Lee. If pushbutton 82 is pressed before dialing is initiated, the call is switched from the operation of the emergency notification to the operation of an individual call, informing the called telephone of the emergency call through the conversation on the telephone 60.

Lee again. When the pushbutton 82 is pressed after dialing, put the handset of the telephone 60 and press the pushbutton 38 for restoring the display panel 30 once. The telephone 60 will notify the caller through a conversation with the called telephone. The D input of the D flip-flops 274 and 283 is connected to the negative pole of the DC voltage, and the C input is connected to the pole of the DC voltage (VDD). It is connected to the resistor 291 for supplying the positive pole of the two DC voltages. One end of button 38 is connected, the other end of pushbutton 38 is connected to a negative pole of direct current voltage, pushbutton 38 is pressed once and released, and the negative pole of direct current voltage passes through pushbutton 38 to D flip-flop 274 and 283 C. The logic 0 is applied to the input to store the logic 0 data connected to the D inputs of the 274 and 283. When the pushbutton 38 returns to the original position, the D flip-flops 274 and 283 through the resistor 291 at the positive voltage (VDD) of the DC voltage. Logic 1 is supplied to the C input of C, thus providing logic 1 to the Q inputs of the D flip flops 274 and 283, thus outputting the logic 0 memorized at the D outputs of the D flip flops 274 and 283. Let's do it. I.e. Reset flip-flops 274 and 283. Therefore, if pushbutton 38 is pressed once during individual call on individual pager 80, the emergency call is restored to its original state.

As described above, in the present invention, the time required for one notification is 256T (76.8 seconds, 102.4 seconds, 128 seconds, 153.6 seconds, 179.2 seconds) and the increase start time (after 16T, 32T, 48T after the start of every notification, After 64T, after 80T), the number of called telephones (three, four), the purpose of use (emergency notification, fire breaking news), the number of called telephone numbers (5, 6, 7 digits) and the calling telephone station. The selection signal system (DC impulse selection signal system, composite frequency method selection signal system) and effective notice time (between 160T, 176T, 192T, 208T, 224T) can be arbitrarily selected and changed by the relevant selection switch. 3 or 4 called telephone numbers can be arbitrarily stated and changed by simple operation, and emergency notifications can be recorded and checked by simple operation at any time. If the line is cut 91 then immediately the main alarm When the door or window is opened or operated while the switch 32 associated with the door or window is opened during frequent opening or closing of the door or window through the building, the main alarm buzzer 35 By operating and alarming, it is possible to prevent the crime in advance, and when the door or window opening to the outside of the building is opened and closed, the main alarm buzzer 35 is operated for 8T and the light 31 related to the door or window is ignited for 64T to open or close the door or window. It displays the position of the door or window, whether it is opened or closed, and is normally used as a first person by operating the related buzzer 24 by pressing the pushbutton 34, and individually by pressing the four-pointed call button 82 or 83 once. Emergency call by checking the status of the emergency notification of the present invention as usual to make a call call Any number of emergency alarm switches installed at any one of the 21 burglar alarm switches installed on each door, window or door of a valuables storage area, with full functionality of the city, or any number of emergency alarms installed in each room of the building. Press any one of the 22 pushbuttons, the main alarm buzzer 35 of the display panel 30 operates for 8T to ventilate the surroundings, and the relevant indicator 31 on the display panel 30 and the incandescent lamp or emergency bell 50 outside the building flash at 2T intervals or It displays the location of the emergency situation, recognizes the perfect alarm equipment from the intruder, quickly retreats itself, informs the savior where the emergency occurred, and lights the indicator 23 of each transmitter 20 so that the emergency call is connected to the telephone line 91. The recorder 573 is activated and the emergency call is sent to the telephone line 91. After 16T at the beginning of each notification, the called telephone number which has been declared is called periodically one by one at the time of notification, and the call dial impulses the indicator 23 of each transmitter 20 to indicate the called telephone. do. 20T after the start of each notice, the police station emergency alarm circuit 73 and the guard intercom 72 at the guard room are operated and called twice at 4T intervals to make emergency passages, and the main alarm buzzer 35 at 4T intervals only when the telephone line 91 is in a broken state. It operates to alert you that a telephone line is out of service, and that the telephone line is out of service.In addition, every 22T after the start of each notice until the completion of the alarm start signal selected by the selection switch 102 (from 94T to 16T in this description), The buzzer 24 of the transmitter 20 is operated (15 times at 2T intervals) in case of an emergency, but the telephone line 91 is out of order and can not be notified to the outside.Also, the indicator 23 of each transmitter 20 indicates a dial impulse. During output, only the blinking indication by dial impulse is displayed. Otherwise, it is extinguished, indicating that the telephone line 91 is in a fault state. When telephone line 91 is in the normal state, 64T after the start of every notification, that is, buzzer 24 of each transmitter 20 is operated four times at 2T intervals for the above alarm start signal to alert that an emergency has occurred. Stop the electronic clock 40 by the signal to guide the time of emergency occurrence. The emergency notification is notified by telephone line 91 until the effective notification time selected by the selection switch 112 (in this description, between 160T and the beginning of each notification), and the telephone line 91 is connected to telephone 60 to connect to the place where the notification is received. It is possible to make a confirmation call, and it is composed of 1C, transistor, and other electronic elements, so that the mounting area can be extremely small, the manufacturing price is low, and anybody can install it anywhere where there is an automatic telephone line. When the switch 21 is automatically operated due to illegal intrusion from the building, or when an emergency is found or found in the building, the switch 21 is activated by pressing the pushbutton 22 installed in each room. One call at a time of three or four called calls made using the telephone line. An emergency call alerting each called phone periodically for emergency notifications recorded in small increments.

Claims (1)

As described in the text and as shown in the drawing, the notification unit 500 and the control unit receive the receiver 200 connected to the switches 21 and 32, the indicators 31 and 81, and the push buttons 22, 38, 82 and 83. And coupled to the control unit 400 via the pulse generator 600, the indicator light 23, the push button 34, the buzzer 24, 35, the switch 36, incandescent lamp Alternatively, the alarm unit 300 connected to the emergency bell 50, the electronic watch 40, the police box emergency alarm circuit 73, and the intercom signal line 72 is coupled to the notification unit 500 and the control unit 400, and the telephone station line 91 ), The alarm line 92 and the notification unit 500 connected to the intercom call line 71 of the telephone 60 to the control unit 400 so that the switch 21 or the pushbutton 22 is operated inside and outside the building. It displays and alarms, and calls each of three or four called calls memorized by telephone line periodically one by one at a time. View Emergency barrel characterized in that the brazier notice Cup.

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