KR20230044379A - Method of manufacturing light emitting device - Google Patents

Abstract

The present disclosure relates to a method for manufacturing a semiconductor light emitting device. The method comprises the steps of: preparing a plurality of semiconductor light emitting device chips, each of which is interposed between an n-type semiconductor region, a p-type semiconductor region, and an n-type semiconductor region and a p-type semiconductor region, and which includes an active region that generates light using recombination of electrons and holes, and a light-transmitting substrate on which the n-type semiconductor region, the active region, and the p-type semiconductor region are placed, wherein in at least one semiconductor light emitting device among a plurality of semiconductor light emitting device chips, the light-transmitting substrate is combined with the n-type semiconductor region, the active region, and the p-type semiconductor region after growth; bonding a plurality of semiconductor light emitting device chips to a first substrate; and removing the light-transmitting substrate of each of the plurality of semiconductor light emitting device chips by laser ablation.

Description

Method for manufacturing a semiconductor light emitting device {METHOD OF MANUFACTURING LIGHT EMITTING DEVICE}

The present disclosure relates to a method of manufacturing a semiconductor light emitting device as a whole, and in particular, a semiconductor light emitting device used in a mini LED display or a micro LED display (eg, a mini LED (width of about 100 μm (less than 300 μm)), It relates to a method for manufacturing a micro LED (a device having a width of less than 100 μm). Unlike existing LED backlighting LCDs, micro-LED displays do not use semiconductor light-emitting devices as a backlight, but use them for direct light emission like OLED displays. Here, the semiconductor light-emitting device refers to a semiconductor light-emitting device that generates light through recombination of electrons and holes, and includes an AlGaInN-based semiconductor light-emitting device that emits ultraviolet, blue, and green light, and an AlGaInP (As)-based semiconductor light-emitting device that emits red light. can be cited as an example.

Here, background art related to the present disclosure is provided, and they do not necessarily mean prior art (This section provides background information related to the present disclosure which is not necessarily prior art).

1 is a view showing an example of a semiconductor light emitting structure presented in US Patent Publication No. US2019/0067255, wherein the semiconductor light emitting structure includes a first semiconductor light emitting device 101 (eg: a red light emitting LED flip chip), and a second semiconductor light emitting structure. It includes a device 103 (eg, blue light emitting LED flip chip), a third semiconductor light emitting element 105 (eg, green light emitting LED flip chip), and a wiring board 107 on which three semiconductor light emitting elements 101, 103, and 105 are placed.

2 is a view showing an example of a semiconductor light emitting device (an example of a semiconductor light emitting device that can be used in the semiconductor light emitting structure shown in FIG. 1) presented in US Patent Publication No. US2019/0067525, wherein the semiconductor light emitting device is a P-type It includes a GaP window layer 104, a P-type confinement layer 106, an MQW active region 108, an N-type confinement layer 110, and an N-type current spreading layer 112. In addition, the semiconductor light emitting device includes a metal reflective layer 164, an N-side electrode 182, and a P-side electrode 180 on the side from which the growth substrate is removed. In addition, the semiconductor light emitting device includes a P-type current spreading layer 118 (eg, ITO), a transparent adhesive layer 130 and a transparent support substrate 102 on the opposite side. Through this configuration, the semiconductor light emitting device can emit light of a red wavelength. However, when an N-type AlGaInP(As)-based semiconductor layer is disposed on the side where the electrodes 180 and 182 are located, that is, on the side where the lead electrode, wiring or flip-chip bonding with the wiring board is performed (so-called N-side up flip chip) In particular, as the size of the chip is miniaturized, the thick N-type semiconductor regions 110 and 112 and the MQW active region 108 are removed to inject current from the P-side electrode 180 into the P-type semiconductor regions 104 and 106. Along with difficulties in the MESA etching process and electrical connection process, it is known that excessive heat is generated due to non-uniform current flow in the N-type semiconductor regions 110 and 112 . As a way to solve this problem, it is possible to consider using a P-side up flip chip, and two methods have been proposed in the prior art.

3 is a view showing an example of a semiconductor light emitting device proposed in US Patent Registration No. US5,376,580, wherein the semiconductor light emitting device includes a P-type GaAs growth substrate 14, a P-type semiconductor region 11 (eg: AlGaAs), An active region 12 and an N-type semiconductor region 13 (eg, AlGaAs) may be included. A so-called P-side up flip chip can be manufactured by going through the process of forming electrodes in the same manner as shown in FIG. there will be However, whether the AlGaInN-based semiconductor light-emitting device or the AlGaInP(As)-based semiconductor light-emitting device, if the P-type semiconductor region 11 is grown before the N-type semiconductor region 13 before growing the active region 12, the surface When the active region 12 is grown due to this roughness, the quality of the thin film of the active region 12 deteriorates, resulting in poor electrical/optical characteristics. It is difficult to find a semiconductor light emitting device of

4 to 7 are views showing an example of a method of manufacturing a semiconductor light emitting device proposed in US Patent Publication No. US 7,067,340. First, as shown in FIG. 4, a growth substrate 300 (eg GaAs) After sequentially growing an N-type semiconductor region 302, an active region 304, and a P-type semiconductor region 306 on a substrate), a soft transparent adhesive layer 308 (Soft transparent adhesive layer; example: BCB (Bisbenzocyclobutene)) , polyimide, glass, epoxy), the temporary substrate 310 (eg, glass, silicon, ceramic, Al ₂ O ₃ ) is attached to the P-type semiconductor region 306 . Next, as shown in FIG. 5 , the growth substrate 300 is removed using the temporary substrate 310 as a support substrate. Next, as shown in FIG. 6, on the N-type semiconductor region 302 from which the growth substrate 300 is removed, a flexible and transparent adhesive layer 312 (Soft transparent adhesive layer; e.g., BCB (Bisbenzocyclobutene), polyimide) is formed. , glass, epoxy) to attach the light-transmitting substrate 314 (eg: a light-transmitting substrate (sapphire, glass, GaP, SiC)), and then the transparent adhesive layer 308 and the temporary substrate 310 having ductility. Remove. Finally, as shown in FIG. 7 , parts of the P-type semiconductor region 306 and the active region 304 are removed through etching, and then the N-type semiconductor region 302 and the P-type semiconductor region 306 are respectively , N-side electrodes 316, 318, 320 and P-side electrodes 316, 318, 322 are formed to manufacture a semiconductor light emitting device. Electrode 316 is a metal reflective layer (eg, Au, Al, Ag, Ag alloy), electrode 318 is a barrier layer (eg, Ni, W, TiN, WN, Pt, ZnO, ITO), and electrodes 320, 322 ) is a bonding pad layer (eg Au, Al). Unlike the semiconductor light emitting device shown in FIG. 3 , the semiconductor light emitting device shown in FIGS. 4 to 7 differs from the semiconductor light emitting device shown in FIG. 3 in that a P-side up flip chip is manufactured through a chip process rather than an epitaxial growth process. However, in the attachment of the temporary substrate 310 and the light-transmitting substrate 314, since the transparent adhesive layers 308 and 312 having the same ductility are used as the attachment material, ductility is required in the process of attaching the light-transmitting substrate 314. Deformation of the transparent adhesive layer 308 and voids in the local bonding interface may occur, and also have ductility with the temporary substrate 310 and a transparent adhesive layer 312 having ductility in the process of removing the transparent adhesive layer 308. ) can be damaged, so improvement is needed. In addition, the growth substrate 300 (eg, a GaAs substrate) in which the N-type semiconductor region 302, the active region 304, and the P-type semiconductor region 306 are sequentially grown is formed on the growth substrate 300 and the grown materials 302 , 304, 306), the wafer bowing is severe due to the stress caused by the difference in lattice constant and coefficient of thermal expansion (CTE), and growth with such strong stress When the substrate 300 is attached to the temporary substrate 310 using the flexible and transparent adhesive layer 308, the weak bonding strength of the flexible transparent adhesive layer 308 and the void in the local bonding interface Due to the occurrence, damage during the process, in particular, substrate breakage and fine cracks, etc. are not uncommon.

FIG. 12 is a diagram showing an example of a semiconductor light emitting device disclosed in US Patent Registration No. 7,262,436. The semiconductor light emitting device includes a growth substrate 100 and a first semiconductor region 300 grown on the growth substrate 100; example: n-type semiconductor region), an active region 400 grown on the first semiconductor region 300, a second semiconductor region 500 grown on the active region 400 (eg, a p-type semiconductor region), and a second semiconductor region ( 500) formed on the electrodes 901, 902, and 903 functioning as a reflective film, and an electrode 800 formed on the etched and exposed first semiconductor region 300. The conductivity of the first semiconductor region 300 and the second semiconductor region 500 can be reversed. Preferably, a buffer region (not shown) is provided between the growth substrate 100 and the first semiconductor region 300 . A chip having such a structure, that is, a chip in which electrodes 901 , 902 , 903 and electrode 800 are all formed on the opposite side of the growth substrate 100 and the electrodes 901 , 902 , 903 function as a reflective film is called a flip chip. The electrodes 901 , 902 , and 903 include a highly reflective electrode 901 (eg Ag), a bonding electrode 903 (eg Au), and an electrode 902 preventing diffusion between the electrode 901 material and the electrode 903 material; Example: Ni). Such a metal reflective film structure has a high reflectance and has advantages in current diffusion. However, since the electrodes 901 , 902 , 903 and the electrode 800 side are used for bonding, not the growth substrate 100 side, the flip chip is structurally inclined (height) due to the height difference between the electrodes 901 , 902 903 and the electrode 800 car) occurs.

13 is a view showing an example of a semiconductor light emitting device proposed in US Patent Registration No. 9,466,768, the semiconductor light emitting device includes a growth substrate 100, a buffer region 200 grown on the growth substrate 100, and a buffer region ( 200), an active region 400 grown on the first semiconductor region 300 and generating light through recombination of electrons and holes, and a second region grown on the active region 400. A semiconductor region 500 is provided. Sapphire, SiC, Si, GaN, etc. are mainly used as the growth substrate 100 , the growth substrate 100 may be finally removed, and the buffer region 200 may be omitted. The positions of the first semiconductor region 300 and the second semiconductor region 500 may be reversed, and are mainly made of GaN in a group III nitride semiconductor light emitting device. Each of the semiconductor layers 200 , 300 , 400 , and 500 may be composed of multiple layers, and additional layers may be provided. Meanwhile, unlike FIG. 12 , a non-conductive reflective film 910 is provided instead of the electrodes 901 , 902 , and 903 functioning as a reflective film. The non-conductive reflective film 910 is composed of a single-layer dielectric film (eg, SiO _x , TiO _x , Ta ₂ O ₅ , MgF ₂ ), a multi-layer dielectric film, or a DBR reflective film (eg, SiO ₂ /TiO ₂ ), or a combination thereof. can be achieved in combination. To supply current, the electrodes 920 and 930 and the electrodes 800 and 810 are provided, and an electrical connection 940 penetrating the non-conductive reflective film 910 is formed to connect the electrodes 920 and 930. there is. Branch electrodes 810 and 930 may be provided to spread current between the first semiconductor region 300 and the second semiconductor region 500, and the current spread in the second semiconductor region 500 can be more smoothly. In order to do so, a light-transmitting conductive film 600 (eg, ITO, TCO) is formed. However, similarly in the case of this configuration, there is a structural inclination (height difference) between the electrode 920 and the electrode 800 . Reference numeral 950 denotes a current blocking layer (CBL).

14 is a diagram showing an example of a semiconductor light emitting device disclosed in Japanese Laid-Open Patent Publication No. 2006-120913. The semiconductor light emitting device includes a growth substrate 100, a buffer region 200 grown on the growth substrate 100, and a buffer. A first semiconductor region 300 grown over the region 200, an active region 400 grown over the first semiconductor region 300, a second semiconductor region 500 grown over the active region 400, and a second semiconductor region A light-transmitting conductive film 600 (eg, ITO, TCO) formed on the region 500 and having a current spreading function, an electrode 700 formed on the light-transmitting conductive film 600, and a first semiconductor region 300 exposed by etching. ) and an electrode 800 formed on it. A Distributed Bragg Reflector (DBR) and a metal reflective film 904 are provided on the light-transmitting conductive film 600 . By forming the height of the electrode 800 to match the height of the electrode 700, it is possible to solve the structural inclination (difference in height) of the flip chip during bonding. However, it has a disadvantage that the electrode 700 and the electrode 800 must be separately formed.

FIG. 15 is a view showing an example of a semiconductor light emitting device disclosed in US Patent Registration No. 9,748,446. As shown in FIG. 2, the semiconductor light emitting device includes a growth substrate 100, a buffer region 200, and a first semiconductor. region 300, active region 400, second semiconductor region 500, translucent conductive film 600, non-conductive reflective film 910, electrodes 920, 930, 940, electrodes 800, 810, and current blocking layer 950. include However, in order to reduce the structural inclination (height difference) between the electrode 800 and the electrode 920, the electrode 800 is formed on the non-conductive reflective film 920, and the branch electrode 810 and the electrode 800 are electrically For the connection, an electrical connection 820 penetrating the non-conductive reflective film 910 is used.

In addition, examples in which a via hole is formed by etching the semiconductor layer and an N-side electrode is formed thereto to eliminate a height difference with the P-side electrode can be found in Japanese Patent Laid-Open No. S55-009442 or the like.

FIG. 16 is a view showing an example of a semiconductor light emitting device disclosed in US Patent Registration No. 9,236,524. A semiconductor light emitting device having the same configuration as that shown in FIG. 15 except for the configuration of the non-conductive reflective film 910 is presented. . The non-conductive reflective film 910 further includes a thick dielectric film 910c in addition to the dielectric films 910d and 910e forming the DBR to reduce the structural inclination (height difference) between the electrode 800 and the electrode 920. Remove. On the other hand, unlike the dielectric films 910d and 910e forming DBR deposited by physical vapor deposition (PVD), by forming a thick dielectric film 910c by chemical vapor deposition (CVD), step A technique of forming an overall stable non-conductive reflective film 910 by improving step coverage is proposed.

29 is a view showing an example of a semiconductor light emitting device or a semiconductor light emitting device display proposed in US Patent Publication No. 2017-0323873, wherein the semiconductor light emitting device 100f includes a substrate 10f functioning as an external power supply and an epitaxial structure (120e). The epi structure 120e is transferred onto the substrate 10f by the carrier 110 having the adhesive 130 thereon. A thin film transistor (TFT) structure 16f is formed on the substrate 10f, and the TFT structure 16f is a means for driving the epitaxial structure 120e. The epi structure 120e includes electrodes 142e and 144e that function as bonding pads, and the electrodes 142e and 144e are physically and electrically coupled to the circuit electrode 12f provided on the TFF structure 16f.

30 is a view showing an example of a micro-LED display device presented in Korean Patent Publication No. 10-2019-0078945, and the micro-LED display device includes a substrate 110 and a micro-LED 140. TFTs 101, 103, 105, and 107 are formed on a substrate 110 (eg, glass), and the TFTs 101, 103, 105, and 107 include a gate electrode 101, a semiconductor layer 103, a source electrode 105, and a drain electrode 107. An insulating layer 112 is provided between the gate electrode 101 and the electrodes 105 and 107 . The semiconductor layer 103 may be composed of an amorphous semiconductor such as amorphous silicon, polysilicon such as LTPS, or an oxide semiconductor such as IGZO (Indium Gallium Zinc Oxide), TiO ₂ , ZnO, WO ₃ , SnO ₂ there is. When the semiconductor layer 103 is formed of an oxide semiconductor, the size of the thin film transistor (TFT) can be reduced, driving power can be reduced, and electrical mobility can be improved.

The TFTs 101, 103, 105, and 107 are formed on the substrate 110, then the insulating layer 114 is formed, the micro LED 140 is transferred thereon, the insulating layer 116 is formed again, and then the hole 114a, 114b, 116a116b) is formed, the drain electrode 107 and the p-side electrode 141 are connected through the connection electrode 117a, and the n-type electrode 143 and the electrode 109 are connected through the connection electrode 117b. connect Finally, the insulating layer 118 is formed. When the gate electrode 101 is turned on, the semiconductor layer 103 is activated, and the source electrode 105 and the drain electrode 107 conduct each other, and current is supplied to the micro LED 140 to emit light. Reference numeral 152 denotes an electrode, an operation signal is provided to the gate electrode 101 through the electrode 152, and a current passing through the micro LED 140 flows out through the electrode 109.

As described above, a display combining a TFT and a mini-LED or a micro-LED has been proposed, and a technique for improving electrical mobility by using an oxide semiconductor as a TFT has been proposed. In the technology shown in FIGS. 29 and 30, the TFT is provided on the side of the substrate 10f or 110, which causes many problems when applied to a display device using extremely small pixels such as a micro LED.

This will be described at the end of 'Specific Contents for Implementation of the Invention'.

This section provides a general summary of the disclosure and is not a comprehensive disclosure of its full scope or all of its features).

According to one aspect of the present disclosure (According to one aspect of the present disclosure), in a method of manufacturing a flip chip semiconductor light emitting device, a first semiconductor region having an N-type emits light through recombination of electrons and holes. providing a growth substrate on which an active region to be generated and a second semiconductor region having a P-type are sequentially formed; bonding the first light-transmissive substrate to the second semiconductor region side; removing the growth substrate from the first semiconductor region side; attaching a second light-transmissive substrate to the side of the first semiconductor region from which the growth substrate has been removed using an adhesive layer; laser ablating the first light-transmissive substrate from the second semiconductor region side; exposing a portion of the first semiconductor region by removing portions of the second semiconductor region and the active region; And, forming a first electrode of a flip chip and a second electrode of a flip chip on the exposed first semiconductor region and the second semiconductor region, respectively.

According to another aspect according to the present disclosure (According to another aspect of the present disclosure), in a semiconductor light emitting device, a first semiconductor region having a first conductivity; a second semiconductor region having a second conductivity different from the first conductivity; an active region interposed between the first semiconductor region and the second semiconductor region and generating light by recombination of electrons and holes; a first electrode positioned in the first semiconductor region exposed by removing a portion of the first semiconductor region, the active region, and the second semiconductor region, electrically communicating with the first semiconductor region, and functioning as a flip chip bonding pad; Also, a portion of the first semiconductor region, the active region, and the second semiconductor region are removed and located in another first semiconductor region exposed, insulated from the first semiconductor region through an insulating layer, and electrically electrically connected to the second semiconductor region. There is provided a semiconductor light emitting device including a; second electrode communicating with each other and functioning as a flip chip bonding pad.

According to another aspect according to the present disclosure (According to another aspect of the present disclosure), in a semiconductor light emitting device, a first semiconductor region having a first conductivity; a second semiconductor region having a second conductivity different from the first conductivity; an active region interposed between the first semiconductor region and the second semiconductor region and generating light by recombination of electrons and holes; a first electrode positioned in the first semiconductor region exposed by removing a portion of the first semiconductor region, the active region, and the second semiconductor region, electrically communicating with the first semiconductor region, and functioning as a flip chip bonding pad; and a second electrode electrically communicating with the second semiconductor region and functioning as a flip chip bonding pad, wherein the first electrode extends over the second semiconductor region, which is a non-emission region.

According to another aspect according to the present disclosure (According to another aspect of the present disclosure), in a semiconductor light emitting device, a first semiconductor region having a first conductivity; a second semiconductor region having a second conductivity different from the first conductivity; an active region interposed between the first semiconductor region and the second semiconductor region and generating light by recombination of electrons and holes; a first electrode that is in electrical communication with the first semiconductor region exposed by removing a portion of the first semiconductor region, the active region, and the second semiconductor region, and functions as a flip-chip bonding pad; a second electrode that is in electrical communication with the second semiconductor region and functions as a flip chip bonding pad; and an insulating layer disposed under the first electrode and the second electrode and filling the first semiconductor region exposed by removing a portion of the first semiconductor region, the active region, and the second semiconductor region. A device is provided.

According to another aspect according to the present disclosure (According to another aspect of the present disclosure), in a semiconductor light emitting device, a light-transmitting substrate; Semiconductor light emitting devices having sequentially grown first semiconductor regions having a first conductivity, an active region generating light using recombination of electrons and holes, and a second semiconductor region having a second conductivity different from the first conductivity. A device chip; A first semiconductor light emitting device chip having a first electrode electrically connected to the first semiconductor region and a second electrode electrically connected to the second semiconductor region; an adhesive layer bonding the light-transmitting substrate and the first semiconductor region side of the first semiconductor light emitting device chip; and a passivation layer covering at least the first semiconductor light emitting device chip and the adhesive layer.

According to another aspect according to the present disclosure (According to another aspect of the present disclosure), in a semiconductor light emitting device, a light-transmitting substrate; Semiconductor light emitting devices having sequentially grown first semiconductor regions having a first conductivity, an active region generating light using recombination of electrons and holes, and a second semiconductor region having a second conductivity different from the first conductivity. A first semiconductor light emitting device chip having a first electrode electrically connected to the first semiconductor region and a second electrode electrically connected to the second semiconductor region; a light-transmitting substrate as a window through which light is emitted. a phosphorus first semiconductor light emitting device chip; In addition, a semiconductor light emitting device including a first thin film transistor is provided that controls light emission of the first semiconductor light emitting device chip and is deposited on a light-transmitting substrate.

According to another aspect according to the present disclosure (According to another aspect of the present disclosure), in a semiconductor light emitting device, a light-transmitting substrate having a first surface and a second surface opposite to the first surface; Semiconductor light emitting devices having sequentially grown first semiconductor regions having a first conductivity, an active region generating light using recombination of electrons and holes, and a second semiconductor region having a second conductivity different from the first conductivity. A semiconductor light emitting device chip comprising a first electrode electrically connected to the first semiconductor region and a second electrode electrically connected to the second semiconductor region; formed on the first surface of the light-transmissive substrate; , a semiconductor light emitting device chip in which the second surface of the light-transmissive substrate is a window through which light generated in the active region is emitted; And, a semiconductor light emitting device including a black matrix material provided on at least one of the first surface and the second surface is provided.

According to another aspect according to the present disclosure (According to another aspect of the present disclosure), in a method of manufacturing a semiconductor light emitting device, each of an n-type semiconductor region, a p-type second semiconductor region, and an n-type semiconductor region preparing three semiconductor light emitting device chips interposed between p-type semiconductor regions and having active regions generating light by recombination of electrons and holes; And, combining three semiconductor light emitting device chips to a light-transmitting substrate having an adhesive layer; as, bonding the n-type semiconductor region of each of the three semiconductor light emitting device chips to be located on the side of the adhesive layer; A method of fabricating a device is provided.

According to another aspect according to the present disclosure (According to another aspect of the present disclosure), in a method of manufacturing a semiconductor light emitting device, each of an n-type semiconductor region, a p-type semiconductor region, an n-type semiconductor region, and a p-type semiconductor region Preparing a plurality of semiconductor light emitting device chips having an active region interposed between regions and generating light by recombination of electrons and holes, and a light-transmitting substrate on which an n-type semiconductor region, an active region, and a p-type semiconductor region are placed ;, in at least one semiconductor light emitting device among the plurality of semiconductor light emitting device chips, a plurality of semiconductor light emitting devices to which the light-transmitting substrate is coupled after the corresponding n-type semiconductor region, the corresponding active region, and the corresponding p-type semiconductor region are grown. preparing a device chip; coupling a plurality of semiconductor light emitting device chips to a first substrate; And, removing the light-transmitting substrate of each of the plurality of semiconductor light-emitting device chips by laser ablation; including, a method for manufacturing a semiconductor light-emitting device is provided.

According to another aspect according to the present disclosure (According to another aspect of the present disclosure), in a method of manufacturing a micro LED display having a plurality of pixels, each of which is an n-type semiconductor region, a p-type semiconductor region, and an n-type semiconductor region. An active region interposed between the p-type semiconductor region and the p-type semiconductor region to generate light by recombination of electrons and holes, and a first electrode that functions as a bonding pad and is electrically connected to the n-type semiconductor region and the p-type semiconductor region, respectively. preparing a plurality of semiconductor light emitting devices including a second electrode and a substrate on which an n-type semiconductor region, an active region, and a p-type semiconductor region are disposed; And placing a plurality of semiconductor light emitting elements in one pixel of the plurality of pixels; including, a method for manufacturing a micro-LED display is provided.

This will be described at the end of 'Specific Contents for Implementation of the Invention'.

1 is a view showing an example of a semiconductor light emitting structure presented in US Patent Publication No. US2019/0067255;
2 is a view showing an example of a semiconductor light emitting device presented in US Patent Publication No. US2019/0067525;
3 is a view showing an example of a semiconductor light emitting device presented in US Patent Registration No. US5,376,580;
4 to 7 are views showing an example of a method of manufacturing a semiconductor light emitting device proposed in US Patent Registration No. US7,067,340;
8 to 11 are diagrams illustrating an example of a method of manufacturing a semiconductor light emitting device according to the present disclosure;
12 is a view showing an example of a semiconductor light emitting device presented in US Patent Registration No. 7,262,436;
13 is a view showing an example of a semiconductor light emitting device presented in US Patent Registration No. 9,466,768;
14 is a view showing an example of a semiconductor light emitting device presented in Japanese Unexamined Patent Publication No. 2006-120913;
15 is a view showing an example of a semiconductor light emitting device presented in US Patent Registration No. 9,748,446;
16 is a view showing an example of a semiconductor light emitting device presented in US Patent Registration No. 9,236,524;
17 is a view showing an example of a semiconductor light emitting device according to the present disclosure;
18 is a view showing an example of a method of manufacturing the semiconductor light emitting device shown in FIG. 17;
19 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
20 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
21 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
22 is a view showing an example of a method of manufacturing the semiconductor light emitting device shown in FIG. 21;
23 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
24 and 25 are diagrams showing another example of a semiconductor light emitting device according to the present disclosure;
26 is a view showing still other examples of a semiconductor light emitting device according to the present disclosure;
27 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
28 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
29 is a view showing an example of a semiconductor light emitting device or a semiconductor light emitting device display presented in US Patent Publication No. 2017-0323873;
30 is a view showing an example of a micro LED display device presented in Korean Patent Publication No. 10-2019-0078945;
31 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
32 is a view showing an example of arrangement of the semiconductor light emitting device shown in FIG. 31;
33 is a view showing a modified example of the semiconductor light emitting device shown in FIG. 31;
34 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
35 is a view showing another example of a semiconductor light emitting device according to the present disclosure;
36 to 38 are diagrams illustrating an example of a method of manufacturing the semiconductor light emitting device shown in FIG. 28;
39 is a view for explaining another method of manufacturing a semiconductor light emitting device according to the present disclosure;
40 and 41 are diagrams for explaining another method of manufacturing a semiconductor light emitting device according to the present disclosure;
42 is a view for explaining another method of manufacturing a semiconductor light emitting device according to the present disclosure;
43 is a view showing an example of application of a semiconductor light emitting device according to the present disclosure;
44 and 45 are diagrams showing another example of application of the semiconductor light emitting device according to the present disclosure.

Hereinafter, the present disclosure will now be described in detail with reference to the accompanying drawing(s).

8 to 11 are diagrams illustrating an example of a method of manufacturing a semiconductor light emitting device according to the present disclosure.

First, as shown in FIG. 8(a), a first semiconductor region 30 (eg, N-type semiconductor region), an active region 40 (eg, MQWs), and a second semiconductor region are sequentially placed on the growth substrate 10. (50: P-type semiconductor region) is grown. Each of the first semiconductor region 30, the active region 40, and the second semiconductor region 50 may be formed of a single layer or multiple layers, and necessary layers such as the buffer region 20 may be added as a matter of course. In the case of a semiconductor light emitting device emitting red light, a GaAs substrate and an AlGaInP(As)-based semiconductor may be used, and in the case of a semiconductor light emitting device emitting green, blue, or ultraviolet light, a sapphire substrate and an AlGaInN-based semiconductor may be used. there is. For example, the buffer region 20 includes a seed layer 22 (nucleation layer) and an undoped semiconductor region 23 to relieve stress and improve thin film quality, and generally has a thickness of around 4 μm. may consist of The first semiconductor region 30 may have a thickness of 2.5 μm, the active region 40 may have a thickness of several tens of nm, the second semiconductor region 50 may have a thickness of several tens of nm to several μm, Overall, it may have a thickness of about 6 μm to 10 μm. When laser ablation is used, a sacrificial layer (not shown) may be provided between the seed layer 22 and the undoped semiconductor region 23, and the seed layer 22 may function as a sacrificial layer. .

Next, as shown in FIG. 8( b ), a protective layer 60 is formed on the second semiconductor region 50 . The protective layer 60 is preferably formed of a dielectric material such as SiO ₂ or SiN _x to protect the semiconductor regions 30 , 40 , and 50 in a subsequent process including an etching process.

Next, as shown in FIGS. 8(c) and 8(d), a first light-transmitting substrate 70 is prepared, and the first light-transmitting substrate 70 is coupled to the semiconductor regions 30, 40, and 50. do. Unlike the prior art using adhesives made of organic materials such as BCB and Silicone, the bonding between the first light-transmitting substrate 70 and the semiconductor regions 30, 40, and 50 has strong bonding strength and dry and wet etching Metal bonding (e.g., eutectic) process is used to prevent changes in physical properties of the semiconductor area and mechanical damage (crack, breakage) during the process in the subsequent process including etching. The metal bonding layer 71 is provided on at least one side of the first light-transmissive substrate 70 side and the semiconductor regions 30, 40, and 50, preferably both sides. In addition, the sacrificial layer 72 is necessarily provided on the first light-transmitting substrate 70 to remove the first light-transmitting substrate 70 using laser ablation thereafter. During the bonding process, it is important to prevent cracks and cracks of the semiconductor regions 30, 40, and 50. The difference in thermal expansion coefficient from that of the growth substrate 10 is not large, and sapphire having light transmission properties is used as the first light transmission substrate 70. it is desirable Usually, eutectic materials with metal bonding can be used for each temperature, but in the present disclosure, it is limited to materials having a process temperature of 250 ℃ or more and 350 ℃ or less, AuSn (300 ℃), AuIn (275 ℃) , NiSn (300°C), CuSn (270°C), and the like are preferable. On the other hand, in the case of BCB organic adhesive, it is preferable to bond at 250°C or less. For reference, there are many widely known organic adhesives for wafer bonding other than BCB organic adhesive materials, such as Polyimide (160 ℃), SU-8 (90 ℃), Parylene (230 ℃), and Epoxy (150 ℃). The sacrificial layer 72 strongly absorbs laser light incident through the rear surface of the first light-transmissive substrate 70 to easily cause an instantaneous photon-thermochemical decomposition interaction. Compounds (Epitaxial or Polycrystalline Compounds) having an energy band gap of 6.2 eV or less and having a single or polycrystalline structure, especially oxide and nitride semiconductors, are representative compounds. Examples of oxide semiconductors include In ₂ O ₃ , SnO ₂ , ITO, ZnO, CdO, PbO, PZT, and alloy compounds thereof are preferable, and as a nitride semiconductor, InN, GaN, AlN, and alloy compounds thereof are optimal.

The material of the first light-transmitting substrate 70 is not limited as long as it has a thermal expansion coefficient difference of 2 ppm or less from the growth substrate (GaAs, Sapphire) and has optical transparency. For example, in the case of a GaAs (5.7ppm) growth substrate for semiconductor light emitting devices emitting red light, a thermal expansion coefficient of 3.7-7.7ppm and an optically transparent material are used, and for semiconductor light emitting devices emitting blue, green, and ultraviolet rays. In the case of a sapphire (single crystal Al ₂ O ₃ , 6.5 ppm) substrate, it is 4.5-8.5 ppm, and an optically transparent material may be used. Representative materials that satisfy all of these include E glass (5.5 ppm), AlN (4.5 ppm), SiC (4.8 ppm), and borosilicate glass (4.6 ppm) in addition to sapphire (single crystal Al ₂ O ₃ ), which is the same as the growth substrate.

Next, as shown in FIG. 8(e), the growth substrate 10 is removed. In the case of a GaAs substrate, wet etching is used, and in the case of a sapphire substrate, laser ablation may be used. A metal bond is used to bond the first light-transmitting substrate 70 and the semiconductor regions 30, 40, and 50, and the protective layer 60 is provided on the semiconductor regions 30, 40, and 50, and dry and wet etching or In the process of laser ablation, the metal bonding layer 71 and the semiconductor regions 30, 40 and 50 can withstand. Preferably, prior to attaching the second light-transmissive substrate 80 (see FIG. 9) and the semiconductor regions 30, 40, and 50, stress relaxation and performance improvement (light output, operating voltage) of the light emitting device, and formation of a passivation layer A process of removing part or all of the undoped semiconductor region 23 (eg, etching) is performed for an easy follow-up process such as the like.

Next, as shown in FIG. 9(a), a second light-transmitting substrate 80 is prepared, and at least one side of the second light-transmitting substrate 80 side and the semiconductor regions 30, 40, and 50 side, preferably Preferably, an adhesive layer 81 is provided on both sides. As in the prior art, the adhesive layer 81 may be formed of a light-transmitting material such as BCB resin. Materials that can be used as the adhesive layer 81 are widely known as organic adhesives for wafer bonding in addition to BCB organic adhesive materials, such as Polyimide (160 ° C), SU-8 (90 ° C), Parylene (230 ° C), Epoxy (150 ° C). ℃), Silicone (100-300 ℃), etc. are representative.

Next, as shown in FIG. 9(b), the second light-transmitting substrate 80 and the semiconductor regions 30, 40, and 50 are attached. Although heat (processing temperature of the organic adhesive material used above) is generated in the bonding process, since the first light-transmissive substrate 70 and the semiconductor regions 30, 40, and 50 have strong bonding strength through metal bonding, their bonding There is no problem maintaining this. On the other hand, by forming the first light-transmitting substrate 70 and the second light-transmitting substrate 80 with a material (eg, sapphire) having the same thermal expansion coefficient, the adhesive layer 81 is strongly pressed to form the second light-transmitting substrate 80 and the semiconductor. There is no problem such as damage including cracking in bonding the areas 30, 40, and 50.

Next, as shown in FIG. 9(c), the first light-transmissive substrate 70 is removed to be separated from the semiconductor regions 30, 40, and 50 using laser ablation. By using laser ablation, it is possible to prevent damage to the adhesive layer 81 during the separation process of the first light-transmitting substrate 70 .

Next, as shown in FIGS. 10 (a) and 10 (b), the metal bonding layer 71 and the protective layer 60 are sequentially removed to complete preparation for making a P-side up flip chip. . While preventing damage to the adhesive layer 81 up to this process, a photolithography process was not used, and there was no formation of electrodes or an etching process of the semiconductor regions 30, 40, and 50, which are the core of the light emitting device, for the first time. By proceeding from the wafer level, cracks and cracks in the semiconductor regions 30, 40, and 50 can be minimized even though the wafer bonding process is performed twice. In addition, there is an advantage in that the performance and quality of the finally fabricated light emitting device can be further improved by continuously etching a part or all of the undoped semiconductor region 23 after the growth substrate 10 is removed. In this process, the formation of the protective layer 60, the use of the metal bonding layer 71, the removal of the first light-transmitting substrate 70 using laser ablation, and the first light-transmitting substrate 70 and the second light-transmitting substrate ( 80), it is important to minimize the thermal expansion coefficient difference (usually, when bonding wafers between different materials, the maximum thermal expansion coefficient difference ≤ 2ppm to prevent cracking).

Next, as shown in FIGS. 11(a) and 11(b) , portions of the second semiconductor region 50 and the active region 40 are removed to expose the first semiconductor region 30 .

Next, as shown in FIG. 11(c), a light transmitting electrode 91, a first electrode 92, and a second electrode 93 are formed. The light-transmitting electrode 91 serves to facilitate current spreading in the second semiconductor region 50 where current spreading is poor, and is mainly made of a light-transmitting conductive oxide film (TCO), typically made of ITO. The first electrode 92 and the second electrode 93 are electrically connected to the first semiconductor region 30 and the second semiconductor region 50, respectively, and have the same configuration as the electrodes 316, 318, 320, and 322 shown in FIG. can function as

Next, as shown in FIG. 11(d), the semiconductor light emitting devices in a wafer state are isolated as individual chips. At this time, the adhesive layer 81 is also removed to expose the second light-transmitting substrate 80, so that the scribing and breaking process of the second light-transmitting substrate 80 can be facilitated.

Finally, as shown in FIG. 11(e), a passivation layer 94 (eg, SiO ₂ , Al ₂ O ₃ , SiN _x ) is formed to protect the device. Meanwhile, as illustrated, the size of the electrode 93 may be reduced and a dielectric reflector (DBR reflector) may be provided in the passivation layer 94 to function as a reflector instead of the electrode 93 . One example of such a dielectric reflector is well presented in US Patent Publication No. US 9,236,524. The passivation layer 94 is basically a dielectric material (eg SiO ₂ , Al ₂ O ₃ , SiN _x ) covering the top and side surfaces of the semiconductor regions 30 , 40 , 50 and then a metal material having high reflectivity (eg SiN x ). A multilayer structure in which Ag, Al, Au, Cu, Pt, Cr, Ti, TiW) is continuously deposited is also possible.

Of course, the order of the processes presented in FIGS. 11(b) to 11(e) may be changed. In the case of a mini or micro LED chip, the size of the side-wall of the isolation process and the MESA process is proportional to the light emitting area compared to conventional chips (generally 300um or more in length of one side). Since it occupies a relatively large area, it is very important from the viewpoint of light brightness and reliability to prevent electrical flow through the sidewall of the mesa and isolation (electrical passivation). Therefore, it is preferable to perform an electrical passivation process immediately after the isolation and mesa processes so as not to be exposed to the atmosphere for a long time between processes after the isolation and mesa processes.

17 is a diagram showing an example of a semiconductor light emitting device according to the present disclosure, which includes a light-transmitting substrate 1, a first semiconductor region 2, an active region 3, a second semiconductor region 4, It includes an insulating layer (5), a current spreading electrode (6), a first electrode (7) and a second electrode (8).

The light-transmitting substrate 1 may be a growth substrate (eg, sapphire, SiC) or a light-transmitting substrate attached to the semiconductor regions 2, 3, and 4 in a state in which the growth substrate is removed. This light-transmissive substrate may also be made of a material such as sapphire or SiC, and examples of such a substrate are shown in FIGS. 4 to 11 . The light-transmitting substrate 1 may be a growth substrate or may be formed of a second light-transmitting substrate 80 as shown in FIG. 11 .

The first semiconductor region 2, the active region 3, and the second semiconductor region 4 may be made of n-type GaN, InGaN/(In)GaN MQWs, or p-type GaN, and emit ultraviolet, blue, and green light. In this case, it may be made of an AlGaInN-based semiconductor, and in the case of emitting red light, it may be made of an AlGaInP(As)-based semiconductor. Each region may consist of a single layer or multiple layers, and the conductivity may be interchanged. When the light-transmitting substrate 1 is a growth substrate, a buffer region 20 (see FIG. 8) is preferably provided between the first semiconductor region 2 and the light-transmitting substrate 1 . Furthermore, when the semiconductor light emitting device is transferred to the top of a panel (glass substrate, PCB on which a plurality of thin film transistors are formed in alignment) and electrically connected, The light-transmitting substrate 1 is removed and the first semiconductor region 2, the active region 3, the second semiconductor region 4, the insulating layer 5, the current diffusion electrode 6, the first electrode 7 and A semiconductor light emitting device composed of the second electrode 8 is also possible.

The insulating layer 5 serves as a passivation and is made of a dielectric material (eg, SiO ₂ , Al ₂ O ₃ , SiN _x ) to block current flow and minimize light absorption.

The current spreading electrode 6 serves to supply current from the second electrode 8 to the second semiconductor region 5 and provide an ohmic contact, and includes a light-transmitting conductive film (eg, ITO), a metal having excellent reflectivity ( Examples: Ag, Au, Al, Ag/Ni/Au), non-conductive reflective films (eg DBR), and combinations thereof (eg ITO, ITO/Ag, ITO/DBR). In the case of including the non-conductive reflective film, as shown in FIG. 2 , an electrical connection 94 is provided for electrical communication between the second electrode 8 and the current diffusion electrode 6 . Of course, a non-conductive reflective film may also be provided on the upper portion of the insulating layer 5 on the first semiconductor region 2 exposed by etching.

The first electrode 7 and the second electrode 8 may be formed in the same process, serve as bonding pads, and may have, for example, Ti/Ni/Au configurations.

Preferably, by providing an ohmic contact electrode (9; for example: Cr/Al/Ni/Au, Ti/Al/Ni/Au) below the first electrode 7, the driving voltage is lowered, and the first electrode 7 ) and the structural inclination (height difference) between the second electrodes 8 can be reduced.

As shown, not only the region where the first electrode 7 is placed, but also the region where the second electrode 8 is placed, part of the second semiconductor region 4, the active region 3 and the first semiconductor region 2. By removing and forming them, it is possible to reduce the height difference between the first electrode 7 and the second electrode 8, and it is possible to solve problems caused by the inclination of the semiconductor light emitting device during bonding. In the case of mini LED and micro LED, since the size is small and the same amount of bonding material is used during flip chip bonding, there is a high possibility of causing quality risks including electrical shorts, especially flip chips without a light-transmitting substrate 1 In the case of a chip (when the light-transmissive substrate 1 is removed, the overall thickness of the semiconductor light emitting device becomes very thin from 150 to 200 μm to 10 μm or less), in addition to the above issues, the crack generation rate may be further increased. Above all, when used as a display light source, there is a high possibility of color deviation and color mixing due to the distortion of the light emitting pattern, and the structural unbalance causes electrical and optical problems due to distortion of the flip chip during flip bonding and transfer processes. Quality issues may arise.

18 is a view showing an example of a method of manufacturing the semiconductor light emitting device shown in FIG. 17. First, as shown in FIG. 18(a), a first semiconductor region 2 is formed on a light-transmissive substrate 1, A region 3 and a second semiconductor region 4 are prepared. Next, as shown in FIG. 18(b), the second semiconductor region 4 and the active region 3 are formed at positions A and B where the first electrode 7 and the second electrode 8 are to be formed. and a portion of the first semiconductor region 2 is removed through etching (eg, ICP). Next, as shown in FIG. 18(c), an insulating layer 5 is formed, and a portion of the insulating layer 5 is removed through a photolithography process. At this time, the insulating layer 5 at the position (C) where the first electrode 7 is to be placed is opened, the insulating layer 5 at the position (D) where the second electrode 2 is to be placed is left as it is, and the current spreading electrode 6 ) is removed to secure a region E that can be in electrical communication with the second semiconductor region 4, so that a portion of the second semiconductor region 4 is exposed. Next, as shown in FIG. 18(d), the current diffusion electrode 6 and the ohmic contact electrode 9 are formed. Next, as shown in FIG. 18(e), the first electrode 7 and the second electrode 8 are formed. Preferably, as shown in Fig. 11(e), a pavation layer 94 is added.

FIG. 19 is a view showing another example of a semiconductor light emitting device according to the present disclosure. Compared to the semiconductor light emitting device shown in FIG. 17, ① the second electrode 8 etch the semiconductor layers 2, 3, and 4 a point formed on the second semiconductor region 4 without a second semiconductor region 4, ② a point where the first electrode 1 is etched and exposed from the first semiconductor region 2 (F) to the second semiconductor region 4 (G), ③ an insulation It has a difference in that the formation order of the layer 5 and the current diffusion electrode 6 is reversed. Through this configuration, a height difference between the first electrode 7 and the second electrode 8 can be reduced. By forming the width of the first electrode 7 and the ohmic contact electrode 9 to cover the entire width W of the semiconductor light emitting device or to reach most of the width, current is supplied from the second electrode 8 to the region G. This is blocked so that the region G becomes a non-emission region despite the existence of the active region 4 . That is, the semiconductor light emitting device shown in FIG. 19 includes a non-emission region (G; first electrode 7 and ohmic contact electrode 9) from the first semiconductor region 2 (F) exposed by etching the first electrode 1. is formed at least 50% longer along the width (W) of the semiconductor light emitting device to block the supply of current from the second electrode (8), while insulating layer (5) under the first electrode (7) in the region (G). ) is located, so that the supply of current is blocked), the height difference between the first electrode 7 and the second electrode 8 is eliminated by configuring the second semiconductor region 4 to be connected thereto. For reference, the insulating layer 5 is not shown in the plan view.

FIG. 20 is a diagram showing another example of a semiconductor light emitting device according to the present disclosure. Compared to the semiconductor light emitting device shown in FIG. 19, ① the entire first electrode 7 is formed on the second semiconductor region 5. point, ② has a difference in that the electrical connection 11 is formed through the via hole H in the insulating layer 5 for electrical communication between the first electrode 7 and the ohmic contact electrode 9. Even in this case, the region I on the opposite side of the second electrode 8 with respect to the via hole H is a non-emission region, and therefore, by forming the first electrode 7 in the non-emission region G, the first The height difference between the electrode 7 and the second electrode 8 is reduced. For reference, the insulating layer 5 is not shown in the plan view.

21 is a view showing another example of a semiconductor light emitting device according to the present disclosure, in which the insulating layer 5 is not formed along the entire outer appearance of the semiconductor layers 2, 3, and 4, but the semiconductor layers 2, 3, and 4 respectively. 4), it has a difference in that it is formed flat as a whole while covering the current spreading electrode 6 and the ohmic contact electrode 9. Through this configuration, it is possible to match the height of the first electrode 7 to the second electrode 8 regardless of the shape of the mesa etch region J on the side of the first electrode 7 . This configuration is made possible by using a liquid insulating layer (5; eg, a thermosetting plastic such as BCB, SU-8, Acrylate, or SOG). From another point of view, the insulating layer 5 is made possible by using a different method (eg, spin coating) from an existing deposition method (eg, CVD, PVD).

22 is a diagram showing an example of a method of manufacturing the semiconductor light emitting device shown in FIG. 21. First, as shown in FIG. 22(a), a first semiconductor region 2 is formed on a light-transmissive substrate 1, A region 3 and a second semiconductor region 4 are prepared. Next, as shown in FIG. 22(b), a region J where the first electrode 7 is located is formed. Next, as shown in FIG. 22(c), the current diffusion electrode 6 and the ohmic contact electrode 9 are formed. It is preferable that the current diffusion electrode 6 and/or the ohmic contact electrode 9 have a reflective film structure (metal or DBR having excellent reflectivity), and the photochromic (photodegradation by light) of the subsequently formed insulating layer 5 is preferred. development), it is particularly preferable to use a metal reflective film. Next, as shown in FIG. 22(d), the light-transmissive substrate 1 is exposed by isolating the semiconductor regions 2, 3, and 4. Of course, this process may be performed before the processes shown in FIGS. 22(b) and 22(c). Next, as shown in FIG. 11(e), it is preferable to form an insulating layer 5-1 (eg SiO ₂ ) using PVD or CVD (eg, sputtering, PECVD) to improve the reliability of the light emitting device. desirable. Next, as shown in FIG. 22(f), an insulating layer 5 is formed. The insulating layer 5 may be formed through spin coating. In order to increase the flatness, 2 to 3 times of spin coating may be used as needed. Next, as shown in FIG. 22(g), after forming a hole in the insulating layer 5, the first electrode 7 and the second electrode 8 are formed. As needed, as shown in FIG. 22(h), the insulating layer 5 is removed from the region except where the first electrode 7 and the second electrode 8 are located (eg, oxygen (O ₂ ) Except for plasma etching containing components) and the insulating layer 5 formed only under the electrodes 7 and 9, it is possible to provide a semiconductor light emitting device that is not significantly distinguished from the semiconductor light emitting device shown in FIG. be able to

FIG. 23 is a diagram showing another example of a semiconductor light emitting device according to the present disclosure, and is substantially the same as the semiconductor light emitting device shown in FIG. 11(e). In the case of the semiconductor light emitting device shown in FIG. 7, since the light-transmitting substrate 314 and the semiconductor regions 302, 304, and 306 are bonded by the flexible and transparent adhesive layer 312, the bonding strength is not excellent. By introducing a rough surface of the N-type semiconductor region 302, the junction area between the transparent adhesive layer 312 and the N-type semiconductor region 302 can be widened, but this is insufficient. Even in the case of the semiconductor light emitting device shown in FIG. 2, the transparent support substrate 102 and the semiconductor regions 104 to 112 are bonded through the P-type current spreading layer 118 (eg, ITO) and the transparent adhesive layer 130. There is a problem maintaining the bond between the two. That is, when the semiconductor regions 302 , 304 , and 306 are supported on the light-transmitting substrate 314 with a flexible and transparent adhesive 312 (organic adhesive such as BCB) through wafer bonding once or twice, the semiconductor regions 302 , 304 , and 306 and the light-transmitting Due to the difference in the thermal expansion coefficient of the substrate 314, peeling may occur at the upper and lower interfaces of the transparent adhesive 312, which has weak adhesion due to thermo-mechanical stress during or after the SMT process. It is a structure bonded to a non-transparent heterogeneous substrate, and peeling is very likely to occur in the organic adhesive bonding area, which is the weakest part. Like the semiconductor light emitting device shown in FIG. 11, the semiconductor light emitting device includes a light-transmissive substrate 80, an adhesive layer 81, a first semiconductor region 30, an active region 40, a second semiconductor region 50, and a first electrode. (92), a second electrode (93) and a passivation layer (94). Unlike the semiconductor light emitting device shown in FIG. 11, the passivation layer 94 is formed before the first electrode 92 and the second electrode 93 are formed, but it is also possible to form the passivation layer 94 in the opposite order. It preferably includes a light-transmitting electrode 91, and various types of electrode configurations shown in FIGS. 12 to 22 are possible. As shown in FIG. 7 , rough surfaces S and S are formed on the first semiconductor region 30 and/or the light-transmitting substrate 80 to increase the contact area of the adhesive layer 81 and improve light extraction efficiency. it is possible to raise In the example shown in FIG. 23 , the passivation layer 94 is transferred to the light-transmissive substrate 80 exposed by removing the second semiconductor region 50, the active region 40, the first semiconductor region 30, and the adhesive layer 80. It is connected. Therefore, the passivation layer 94 is bonded to the light-transmitting substrate 80, and through this bonding force, the adhesive layer 80 can be prevented from being separated from the first semiconductor region 30 and/or the light-transmitting substrate 80. there will be The passivation layer 94 may be formed of a single layer or a composite layer (eg, ODR or DBR), and may be formed of a material such as SiO ₂ , SiN _x , TiO ₂ , Al ₂ O ₃ , or the like. For example, by forming the passivation layer 94 to a thickness of 1 μm or more, peeling prevention can be achieved. The passivation layer 94 basically covers the upper and side surfaces of the semiconductor regions 30, 40, and 50 with a dielectric material (eg, SiO ₂ , Al ₂ O ₃ , SiN _x ), and then a metal material having high reflectivity (eg, SiN x ). : Ag, Al, Au, Cu, Pt, Cr, Ti, TiW) is also preferably a multi-layered structure in which depositing is performed continuously. The adhesive layer 81 may include BCB, Silicone, SU-8, SOG, Acrylate, Urethane, and the like, including the materials mentioned above.

24 and 25 are diagrams showing another example of a semiconductor light emitting device according to the present disclosure, and unlike FIG. 23, the first electrode 92 and the second electrode 93 pass through the passivation layer 94 and pass through the light-transmissive substrate ( 80) is connected to the top. This configuration (at least the semiconductor regions 30, 40, 40 and the passivation layer 94 covering the adhesive layer 81, and the first electrode 92 and the second electrode 93 connected to the light-transmitting substrate 80 thereon) Through this, peeling on both sides of the adhesive layer 81 can be prevented. In this case, the passivation layer 94 may extend over the light-transmitting substrate 80 or may be formed only up to the interface between the adhesive layer 81 and the light-transmitting substrate 80 . Additionally, a first electrode post 92P and a second electrode post 93P may be provided on each of the first electrode 92 and the second electrode 93 formed on the light-transmissive substrate 80 . By providing the first electrode post 92P and the second electrode post 93P, the semiconductor light emitting device has an external power supply 98 (submount, interposer, wiring board, display pixel) in the form shown in FIG. 25. etc.) can be connected electrically and mechanically. The first electrode post 92P and the second electrode post 93P may be formed to a height higher than the height of the semiconductor regions 30 , 40 , and 50 (approximately 4 to 5 μm) and lower than 10 μm. Preferably, the space in which the first electrode post 92P and the second electrode post 93P are not formed is filled with an encapsulant 99 (eg, white silicone) (eg, screen printing) to form the first electrode post 92P. ) and the second electrode post 93P, it is possible to make the semiconductor light emitting device as a whole form one package. The first electrode post 92P and the second electrode post 93P can be formed through copper plating. If necessary, a rough surface for light scattering may be formed on the surface U of the light-transmissive substrate 80 on the opposite side of the adhesive layer 81, or an epoxy coating including carbon may be applied.

FIG. 26 is a diagram showing still other examples of a semiconductor light emitting device according to the present disclosure. In FIG. 26(a), a first electrode post 92P and a second electrode post 93P are semiconductor regions 30, 40, and 50 An example formed to overlap the first electrode 92 and the second electrode 93 formed above is presented, and in FIG. 26(b), the first electrode formed through PVD (eg sputtering, e-beam evaporation) rather than plating is reinforced. The portion 92T and the second electrode reinforcement portion 93T are formed to overlap the first electrode 92 and the second electrode 93 formed on the semiconductor regions 30, 40, and 50 (the first electrode reinforcement portion 92T). ) and the second electrode reinforcing portion 93T are formed to follow the overall shape of the semiconductor regions 30, 40, and 50). Through this configuration, peeling of both sides of the adhesive layer 81 can be further prevented.

FIG. 27 is a view showing another example of a semiconductor light emitting device according to the present disclosure, in which two semiconductor light emitting device chips AA and BB are provided on a light transmissive substrate 80 through adhesive layers 81 and 81. . The first electrode post 92P, the second electrode post 93PA, and the second electrode post 93PB are formed in the same manner as the method shown in FIG. 24 . The first electrode post 92P is connected to the first electrode 92A of the semiconductor light emitting device chip AA and the first electrode 92B of the semiconductor light emitting device chip BB to function as a common electrode. The first electrode 92A and the first electrode 92B may be formed integrally or separately. The second electrode post 93PA is connected to the second electrode 93A of the semiconductor light emitting device chip AA, and the second electrode post 93PB is connected to the second electrode 93B of the semiconductor light emitting device chip BB. It is connected. Through this configuration, a plurality of semiconductor light emitting device chips can be packaged and coupled to the external power supply unit 98 (submount, interposer, wiring board, display pixel, etc.) shown in FIG. 25 . Through this configuration, when the semiconductor light emitting device chips (AA, BB) are micro LED chips, each semiconductor light emitting device chip provided in each panel (pixel) is not inspected and replaced in case of failure, but inspection is performed at the package level. After that, it is fixed to the panel (pixel) and has the advantage of being replaced in units of packages even in the event of a failure. When the two semiconductor light emitting device chips AA and BB emit the same color, they can be grown on one growth substrate and formed through the above-described processes, and the two semiconductor light emitting device chips AA and BB can emit light of the same color. In the case of emitting different colors, each semiconductor light emitting device chip (AA, BB), unlike the previous examples, uses various transfer process technologies (eg, Pick & Place to mechanically move and arrange chips, adhesive materials (eg, : A stamp that moves and arranges chips by making a stamp structure patterned with silicon-based PDMS, a method that moves and arranges chips using an electrostatic force or electromagnetic force structure, and a predetermined uniform viscosity Self-assembly, which moves and arranges chips by combining a fluid with an electromagnetic force structure, and Laser-induced forward transfer, which moves and arranges chips by combining a laser light source and an explosive adhesive material) ,81) can be transferred via the medium. Each of the semiconductor light emitting device chips AA and BB is made in the form shown in FIGS. 11(e) and 12 to 22 in a state in which the growth substrates 1 and 10, the support substrate, or the light-transmitting substrate 80 are removed ( Preferably, as shown in FIGS. 11(e) and 23, a passivation layer 94 is formed on the top and side surfaces of the semiconductor regions 30, 40, and 50 in a state in which the growth substrate 10 is removed, Also, in the state in which the electrodes 91, 92, and 93 are formed), it is transferred onto the light-transmitting substrate 80. In order to prevent the semiconductor light-emitting device chips AA and BB and/or the light-transmitting substrate 80 from being separated from the adhesive layer 81 in a state in which they are transferred to the light-transmissive substrate 80 via the adhesive layer 81, the passivation layer 94A is introduced, on which first electrodes 92A, 92B and second electrodes 93A, 93B run over a light-transmissive substrate 80, on which a first electrode post 92P and a second electrode post (93PA, 93PB) is formed. The materials of the adhesive layers (81, 81) are widely known as organic adhesives for wafer bonding other than BCB (250 ℃) organic adhesive materials, such as Polyimide (160 ℃), SU-8 (90 ℃), Parylene (230 ℃), Epoxy. (150 ℃), Silicone (100-300 ℃), SOG (spin on glass), etc. are representative.

FIG. 28 is a diagram showing another example of a semiconductor light emitting device according to the present disclosure, in which three semiconductor light emitting device chips (AA, BB, CC; eg, RGB LEDs) are provided on one light-transmitting substrate 80. How they are transferred to the light-transmitting substrate 80 has already been described with reference to FIG. 27 . The semiconductor light emitting device includes a first electrode post 92PA, a second electrode post 93PA, a second electrode post 93PB, and a second electrode post 93PC. A first electrode 92A, 92B, 92C, a second electrode 93A, a second electrode 93B, and a second electrode 93C are formed on each of the three semiconductor light emitting device chips AA, BB, and CC. , The first electrodes 92A, 92B, and 92C may have a form integrally connected to each other. Of course, the first electrodes 92A, 92B, and 92C may be separately formed, and the second electrodes 93A, 93B, and 93C may be integrally connected to each other. The first electrode post 92PA is connected to the first electrodes 92A, 92B, and 92C to function as a common electrode, and the second electrodes 93A and 93B formed on each of the three semiconductor light emitting device chips AA, BB, and CC. , 93C) are formed with second electrode posts 93PA, 93PB, and 93PC, respectively. As described above, each of the three semiconductor light emitting device chips AA, BB, and CC is attached to the light-transmissive substrate 80 using an adhesive layer 81 (see FIG. 27), and then a passivation layer 94A (see FIG. 27) is formed, and then, the first electrodes 92A, 92B, and 92C and the second electrodes 93A, 93B, and 93C are formed to be connected to the light-transmitting substrate 80, and then the first electrode posts 92PA and the second electrodes 92PA are formed. Two electrode posts 93PA, 93PB, and 93PC are formed (eg, plated). Preferably, as shown in FIG. 27, the space between the first electrode post 92PA and the second electrode post 93PA, 93PB, and 93PC is filled with an encapsulant 99.

① Through this configuration, it is possible to manufacture a mini or micro LED having a window (light transmitting substrate 80) having a sufficient thickness.

② Through this configuration, mini or micro LEDs are not put into the panel (pixel) in a chip state, but put into the panel (pixel) in the form of a package, thereby simplifying work and facilitating verification and replacement. .

③ Through this configuration (all RGB LED chips are composed of p-side up flip chips), the problems of using n-side up flip chips (as the chip size is miniaturized, N-type non-uniform current flow, etc.) excessive heat) can be eliminated.

④ This configuration (the passivation layer 94 and/or the first electrodes 92A, 92B, 92C and the second electrodes 93A, 93B, 93C) leads to a light-transmissive substrate 80 with or without the adhesive layer 81 removed. ), it is possible to manufacture a mini or micro LED with high reliability (reducing the possibility of peeling on both sides of the adhesive layer 81)

⑤ Through the above configuration, it is possible to manufacture a package for a mini or micro LED in which all of the RGB chips are configured as p-side up flip chips while securing the reliability of the device. At this time, the red LED chip can become a p-side up flip chip by going through wafer bonding twice, and the green and blue LED chips can become a p-side up flip chip by going through wafer bonding 0 or 2 times. . It is also possible to use 4 wafer bonding if necessary.

FIG. 31 is a diagram showing another example of a semiconductor light emitting device according to the present disclosure. Unlike the semiconductor light emitting device shown in FIG. is provided. The thin film transistor 82 may be formed using a known deposition technique prior to transferring the semiconductor light emitting device chip AA to the light-transmissive substrate 90, and may include a gate electrode 83, an insulating layer 84, a semiconductor layer ( 85), the first electrode 86; Example: a source electrode) and a second electrode 87 (eg: a drain electrode). Preferably, an insulating layer 88 is further included. The semiconductor layer 103 may be made of amorphous silicon (a-Si) or polysilicon (LTPS), and when the light-transmitting substrate 80 is made of a material that can withstand a temperature of 500° C. or higher, such as sapphire, quartz, or glass, oxide It may be made of a semiconductor (eg, IGZO (Indium Gallium Zinc Oxide), TiO ₂ , ZnO, WO ₃ , SnO ₂ ). After transferring the semiconductor light emitting device chip AA, as in FIG. 27, a passivation layer 94A is formed, necessary openings or holes are formed through an etching process, and then the first electrode 92A, the second Two electrodes 93A and a connection electrode 95A are formed. Subsequently, a first electrode post 92A, a second electrode post 93PA, and a third electrode post 94PA (see Fig. 32) are formed. Finally, the encapsulant 99 is formed. The passivation layer 94A may extend over the thin film transistor 82, the first electrode 92A is connected to the first electrode 86 of the thin film transistor 82, and the connection electrode 95A is connected to the thin film transistor 82. The second electrode 87 of ) is electrically connected to the second electrode post 92PA. The third electrode post 94PA is omitted from FIG. 31 for convenience of description. When an operation signal is received through the third electrode post 94PA (see FIG. 32 ), the semiconductor layer 85 is activated through the gate electrode 83 connected to the third electrode post 94PA, and the first electrode 86 ) and the second electrode 87 are connected, the second electrode post 93PA, the second electrode 93A, the first electrode 92A, the first electrode 86 of the thin film transistor 82, the thin film transistor ( As current flows through the second electrode 87, the connection electrode 95A, and the first electrode post 92PA of 82), the semiconductor light emitting device chip AA emits light. When the light-transmitting substrate 80 is a growth substrate for the semiconductor light emitting device chip AA, it is also possible to form the thin film transistor 82 after forming the semiconductor light emitting device chip AA. In this case, the adhesive layer 81 may be omitted. The light-transmitting substrate 80 such as a sapphire substrate can withstand a temperature of 1000° C. or more beyond 500° C., and therefore, LTPS can be formed at a higher temperature or electrical mobility can be improved by depositing an oxide semiconductor layer. Improving electrical mobility also means that driving power can be reduced, and it means that the thin film transistor 82 can be further miniaturized, so this technology has a more important meaning for mini-LEDs and micro-LEDs. would. It also means that light absorption by the thin film transistor 82 can be reduced.

FIG. 32 is a view showing an example of the arrangement of the semiconductor light emitting device shown in FIG. 31, showing a gate electrode post or a third electrode post 94PA connected to the gate electrode 83 of the thin film transistor 82, and showing a gate electrode post 94PA. The electrode 83 and the third electrode post 94PA are electrically connected by a connection electrode 97A, and the connection electrode 97A may be formed separately, but when the gate electrode 93 is formed, the gate electrode ( 83). The first electrode 92A of the portion connecting the first electrode 92A and the first electrode 86 and the second electrode 93A of the portion connecting the second electrode post 93PA and the second electrode 93 As a silver connection electrode, it is needless to say that it may be formed separately from the first electrode 92A and the second electrode 93A.

33 is a view showing a modified example of the semiconductor light emitting device shown in FIG. 31 . Unlike the semiconductor light emitting device shown in FIGS. 31 and 32 , the thin film transistor 82 includes a second electrode post 93PA and a semiconductor light emitting device chip ( It is provided between the second electrodes 93A of AA). The first electrode 86 of the thin film transistor 82 is electrically connected to the second electrode post 93PA through a connection electrode, and the second electrode 87 of the thin film transistor 82 is the semiconductor light emitting device chip AA. ) is electrically connected to the second electrode 93A, and the first electrode 92A of the semiconductor light emitting device chip AA is directly connected to the first electrode post 92PA.

34 is a diagram showing another example of a semiconductor light emitting device according to the present disclosure, in addition to the semiconductor light emitting device shown in FIG. 28, a thin film functioning as a switch for each of three semiconductor light emitting device chips AA, BB, and CC. Transistors 82A, 82B and 82C are provided. In order to receive a signal for driving each of the thin film transistors 82A, 82B, and 82C from an external power supply 98 (see FIG. 25; eg: submount, interposer, wiring board, display pixel), the third electrode post or gate Electrode posts 94PA, 94PB and 94PC are also provided. The third electrode posts or gate electrode posts 94PA, 94PB, and 94PC may be formed at the same height in the same manner as the first electrode posts 92PA, 92PB, and 92PC and the second electrode posts 93PA, and The electrode post 93PA functions as a common electrode. Of course, the configuration shown in FIG. 33 can be applied, and at this time, one of the first electrode posts 92PA, 92PB, and 92PC can be formed as a common electrode.

Through the semiconductor light emitting device shown in FIGS. 31 to 34, the side of the semiconductor light emitting device mounted here in the form of a package, specifically, the light emitting side of the semiconductor light emitting device, rather than the side of the external power supply unit 98 (see FIG. 25). The thin film transistors 82A, 82B, and 82C can be formed on the side of the light-transmitting substrate 80 (light window). On the other hand, even when it is required to form the semiconductor layer 84 with an oxide semiconductor, regardless of the conditions required when the semiconductor layer 84 is deposited on the substrate (to withstand 500 ° C. or more), an external power supply ( 98; see FIG. 25). Meanwhile, as shown in FIG. 34, one semiconductor light emitting device may be individualized and coupled to an external power supply unit 98 (see FIG. 25), but the light-transmitting substrate 80 may not be cut, cut to a specific size, or a wafer It is possible to transfer to an external power supply unit (98; see FIG. 25) in a level state (a state in which two or more semiconductor light emitting devices of FIG. have the advantage of being able to

Returning to FIG. 24 , the passivation layer 94 may be referred to as a non-conductive reflective film 94 by another name. As described with reference to FIGS. 15 and 16, the non-conductive reflective film 94 is a single-layer dielectric film (eg, SiO _x , TiO _x , Ta ₂ O ₅ , MgF ₂ ), a multi-layer dielectric film, or a DBR reflective film (eg, SiO x , TiO x , Ta 2 O 5 , MgF 2 ). : SiO ₂ /TiO ₂ ) or a combination thereof.

35 is a diagram showing another example of a semiconductor light emitting device according to the present disclosure, except that a black matrix material (BM) is formed on a light-transmitting substrate 80, and FIG. 24 It is almost the same as the semiconductor light emitting device presented in Side surfaces LS of the semiconductor layers 30 , 40 , and 50 are inclined, and thus function to emit light generated in the active layer 40 toward the surface U of the light-transmitting substrate 80 . As described above, it is more effective when the non-conductive reflective film 94 includes a reflective film such as DBR. In order to increase the light extraction efficiency, rough surfaces S and S may be formed on the surface W and/or the surface U of the light-transmitting substrate 80, and the rough surfaces S and S may form an adhesive layer 81 and/or a function of increasing the bonding area of the black matrix material (BM). Since the non-conductive reflective film 94 has a light reflecting function, absorption of light by the black matrix material BM formed on the surface W of the light-transmissive substrate 80 can be minimized. Through this configuration, when the display is not operating, the screen looks black as a whole. The black matrix material used is not a glass screen on the front of the display, but a semiconductor light emitting device of the package or interposer shown in FIG. 35 will be able to provide

36 to 38 are diagrams showing an example of a method of manufacturing the semiconductor light emitting device shown in FIG. 28. First, as shown in FIG. 36, three semiconductor light emitting device chips AA, BB, and CC are prepared. do. The three semiconductor light emitting device chips AA, BB, and CC have a substrate ST; for example: a light-transmissive substrate 80 and a growth substrate 1, 10), for example, in the form shown in FIG. 11 or It may have the form shown in FIG. 22 (insulation layer 5 may be omitted). Next, each of the three semiconductor light emitting device chips (AA, BB, CC) is attached to a temporary substrate (eg, PDMS stamp), and then the substrate ST is wet etched (GaAs substrate), laser ablation Remove using Laser Ablation (sapphire substrate). Wet etching may also be used to remove the light-transmitting substrate 80 having the adhesive layer 81 thereon.

Next, as shown in FIG. 37(a), an adhesive layer 81 (eg: organic transparent adhesive (BCB, SOG, Silicone, Acrylated)) is provided on the light-transmitting substrate 80 (eg: sapphire, quartz, glass) to form three layers. The semiconductor light emitting device chips AA, BB, and CC are transferred Next, as shown in FIG. 37(b), the adhesive layer ( 81) to expose the light-transmissive substrate 80. The adhesive layer 81 can be completely removed through a dry and/or wet process. For example, in the case of an organic adhesive layer 81 containing carbon (C) component While can utilize plasma containing oxygen (O ₂ ), the inorganic adhesive layer 81 including SiO ₂ component is a liquid phase or gas phase containing an activated acid component. ) can be etched into the material.

If necessary, as shown in FIG. 37(c), a bladder matrix material (BM; see FIG. 35) may be additionally formed. The formation of the BM 35 may utilize a photolithography process and spin coating, or may combine a shadow mask and a screen printing process.

Next, as shown in Fig. 38(a), a passivation layer 94A is formed.

Next, as shown in FIG. 38(b), holes necessary for the passivation layer 94A are formed, and first electrodes 92A, 92B, and 92C are formed on each of the three semiconductor light emitting device chips AA, BB, and CC. ) and the second electrodes 93A, 93B, and 93C.

Next, as shown in FIG. 38(c), a first post electrode 92PC and a second post electrode 93PA are formed as pad electrodes.

Common to three semiconductor light emitting device chips AA, BB, CC, first electrodes 92A, 92B, 92C, second electrodes 93A, 93B, 93C, and first post electrodes 92PA, 92PB, 92PC. The electrode, the second post electrode 93PA, may have a disposition as shown in FIG. 28 .

Finally, as shown in FIGS. 38(d) and 38(e), an encapsulant 99 (white or black Silicone) is formed (eg, screen printing), and planarization is performed to perform a first post electrode 92PC. ) and the second post electrode 93PA are exposed.

39 is a view for explaining another method of manufacturing a semiconductor light emitting device according to the present disclosure. First, as in FIG. 36, three semiconductor light emitting device chips AA, BB, and CC are prepared. The three semiconductor light emitting device chips AA, BB, and CC have a substrate ST; for example: a light-transmissive substrate 80 and a growth substrate 1, 10), for example, in the form shown in FIG. 11 or It may have the form shown in FIG. 22 (insulation layer 5 may be omitted). Preferably, the substrate ST of each of the three semiconductor light emitting device chips AA, BB, and CC is prepared in a form capable of laser ablation so that laser ablation can be used when removing the substrate ST. . For example, in the case of a chip emitting ultraviolet, blue, and green light, since a growth substrate (eg, a sapphire substrate) has light-transmitting properties, it may be used as the substrate ST. In the case of a chip emitting red light, since the growth substrate (eg, GaAs substrate) is opaque and laser ablation is impossible, the substrate ST is prepared as a light-transmitting substrate 80 using the process shown in FIGS. 8 to 11 , as shown in FIG. 8(e), after removing the growth substrate 10, using a metal bonding layer 71 and a sacrificial layer 72 instead of the adhesive layer 81 shown in FIG. 9(a) The light-transmitting substrate 80 and the semiconductor regions 30, 40, and 50 are attached. As described above, it goes without saying that chips emitting ultraviolet light, blue light, and green light can be manufactured by the processes shown in FIGS. 8 to 11 .

Next, as shown in FIG. 39(a), the three semiconductor light emitting device chips AA, BB, and CC are attached to the temporary substrate 74 provided with the adhesive layer 75. The temporary substrate 74 is preferably made of a material having the same or similar lattice constant as the substrate ST of each of the three semiconductor light emitting device chips AA, BB, and CC. For example, a sapphire substrate may be used. The adhesive layer 75 may be formed of an organic adhesive layer such as BCB, Polyimide, SU-8, Parylene, Epoxy, or Silicone. By transferring each of the three semiconductor light emitting device chips (AA, BB, CC) at the chip level including the substrate (ST), various transfer process technologies (e.g., pick & place that mechanically moves and arranges chips, adhesiveness A stamp that moves and arranges chips by making a stamp structure patterned with a material (e.g., silicon-based PDMS), a method that moves and arranges chips using an electrostatic force or electromagnetic force structure, and a predetermined uniform viscosity (Self-assembly, which moves and arranges chips by combining a fluid with viscosity and an electromagnetic force structure, and Laser-induced forward transfer, which moves and arranges chips by combining a laser light source and an explosive adhesive material) on the light-transmitting substrate 80 It can be transferred via the adhesive layers 81 and 81 . In addition, since the transfer is performed in a state in which the electrodes 92 and 93 (see FIG. 11(e)) are formed, there is an advantage in that the good or bad of the chip can be covered before transfer. In addition, since all the high-temperature processes necessary for the chip process are performed from the transfer to the formation of the electrodes 92 and 93 (see FIG. 11(e)), the selection of materials for the adhesive layer 75 can be broadened.

Next, as shown in FIG. 39(b), the substrate ST of each of the three semiconductor light emitting device chips AA, BB, and CC is removed through laser ablation. As pointed out in FIG. 9(c), by using laser ablation, damage to the adhesive layer 75 can be prevented during the separation process of the substrate ST. Thereafter, the metal bonding layer 71 is removed, and preferably, as indicated in FIG. 8(e), part or all of the undoped semiconductor region 23 is removed (eg, etched), and the first semiconductor region A surface texturing process may be added to (30) to increase light extraction efficiency.

Next, as shown in FIG. 39(c), an adhesive layer 81 on the side of the three semiconductor light emitting device chips AA, BB, and CC; examples: OCA, OCR, Polyimide, SU-8, Parylene, Epoxy, Silicone , SiO ₂ , SOG) and the light-transmissive substrate 80 (eg: sapphire, quartz, glass) are attached, and then the temporary substrate 74 and the adhesive layer 75 are removed. The adhesive layer 81 is a transparent organic or inorganic adhesive, for example, made of a material such as Optical Clear Adhesive (OCA), Optical Clear Resin (OCR), Polyimide, SU-8, Parylene, Epoxy, Silicone, SiO ₂ , or SOG. It can be done. Since the adhesive layer 81 remains in the final Interposer (PKG, Module) product, it is preferable to use a material having high temperature resistance and environmental resistance as much as possible to ensure that there is no quality issue.

Preferably, as shown in FIG. 39(d), a planarization layer 76 is formed, and first electrodes 92A, 92B, and 92C are formed on each of the three semiconductor light emitting device chips AA, BB, and CC. Second electrodes 93A, 93B, and 93C are formed. The first electrodes 92A, 92B, and 92C and the second electrodes 93A, 93B, and 93C are already formed on each of the three semiconductor light emitting device chips AA, BB, and CC in FIG. 39(a) ( 92 and 93 (see FIG. 11(e))), it may be referred to as a wiring electrode. The electrodes 92 and 93 (see FIG. 11(e)) may be made of only the light-transmitting electrode 91 (eg, ITO), or a reflective electrode or reflective electrode structure made of a metal having excellent reflectivity (eg, Ag, Al, Au). (Example: Ti/Ag, Al/Au), or simply ohmic metal/barrier metal/bonding metal (Example: Cr/Ni/Au, Ti/Ni/Au), or a combination thereof there is. Therefore, the electrodes 92 and 93 (see FIGS. 11(e)) should be understood as a concept encompassing various types of electrode materials, electrode structures, and electrode arrangements applied to semiconductor light emitting device chips in FIGS. 1 to 38 . The planarization layer or step reduction layer 76 is a liquid insulating layer (5; examples: thermosetting plastics such as OCA, OCR, Polyimide, SU-8, Parylene, Epoxy, Silicone, BCB, Acrylate, SOG) as shown in FIG. ), or simply a passivation layer or a non-conductive reflective film 94A as shown in FIG. 38, or a combination thereof. As shown in FIG. 37( b ), the light-transmissive substrate 80 may be exposed by removing the adhesive layer 81 in an area where the three semiconductor light emitting device chips AA, BB, and CC are not provided. As shown, the wiring work of the micro-LED is not performed by a work such as screen printing in a state where the micro-LED is placed on a pixel (errors may occur in the posture and position of the micro-LED during the placing operation), but at the wafer level, That is, by performing a wiring work through a deposition work such as sputtering in a state where a plurality of semiconductor light emitting device chips AA, BB, and CC are fixed on the light-transmissive substrate 80, the accuracy of the wiring work can be improved. The plurality of semiconductor light emitting device chips AA, BB, and CC wired in this way can be directly transferred to the external power supply unit 98 (see FIG. 25). Although only three of the plurality of semiconductor light emitting device chips AA, BB, and CC are shown in FIG. 39, this should be understood as an example.

Finally, as shown in FIG. 39(e), electrode posts 92PC and 93PA are formed in the same arrangement as shown in FIG. 28, and the electrode posts 92PC and 93PA are supported with an encapsulant 99. . The electrode posts 92PC and 93PA may be referred to as bonding pads in the sense that they are bonded to the external power supply unit 98 (see FIG. 25).

40 and 41 are diagrams for explaining another method of manufacturing a semiconductor light emitting device according to the present disclosure, and unlike FIG. 39, as shown in FIG. 40(a), three semiconductor light emitting device chips AA, BB and CC) are prepared in a form having only a light-transmitting electrode 91 (eg, ITO).

Next, from FIG. 40(b) to FIG. 41(a), the same steps as from FIG. 39(b) to FIG. 39(d) are performed, and as shown in FIG. 41(b), n After a mesa process (see FIG. 11(b)) of exposing the mold semiconductor region is performed, electrodes 92 and 93 (see FIG. 11(e)) described in FIG. 39 and a passivation layer 94A are formed. It goes without saying that the formation order of the electrodes 92 and 93 (see FIG. 11(e)) and the passivation layer 94A may be changed.

Next, as shown in FIG. 41(c), first electrodes 92A, 92B, and 92C and second electrodes 93A, 93B, and 93C are formed as wiring electrodes. If necessary, the planarization layer or step reduction layer 76 is first formed, and then the first electrodes 92A, 92B, and 92C and the second electrodes 93A, 93B, and 93C are formed.

Finally, as shown in FIG. 41(d), as in FIG. 39(e), electrode posts 92PC and 93PA are formed as bonding pads, and the electrode posts 92PC and 93PA are sealed with an encapsulant 99. support with

Compared to the manufacturing method of the semiconductor light emitting device shown in FIG. 39, the manufacturing method of the semiconductor light emitting device shown in FIGS. 40 and 41 first electrically and optically transfers only a large chip of a good product at high speed, and the adhesive layer 75 is provided. After the process of attaching to the temporary substrate 74 and the laser ablation process of removing the substrate ST of each of the three semiconductor light emitting device chips AA, BB, and CC (FIG. 41 (a)), the wafer level Since the semiconductor chip fabrication process including the photolithography process is performed on a substrate (eg, circular or square sapphire interposer), the size control of the three semiconductor light emitting device chips (AA, BB, CC) is performed. In addition to a high degree of freedom, it is possible to design a chip to be fixed in an exact position (eg, the same as the position of a chip on a photolitho mask). That is, in the process of exposing the light-transmissive substrate 800 by removing the adhesive layer 81 in FIG. 41 (a), the semiconductor light emitting device chips AA, BB, Even if there is some error in the position and posture of CC), the semiconductor light emitting device chips (AA, BB, CC) are also removed according to the shape of the etching mask (photolitho mask) used in the process of removing the adhesive layer 81. , It becomes possible to keep the position and posture of the semiconductor light emitting device chips AA, BB, and CC constant In addition, in this process, the light-transmitting electrode 91 is damaged in the etching process of the semiconductor light emitting device chips AA, BB, and CC As shown in FIG. Without additional transfer of surplus chips that emit light, even if one of the semiconductor light emitting device chips (AA, BB, CC) fails, the device can be driven without problems, and also the chips divided through etching can be connected in series with each other. , it is also possible to connect them in parallel.

42 is a view for explaining another method of manufacturing a semiconductor light emitting device according to the present disclosure, in a state in which three semiconductor light emitting device chips AA, BB, and CC are attached to an external power supply unit 98, each A method of removing the substrate ST is exemplified. The external power supply unit 98 has a form in which a conductive portion CV is formed in a via hole, and may be formed of the same or similar material as the substrate ST (eg, sapphire). An external power supply 98 of this type is presented in US Patent Publication No. 2017-0317230. ACF (Anisotropic Conductive Film) may be used as the adhesive layer 81, and it is also possible to use solder. The external power supply unit 98 in this example may also be viewed as one substrate ST.

43 is a diagram showing an example of application of a semiconductor light emitting device according to the present disclosure, in which three semiconductor light emitting devices (E, F, and G) are accommodated in one pixel (having a size of approximately 400 μm×400 μm). shows the state of being Unlike the semiconductor light emitting device shown in FIG. 28 , the two semiconductor light emitting device chips AA, BB, and CC have a difference in that each light-transmitting substrate 80 is used instead of one light-transmitting substrate. For example, each of the three semiconductor light emitting devices E, F, and G may have a size of 100 μm×200 μm, and each of the three semiconductor light emitting device chips AA, BB, and CC have one side of 50 μm or less, and , The interval between the three semiconductor light emitting device chips AA, BB, and CC may be set to 100 μm and may be disposed to occupy 300 μm as a whole. The thickness of the translucent substrate 80 may be 100 μm or less. Through this configuration, there is an advantage of reducing a color interference (cross-talk) effect between the three semiconductor light emitting elements (E, F, G). Additionally, by using an insulator (IM) such as white or black polymer (e.g. EMC, SMC, black matrix material), three semiconductor light emitting elements (E, F, G) are bundled into one pixels can be formed. At this time, since the light-transmitting substrate 80 is electrically insulative, it is arranged in contact between chips or made of white or black polymer (EMC, SMC, Black Matrix) while maintaining a predetermined spacing between chips. One pixel in a state of being filled and tied is also possible, and in this case, the height of the filled white or black resin material between the chips is at least the thickness of the light-transmitting substrate 80.

At least one of the three semiconductor light emitting elements E, F, and G is configured to have the form shown in FIGS. 24 and 35, so that a p-side up flip chip is used, while the first electrode post 92PC and the second By using the electrode post 93PC, that is, by using a bonding pad having a large area, bonding strength can also be improved. When the growth substrate is used as the light-transmissive substrate 80 as it is, the adhesive layer 81 is omitted.

In addition, at least one of the three semiconductor light emitting devices E, F, and G is configured to have the shape shown in FIGS. 27 and 41(b), and the semiconductor light emitting device chips AA and BB are connected in series or parallel to each other. (This is possible by connecting the first electrodes 92A and 93A and the second electrodes 92B and 93B in series or parallel), even if one of the semiconductor light emitting device chips AA and BB fails, the display It can be used without any repairs. Similarly, when the growth substrate is used as the light-transmissive substrate 80 as it is, the adhesive layer 81 is omitted.

In addition, by configuring at least one of the three semiconductor light emitting elements (E, F, and G) to be in the form shown in FIG. 31, the electrical wiring under the pixel or the entire display (source line and data line arrangement structure) Allowing you some leeway in the design. It goes without saying that a non-light emitting device such as a Zener diode may be provided in addition to the thin film transistor 82 . Similarly, when the growth substrate is used as the light-transmissive substrate 80 as it is, the adhesive layer 81 is omitted.

44 and 45 are views showing another example of application of the semiconductor light emitting device according to the present disclosure. First, as shown in FIG. ) is provided. Next, as shown in FIG. 44(b), the semiconductor regions 30, 40, and 50 are etched leaving the light emitting portion M in a mesa shape having a size applicable to a micro LED. At this time, the n-type semiconductor region 30 is left. Subsequently, the first electrode 92 and the second electrode 93 are formed as ohmic electrodes. Next, as shown in FIG. 44(c), a planarization layer or step reduction layer 76 is formed. Next, as shown in FIG. 44(d), the semiconductor light emitting device chip AA is prepared by forming a first electrode 92B and a second electrode 93B as wiring electrodes and/or bonding pads. Next, as shown in FIG. 45(a), as shown in FIG. 42, the semiconductor light emitting device chip AA is coupled to an external power supply 98 having an adhesive layer 81 (eg ACF), and the substrate (ST) is removed. The external power supply unit 98 in this example may also be viewed as one substrate ST. Next, as shown in FIG. 45(b), it is preferable to form the black matrix material BM in the n-type semiconductor region 30 except for the light emitting region L. The black matrix material (BM) also functions as a protective layer, and therefore, other than the black matrix material (BM), materials that can function as a protective layer, such as a dielectric layer (SiO ₂ ) and white silicon, may be used. As mentioned in FIG. 35 , a rough surface s may be formed on the n-type semiconductor region 30 through surface texturing after the substrate ST is removed. Finally, as shown in FIG. 45(c), the semiconductor light emitting devices E, F, and G are arranged in one pixel in the form shown in FIG. 43. Compared to the semiconductor light emitting device shown in FIGS. 44 and 45, the light-transmitting substrate 80 is divided to reduce the cross-talk effect, especially in the case of the type shown in FIG. 45. Since the light-transmitting substrate 80 is not provided, it has an advantage.

Hereinafter, various embodiments of the present disclosure will be described.

(1) In a method of manufacturing a flip chip semiconductor light emitting device, a first semiconductor region having an N type, an active region generating light through recombination of electrons and holes, and a second semiconductor region having a P type are sequentially formed. providing a formed growth substrate; bonding the first light-transmissive substrate to the second semiconductor region side; removing the growth substrate from the first semiconductor region side; attaching a second light-transmissive substrate to the side of the first semiconductor region from which the growth substrate has been removed using an adhesive layer; laser ablating the first light-transmitting substrate from the second semiconductor region side; exposing a portion of the first semiconductor region by removing portions of the second semiconductor region and the active region; and forming a first electrode of a flip chip and a second electrode of a flip chip on the exposed first and second semiconductor regions, respectively.

(2) forming a protective layer on the second semiconductor region prior to bonding the first light-transmitting substrate;

(3) A method of manufacturing a semiconductor light emitting device in which the first light-transmitting substrate includes a sacrificial layer, and the sacrificial layer and the protective layer are bonded by a metal bonding layer.

(4) A method of manufacturing a semiconductor light emitting device in which the metal bonding layer and the protective layer are sequentially removed after the step of removing the first light-transmitting substrate and prior to the step of exposing a part of the first semiconductor region.

(5) A method of manufacturing a semiconductor light emitting device in which a portion of the adhesive layer is removed to expose the second light-transmitting substrate after sequentially removing the metal bonding layer and the protective layer.

(6) A method of manufacturing a semiconductor light emitting device comprising the step of forming a light-transmitting electrode in the second semiconductor region after sequentially removing the metal bonding layer and the protective layer.

(7) In the providing step, an undoped semiconductor region is formed below the first semiconductor region, and prior to the attaching step, at least a portion of the undoped semiconductor region is removed.

(8) A semiconductor light emitting device comprising: a first semiconductor region having a first conductivity; a second semiconductor region having a second conductivity different from the first conductivity; an active region interposed between the first semiconductor region and the second semiconductor region and generating light by recombination of electrons and holes; a first electrode positioned in the first semiconductor region exposed by removing a portion of the first semiconductor region, the active region, and the second semiconductor region, electrically communicating with the first semiconductor region, and functioning as a flip chip bonding pad; Also, a portion of the first semiconductor region, the active region, and the second semiconductor region are removed and located in another first semiconductor region exposed, insulated from the first semiconductor region through an insulating layer, and electrically electrically connected to the second semiconductor region. A semiconductor light emitting device comprising: a second electrode communicating with each other and functioning as a flip chip bonding pad.

(9) A semiconductor light emitting device comprising: a first semiconductor region having a first conductivity; a second semiconductor region having a second conductivity different from the first conductivity; an active region interposed between the first semiconductor region and the second semiconductor region and generating light by recombination of electrons and holes; a first electrode positioned in the first semiconductor region exposed by removing a portion of the first semiconductor region, the active region, and the second semiconductor region, electrically communicating with the first semiconductor region, and functioning as a flip chip bonding pad; and a second electrode that is in electrical communication with the second semiconductor region and functions as a flip chip bonding pad, wherein the first electrode is connected over the second semiconductor region that is a non-emission region.

(10) A semiconductor light emitting device comprising: a first semiconductor region having a first conductivity; a second semiconductor region having a second conductivity different from the first conductivity; an active region interposed between the first semiconductor region and the second semiconductor region and generating light by recombination of electrons and holes; a first electrode that is in electrical communication with the first semiconductor region exposed by removing a portion of the first semiconductor region, the active region, and the second semiconductor region, and functions as a flip-chip bonding pad; a second electrode that is in electrical communication with the second semiconductor region and functions as a flip chip bonding pad; and an insulating layer disposed under the first electrode and the second electrode and filling the first semiconductor region exposed by removing a portion of the first semiconductor region, the active region, and the second semiconductor region. device.

(11) A semiconductor light emitting device including an additional insulating layer, wherein the additional insulating layer is exposed by removing the insulating layer except for regions below the first electrode and the second electrode.

(12) A semiconductor light-emitting device comprising: a light-transmitting substrate; Semiconductor light emitting devices having sequentially grown first semiconductor regions having a first conductivity, an active region generating light using recombination of electrons and holes, and a second semiconductor region having a second conductivity different from the first conductivity. A device chip; A first semiconductor light emitting device chip having a first electrode electrically connected to the first semiconductor region and a second electrode electrically connected to the second semiconductor region; an adhesive layer bonding the light-transmitting substrate and the first semiconductor region side of the first semiconductor light emitting device chip; and a passivation layer covering at least the first semiconductor light emitting device chip and the adhesive layer.

(13) A semiconductor light emitting device in which the passivation layer continues over the exposed light-transmitting substrate without an adhesive layer.

(14) A semiconductor light emitting device in which the first electrode and the second electrode are formed on the passivation layer and connected to the exposed light-transmitting substrate without an adhesive layer.

(15) A semiconductor light emitting device including a first electrode post and a second electrode post formed higher than the height of the first semiconductor light emitting device chip on each of the first electrode and the second electrode connected to the light transmitting substrate.

(16) A semiconductor light emitting device including a sealant covering the first semiconductor light emitting device chip and supporting the first electrode post and the second electrode post.

(17) a second semiconductor light emitting device chip provided on the light-transmitting substrate; the second semiconductor light emitting device chip is sequentially grown by using a first semiconductor region having a first conductivity and recombination of electrons and holes; An active region that generates light, a second semiconductor region having a second conductivity different from the first conductivity, a first electrode electrically connected to the first semiconductor region and connected to the light-transmitting substrate, and electrically connected to the second semiconductor region and having light-transmitting properties. A first electrode post and a second electrode post formed higher than the height of the second semiconductor light emitting device chip on the second electrode connected to the substrate and the first electrode and the second electrode connected to the light-transmitting substrate, respectively; One of the first electrode post of the device chip and the first electrode post of the second semiconductor light emitting device chip, and the second electrode post of the first semiconductor light emitting device chip and the second electrode post of the second semiconductor light emitting device chip serves as a common electrode. A semiconductor light emitting element integrally formed.

(18) Covering the first semiconductor light emitting device chip and the second semiconductor light emitting device chip, the first electrode post of the first semiconductor light emitting device chip, the second electrode post of the first semiconductor light emitting device chip, and the second semiconductor light emitting device A semiconductor light emitting device comprising: an encapsulant supporting the first electrode post of the chip and the second electrode post of the second semiconductor light emitting device chip.

(19) A semiconductor light emitting device in which a passivation layer covers the first semiconductor light emitting device chip and the second semiconductor light emitting device chip.

(20) It is provided on the light-transmitting substrate and includes a third semiconductor light emitting device chip, wherein the third semiconductor light emitting device chip is sequentially grown by using a first semiconductor region having a first conductivity and recombination of electrons and holes. An active region that generates light, a second semiconductor region having a second conductivity different from the first conductivity, a first electrode electrically connected to the first semiconductor region and connected to the light-transmitting substrate, and electrically connected to the second semiconductor region and having light-transmitting properties. A first electrode post and a second electrode post formed higher than a height of a third semiconductor light emitting device chip on a second electrode connected to a substrate and a first electrode post connected to a light-transmitting substrate and a second electrode post formed above each of the first electrode and the second electrode connected to the light-transmitting substrate, and the first semiconductor light emitting device The first electrode post of the device chip, the first electrode post of the second semiconductor light emitting device chip and the first electrode post of the third semiconductor light emitting device chip, the second electrode post of the first semiconductor light emitting device chip, and the second semiconductor light emitting device A semiconductor light emitting device wherein one of the second electrode post of the chip and the second electrode post of the third semiconductor light emitting device chip is integrally formed as a common electrode.

(21) Covering the first semiconductor light emitting device chip, the second semiconductor light emitting device chip, and the third semiconductor light emitting device chip, the first electrode post of the first semiconductor light emitting device chip and the second electrode post of the first semiconductor light emitting device chip , the first electrode post of the second semiconductor light emitting device chip and the second electrode post of the second semiconductor light emitting device chip, and the first electrode post of the third semiconductor light emitting device chip and the second electrode post of the third semiconductor light emitting device chip A semiconductor light emitting device comprising a; encapsulant for supporting.

(22) The second semiconductor region of the first semiconductor light emitting device chip, the second semiconductor region of the second semiconductor light emitting device chip, and the second semiconductor region of the third semiconductor light emitting device chip are opposite to the light-transmitting substrate with respect to their respective active regions. Semiconductor light emitting device provided on the side.

(23) A semiconductor light emitting device in which a passivation layer covers the first semiconductor light emitting device chip, the second semiconductor light emitting device chip, and the third semiconductor light emitting device chip.

(24) A semiconductor light-emitting device comprising: a light-transmitting substrate; Semiconductor light emitting devices having sequentially grown first semiconductor regions having a first conductivity, an active region generating light using recombination of electrons and holes, and a second semiconductor region having a second conductivity different from the first conductivity. A first semiconductor light emitting device chip having a first electrode electrically connected to the first semiconductor region and a second electrode electrically connected to the second semiconductor region; a light-transmitting substrate as a window through which light is emitted. a phosphorus first semiconductor light emitting device chip; and a first thin film transistor that controls light emission of the first semiconductor light emitting device chip and is deposited on the light-transmitting substrate.

(25) The first electrode and the second electrode are connected to the light-transmitting substrate, and the first electrode post formed higher than the height of the first semiconductor light emitting device chip on each of the first electrode and the second electrode connected to the light-transmitting substrate; and a second electrode post. A semiconductor light emitting device comprising a; electrode post.

(26) The first thin film transistor includes a first gate electrode for controlling light emission of the first semiconductor light emitting device chip, is electrically connected to the first gate electrode on the light-transmitting substrate, and A semiconductor light emitting device comprising: a first gate electrode post formed higher than a height thereof.

(27) A semiconductor light emitting device comprising: an encapsulant covering the first semiconductor light emitting device chip and supporting the first electrode post, the second electrode post, and the first gate electrode post.

(28) a second semiconductor light-emitting device chip provided on the light-transmitting substrate; and a second thin film transistor that controls light emission of the second semiconductor light emitting device chip and is deposited on the light-transmitting substrate, wherein the second semiconductor light emitting device chip is sequentially grown with a first semiconductor region having a first conductivity, electrons, and the like. An active region generating light by recombination of holes, a second semiconductor region having a second conductivity different from the first conductivity, a first electrode electrically connected to the first semiconductor region and extending over a light-transmitting substrate, and a second semiconductor region A first electrode post and a second electrode post formed higher than the height of the second semiconductor light emitting device chip on each of the second electrode electrically connected to and connected to the light-transmitting substrate, the first electrode and the second electrode connected to the light-transmitting substrate, and a second electrode post. and a second gate electrode for controlling light emission of the second semiconductor light emitting device chip; the second thin film transistor is electrically connected to the second gate electrode on the light-transmissive substrate and has a height of the second semiconductor light emitting device chip. A semiconductor light emitting device including a second gate electrode post formed higher.

(29) a third semiconductor light-emitting device chip provided on the light-transmitting substrate; and a third thin film transistor that controls light emission of the third semiconductor light-emitting device chip and is deposited on the light-transmitting substrate, wherein the third semiconductor light-emitting device chip is sequentially grown with a first semiconductor region having a first conductivity, electrons, and the like. An active region generating light by recombination of holes, a second semiconductor region having a second conductivity different from the first conductivity, a first electrode electrically connected to the first semiconductor region and extending over a light-transmitting substrate, and a second semiconductor region A first electrode post and a second electrode post formed higher than the height of the third semiconductor light emitting device chip on each of the second electrode electrically connected to and connected to the light-transmitting substrate, the first electrode and the second electrode connected to the light-transmitting substrate, and a second electrode post. The third thin film transistor includes a third gate electrode for controlling light emission of the third semiconductor light emitting device chip, is electrically connected to the third gate electrode on the light-transmitting substrate, and has a height of the third semiconductor light emitting device chip. A semiconductor light emitting device comprising: a third gate electrode post formed higher.

(30) the first electrode post of the first semiconductor light emitting device chip, the first electrode post of the second semiconductor light emitting device chip, the first electrode of the third semiconductor light emitting device chip, and the second electrode post of the first semiconductor light emitting device chip , A semiconductor light emitting device in which one of the second electrode post of the second semiconductor light emitting device chip and the second electrode post of the third semiconductor light emitting device chip is integrally formed as a common electrode.

(31) Covering the first semiconductor light emitting device chip, the second semiconductor light emitting device chip, and the third semiconductor light emitting device chip, the first electrode post of the first semiconductor light emitting device chip and the second electrode post of the first semiconductor light emitting device chip , the first electrode post of the second semiconductor light emitting device chip and the second electrode post of the second semiconductor light emitting device chip, the first electrode post of the third semiconductor light emitting device chip and the second electrode post of the third semiconductor light emitting device chip, and A semiconductor light emitting device comprising: an encapsulant supporting the first gate electrode post, the second gate electrode post, and the third gate electrode post.

(32) a transparent adhesive layer bonding each of the first semiconductor light emitting device chip, the second semiconductor light emitting device chip, and the third semiconductor light emitting device chip to the light-transmitting substrate;

(33) A semiconductor light-emitting device comprising: a light-transmissive substrate having a first surface and a second surface opposite to the first surface; Semiconductor light emitting devices having sequentially grown first semiconductor regions having a first conductivity, an active region generating light using recombination of electrons and holes, and a second semiconductor region having a second conductivity different from the first conductivity. A semiconductor light emitting device chip comprising a first electrode electrically connected to the first semiconductor region and a second electrode electrically connected to the second semiconductor region; formed on the first surface of the light-transmissive substrate; , a semiconductor light emitting device chip in which the second surface of the light-transmissive substrate is a window through which light generated in the active region is emitted; and a black matrix material provided on at least one of the first surface and the second surface.

(34) The first electrode and the second electrode are connected to the light-transmitting substrate, and the first electrode post is formed higher than the height of the semiconductor light emitting device chip on each of the first electrode and the second electrode connected to the light-transmitting substrate; and a second electrode post. ; Semiconductor light emitting device containing a.

(34) A semiconductor light emitting device including a black matrix material provided on the first surface and a non-conductive reflective film between the black matrix material and the first electrode and the second electrode.

(35) In a method of manufacturing a semiconductor light emitting device, each of which is interposed between an n-type semiconductor region, a p-type second semiconductor region, and an n-type semiconductor region and a p-type semiconductor region, and emits light using recombination of electrons and holes. preparing three semiconductor light emitting device chips having active regions for generating; And, combining three semiconductor light emitting device chips to a light-transmitting substrate having an adhesive layer; as, bonding the n-type semiconductor region of each of the three semiconductor light emitting device chips to be located on the side of the adhesive layer; How to make a device.

(36) Each of the three semiconductor light emitting device chips includes a first electrode in electrical communication with the n-type semiconductor region and a second electrode in electrical communication with the p-type semiconductor region, and in the bonding step, the three semiconductor light emitting device chips A method of manufacturing a semiconductor light emitting device in which a first electrode and a second electrode of each chip are coupled to be positioned on opposite sides of an n-type semiconductor region with respect to an active region.

(37) The n-type semiconductor region, the active region, and the p-type semiconductor region of each of the three semiconductor light-emitting device chips are sequentially grown using a growth substrate, and in the bonding step, the n-type semiconductor region of each of the three semiconductor light-emitting device chips A method of manufacturing a semiconductor light emitting device, wherein the region is bonded to the adhesive layer in a state where the growth substrate is removed.

(38) The first electrode and the second electrode of each of the three semiconductor light emitting device chips are connected on a light-transmitting substrate, and power is supplied to the three semiconductor light emitting device chips on the first electrode and the second electrode of each of the three semiconductor light emitting device chips. Forming a plurality of electrode posts to supply; further comprising a method for manufacturing a semiconductor light emitting device.

(39) A method for manufacturing a semiconductor light emitting device, wherein one of the plurality of electrode posts is a common electrode.

(40) The light-transmissive substrate has a first surface and a second surface opposite to the first surface, and forming a black matrix material on at least one of the first surface and the second surface; further comprising a semiconductor light emitting device. How to manufacture.

(41) In a method of manufacturing a semiconductor light emitting device, each of which is interposed between an n-type semiconductor region, a p-type semiconductor region, and an n-type semiconductor region and a p-type semiconductor region and generates light by recombination of electrons and holes. Preparing a plurality of semiconductor light emitting device chips having an active region and a light-transmitting substrate on which an n-type semiconductor region, an active region, and a p-type semiconductor region are placed; preparing a plurality of semiconductor light emitting device chips to which the light-transmitting substrate is coupled after the corresponding n-type semiconductor region, the corresponding active region, and the corresponding p-type semiconductor region are grown; coupling a plurality of semiconductor light emitting device chips to a first substrate; And, removing the light-transmitting substrate of each of the plurality of semiconductor light-emitting device chips by laser ablation; including, a method for manufacturing a semiconductor light-emitting device. Although three semiconductor light emitting device chips are illustrated in FIGS. 39 to 42, the manufacturing method according to the present disclosure can be extended to apply two or more semiconductor light emitting device chips, and the chip itself can emit ultraviolet, blue, green, and red light. However, it is also possible to use a form in which a phosphor or quantum dots (QDs) are applied to a chip that emits light of the same wavelength.

(42) bonding a second substrate to the plurality of semiconductor light emitting device chips on the side from which the light-transmitting substrate is removed; And, removing the first substrate; further comprising a method of manufacturing a semiconductor light emitting device.

(43) In the step of bonding to the first substrate, a method of manufacturing a semiconductor light emitting element, wherein the bonding is performed so that the n-type semiconductor region of each of the plurality of semiconductor light emitting element chips is located on the first substrate side.

(44) A method of manufacturing a micro-LED display having a plurality of pixels, each of which is interposed between an n-type semiconductor region, a p-type semiconductor region, and an n-type semiconductor region and a p-type semiconductor region, and recombination of electrons and holes An active region that generates light using a first electrode and a second electrode that function as bonding pads and are electrically connected to the n-type semiconductor region and the p-type semiconductor region, respectively, and the n-type semiconductor region, the active region, and the p-type semiconductor region. preparing a plurality of semiconductor light emitting devices having a substrate on which regions are placed; and placing a plurality of semiconductor light emitting devices on one of the plurality of pixels.

(45) The substrate is a light-transmitting substrate, and in the step of placing on the pixel, the first electrode and the second electrode are located on the pixel side, and the substrate has the first electrode and the second electrode with reference to the n-type semiconductor region, the active region, and the p-type semiconductor region. Located on the opposite side of the second electrode, a method of manufacturing a micro-LED display.

(46) A method for manufacturing a micro-LED display, wherein the first electrode and the second electrode are provided on a substrate on which an n-type semiconductor region, an active region, and a p-type semiconductor region are not formed.

(47) A method for manufacturing a micro LED display, wherein at least one semiconductor light emitting element among a plurality of semiconductor light emitting elements has two light emitting parts on a corresponding substrate.

(48) A method for manufacturing a micro-LED display, wherein at least one semiconductor light emitting element among a plurality of semiconductor light emitting elements has a non-light emitting element on a corresponding substrate.

(49) The substrate has a conductive portion coupled to each of the first electrode and the second electrode, and in the step of placing on the pixel, the substrate is positioned on the pixel side, and the n-type semiconductor region, the active region, and the p-type semiconductor region are referenced. A method for manufacturing a micro-LED display, wherein the first electrode and the second electrode are positioned on the substrate side.

(50) A method of manufacturing a micro LED, wherein the n-type semiconductor region of each of the plurality of semiconductor light emitting elements is located on the opposite side of the first electrode and the second electrode with respect to the active region.

(51) A method of manufacturing a micro-LED display comprising a black matrix in an n-type semiconductor region.

(52) In the step of preparing a plurality of semiconductor light emitting devices, the n-type semiconductor region, active region, and p-type semiconductor region are fixed to the light-transmitting substrate by a light-transmitting adhesive layer, and the n-type semiconductor region, active region, and p-type semiconductor region are fixed to the light-transmitting substrate. A method of manufacturing a micro-LED display comprising a step of removing the light-transmitting adhesive layer to expose the light-transmitting substrate while being fixed to the light-transmitting adhesive layer, wherein a first electrode and a second electrode are formed after the light-transmitting adhesive layer is removed.

(53) A method for manufacturing a micro-LED display in which a light-transmitting electrode is provided on the p-type semiconductor region in the process of removing the light-transmitting adhesive layer.

(54) A plurality of semiconductor light emitting devices each including an n-type semiconductor region, a p-type semiconductor region, and an active region interposed between the n-type semiconductor region and the p-type semiconductor region and generating light by recombination of electrons and holes. preparing chips; placing a plurality of semiconductor light-emitting device chips on a light-transmitting substrate having a light-transmitting adhesive layer; removing the light-transmitting adhesive layer to expose the light-transmitting substrate; A method of manufacturing a semiconductor light emitting device comprising: forming a first electrode and a second electrode electrically connected to the n-type semiconductor region and the p-type semiconductor region, respectively.

(55) A method for manufacturing a semiconductor light-emitting device, wherein a light-transmitting electrode is provided over the p-type semiconductor region in the step of removing the light-transmitting adhesive layer.

According to the method for manufacturing a semiconductor light emitting device according to the present disclosure, a flip chip semiconductor light emitting device having high mass productivity can be provided with improved yield and reliability. In particular, when applied to mini-LEDs or micro-LEDs, its mass productivity can be significantly increased. According to the semiconductor light emitting device according to the present disclosure, the structural inclination of the first electrode and the second electrode functioning as a bonding pad of a flip chip ( height difference) can be reduced. As a result, the direction of light emitted from the semiconductor light emitting device can be uniformly adjusted, and finally, light quality in applications such as displays and lighting can be improved.

According to the semiconductor light emitting device according to the present disclosure, it is possible to manufacture a package for a mini or micro LED in which all of the RGB chips are configured as p-side up flip chips while ensuring the reliability of the device.

According to the semiconductor light emitting device according to the present disclosure, a mini or micro LED package (so-called, inter pose) can be provided.

Reference Signs List 1: light-transmitting substrate, 2: first semiconductor region, 3: active region, 4: second semiconductor region, 5: insulating layer, 6: current diffusion electrode, 7: first electrode, 8: second electrode, 20: growth numerals 30: first semiconductor region, 40: active region, 50: second semiconductor region, 60: protective layer, 70: first light-transmitting substrate, 80: second light-transmitting substrate, 92: first electrode, 93: second electrode

Claims (5)

In the method of manufacturing a semiconductor light emitting device,
An n-type semiconductor region, a p-type semiconductor region, an active region interposed between the n-type semiconductor region and the p-type semiconductor region and generating light by recombination of electrons and holes, and an n-type semiconductor region, an active region, and a p-type semiconductor region. Preparing a plurality of semiconductor light-emitting device chips having a second light-transmitting substrate on which a type semiconductor region is placed; wherein, in at least one semiconductor light-emitting device among the plurality of semiconductor light-emitting device chips, the second light-transmitting substrate is the n-type semiconductor region. preparing a plurality of semiconductor light emitting device chips, which are coupled after the active region and the p-type semiconductor region are grown;
coupling a plurality of semiconductor light emitting device chips to a first substrate; and,
Removing the second light-transmitting substrate of each of the plurality of semiconductor light emitting device chips by laser ablation;
In the step of preparing a plurality of semiconductor light emitting device chips, the n-type semiconductor region, the active region, and the p-type semiconductor region are grown on the second light-transmissive substrate in at least one semiconductor light emitting device among the plurality of semiconductor light emitting device chips. After being merged, the process of combining is:
growing the n-type semiconductor region, the active region, and the p-type semiconductor region on a growth substrate;
coupling a first light-transmissive substrate to the p-type semiconductor region;
separating the growth substrate from the n-type semiconductor region side;
coupling the second light-transmissive substrate to the n-type semiconductor region; and,
Separating the first light-transmitting substrate from the p-type semiconductor region side,
A sacrificial layer is provided on at least one of the first light-transmitting substrate and the second light-transmitting substrate;
A method of manufacturing a semiconductor light emitting device, wherein at least one of the plurality of semiconductor light emitting device chips subjected to the bonding process is coupled to the first substrate. The method of claim 1,
The sacrificial layer,
A method for manufacturing a semiconductor light emitting device formed of a crystalline compound. The method of claim 2,
The sacrificial layer,
A method for manufacturing a semiconductor light emitting device formed of an oxide semiconductor or a nitride semiconductor compound. The method of claim 1,
bonding a second substrate to a plurality of semiconductor light emitting device chips on the side from which the second light-transmitting substrate is removed; and,
A method of manufacturing a semiconductor light emitting device further comprising; removing the first substrate. The method of claim 1,
A method of manufacturing a semiconductor light emitting device, wherein in the bonding to the first substrate, the p-type semiconductor region of each of the plurality of semiconductor light emitting device chips is coupled to the first substrate.

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