KR20190045121A - Method and apparatus for managing data of non-volatile memory in hybrid main memory system - Google Patents

Abstract

According to the present invention, a method for operating a data server system comprises the following steps of: storing valid cache data of a first memory module in accordance with a flush operation in a second memory module; generating random cache data in response to an invalidation request for the valid cache data in the second memory module; and overwriting the valid cache data with the random data in the second memory module. The first memory module includes a DRAM, the second memory module includes a NAND flash memory, and the random data is generated from pieces of data corresponding to a writable state with respect to a value of a current state corresponding to the valid cache data. According to the present invention, it is possible to invalidate data stored in a non-volatile memory, especially, personal data, thereby efficiently protecting the personal data.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method and apparatus for managing data in a non-volatile memory of a hybrid main memory system,

The present invention relates to a method and an apparatus for managing data in a nonvolatile memory of a hybrid main memory system. More particularly, to a method of invalidating data stored in a nonvolatile memory of a hybrid main memory system by applying a duty to delete to a nonvolatile memory and an apparatus performing the method.

Recently, interest in the protection of personal information is growing. This interest has led to the Personal Information Protection Law. In Korea, the Personal Information Protection Act was enacted in 2011, and the European Commission adopted the General Data Protection Regulation on April 27, 2016. In accordance with Article 65 of the European Privacy Act, the subject of personal information specifies that, except in a few exceptions, it may ask for the deletion of personal information that does not fit the purpose.

In the United States, freedom of expression in Article 1 of the Constitution was more emphasized than privacy, but President Obama in 2012 "Protecting personal information in a networked environment: a basic idea for promoting privacy and innovation in the global digital economy" And "Information Privacy in Network World: A Fundamental Idea for Privacy Protection and Innovation Promotion in the Global Digital Economy".

Through this global trend of change, we can see that mandatory deletion of personal information is no longer necessary to provide services. Of course, the so-called right to be forgotten, the range of personal information that may be requested for deletion may vary. However, the current trend is that the subject of personal information can request the deletion of his / her personal information.

When a subject of personal information requests deletion of his or her personal information, a company that manages personal information, or a company that provides services using personal information, must "delete" the duty to delete it on his / . However, in general, even if personal information is deleted from the memory, the deleted information is often left in the memory. As described above, there has been a case where the deleted information can be recovered by digital forensics.

Therefore, a separate data management method capable of invalidating data in the memory of the hybrid main memory system is required. There is a need for a separate data management method capable of invalidating data in a nonvolatile memory such as a hard disk that can keep stored information even when power is not supplied.

KR 2015-0112076 A " Hybrid memory device, memory system including it and method of processing data thereof " (2015.10.07) US 2007-0276995 A1 "Hybrid solid state disk drive with controller" (2007.11.29)

SUMMARY OF THE INVENTION It is an object of the present invention to provide a method for managing data in a nonvolatile memory of a hybrid main memory system and an apparatus for performing the method.

The technical problems of the present invention are not limited to the above-mentioned technical problems, and other technical problems which are not mentioned can be clearly understood by those skilled in the art from the following description.

A method of operating a data server system including a first memory module, a second memory module, and a central processing unit controlling the first and second memory modules, according to an embodiment of the present invention, Storing effective cache data of a first memory module according to a flush operation; Generating random cache data in response to an invalidation request for the valid cache data in the second memory module; And overwriting the valid cache data with the random data in the second memory module, wherein the first memory module includes a Dynamic Random Access Memory (DRAM), and the second memory module includes a NAND flash memory And the random data is generated from data corresponding to a writable state based on a value of a current state corresponding to the valid cache data.

In an embodiment, the first and second memory modules are connected to the central processing unit by a double data rate (DDR) interface.

In an embodiment, the valid cache data may include cache data having private information and a management bit indicating validity of the cache data.

In an embodiment, overwriting with the random data may include overwriting a portion of the valid cache data with the random data.

In an embodiment, the data server system may include a relational database management system (RDBMS).

According to the present invention, data stored in a nonvolatile memory of a hybrid main memory system, particularly personal information, can be more reliably invalidated. This protects personal information efficiently and safeguards personal information even if unexpected accidents such as hacking occur.

The effects of the present invention are not limited to the effects mentioned above, and other effects not mentioned can be clearly understood to those of ordinary skill in the art from the following description.

1 is a view for explaining a hybrid main memory system.
2 is a diagram for explaining a method of managing data stored in a nonvolatile memory.
3 is a diagram for explaining a method of managing data stored in a nonvolatile memory according to an embodiment of the present invention.
4 is a diagram for explaining an apparatus for managing data stored in a nonvolatile memory according to an embodiment of the present invention.
5 is a diagram for explaining a random data generating process of a NAND flash memory according to an embodiment of the present invention.
6 is a diagram for explaining a method of managing data stored in a nonvolatile memory according to another embodiment of the present invention.

While the invention is susceptible to various modifications and alternative forms, specific embodiments thereof are shown by way of example in the drawings and will herein be described in detail. It should be understood, however, that the invention is not intended to be limited to the particular embodiments, but includes all modifications, equivalents, and alternatives falling within the spirit and scope of the invention. Like reference numerals are used for like elements in describing each drawing. The terms first, second, A, B, etc. may be used to describe various elements, but the elements should not be limited by the terms. The terms are used only for the purpose of distinguishing one component from another. For example, without departing from the scope of the present invention, the first component may be referred to as a second component, and similarly, the second component may also be referred to as a first component. And / or < / RTI > includes any combination of a plurality of related listed items or any of a plurality of related listed items. It is to be understood that when an element is referred to as being "connected" or "connected" to another element, it may be directly connected or connected to the other element, . On the other hand, when an element is referred to as being "directly connected" or "directly connected" to another element, it should be understood that there are no other elements in between. The terminology used in this application is used only to describe a specific embodiment and is not intended to limit the invention. The singular expressions include plural expressions unless the context clearly dictates otherwise. In the present application, the terms "comprises" or "having" and the like are used to specify that there is a feature, a number, a step, an operation, an element, a component or a combination thereof described in the specification, But do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, or combinations thereof. Unless defined otherwise, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. Terms such as those defined in commonly used dictionaries are to be interpreted as having a meaning consistent with the contextual meaning of the related art and are to be interpreted as either ideal or overly formal in the sense of the present application Do not.

Hereinafter, preferred embodiments according to the present invention will be described in detail with reference to the accompanying drawings.

1 is a view for explaining a hybrid main memory system. 1, the hybrid main memory system 100 includes at least one first memory module 120 having a central processing unit (CPU) 110 and a dynamic random access memory (DRAM) And at least one second memory module 130 having a non-volatile memory (NVM).

The central processing unit 110 may be implemented to control the overall operation of the main memory system 100. In an embodiment, the central processing unit 100 may include at least one processor, a graphics processing unit (GPU), a memory controller, and the like. Here, the processor may comprise a general purpose microprocessor, a multicore processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), or a combination thereof.

The first memory module 120 may be configured to temporarily store data required to perform operations of the central processing unit 110. [ In an embodiment, the first memory module 120 may be coupled to the central processing unit 110 in accordance with DDRx (double data rate, where x is a generation means, e.g., x may be 4, 5, etc.) Can be connected. However, the interface of the present invention is not limited thereto.

The second memory module 130 can be implemented so as to keep the stored information even when power is not supplied. In an embodiment, the second memory module 130 may be coupled to the central processing unit 110 in accordance with a DDRx interface. However, the interface of the present invention is not limited thereto.

For example, the second memory module 130 may be a non-volatile memory (NVMe), a peripheral component interconnect (PCIe), a serial advanced technology attachment (SATA), a small computer system interface ), UAS (Universal Storage Bus (USB) attached SCSI), Internet Small Computer System Interface (iSCSI), Fiber Channel, and Fiber Channel over Ethernet (FCoE).

In an embodiment, the second memory module 130 may include, for example, a nonvolatile dual in-line memory module (NVDIMM), a solid state drive (SSD), a universal flash storage (UFS) Such as a secure digital (SD) card, a dynamic random access memory (DRAM), a static random access memory (SRAM), a nand flash memory, a vertical nand flash memory, a phase random access memory (PRAM) have.

The central processing unit 110 can access the data more quickly through the cache of the first memory module 120. [ If the central processing unit 110 does not use the cache for a predetermined time, the data stored in the cache of the first memory module 120 is transferred to the second memory module 130 by the cache policy. This is called a flush process.

After the flushing process, the data remains in nonvolatile memory. On the other hand, the cache operation of the hybrid main memory 100 of the present invention will not be limited thereto. It should be understood that the cache operation of the hybrid main memory 100 can be variously implemented. For example, the central processing unit 110 may simultaneously transmit the cache necessary for operation to the first memory module 120 and the second memory module 130. [

In addition, the cache stored in the second memory module 130 may be managed by the central processing unit 110 in the future. At this time, the central processing unit 110 can update the valid / invalid bit of the cache stored in the second memory module 130 to manage the cache. That is, the actual data is not deleted, but the cache can be managed by updating only the bits related to the validity of the data.

2 is a diagram for explaining a method of managing data stored in a nonvolatile memory. Referring to FIG. 2, it can be seen that cache 5 and cache 6 are stored in the second memory module 130 in a valid state. At this time, when an invalidation request is received for the cache, the central processing unit 110 updates only the bits related to the validity of the cache 5 and the cache 6 of the second memory module 130 to invalid. In other words, the actual data is still stored as it is.

In an embodiment, the revocation request may be a request associated with a de-identification technique. Such non-identification techniques include pseudonymization, heuristic pseudonymization, encryption, exchange, aggregation, partial sum, rounding, reordering, data reduction, Data suppression, random rounding, range method, control rounding), data masking (random noise addition, blank and substitute).

In the embodiment, the invalidation request may be transmitted from the central processing unit 110 to the second memory module 130 in the form of a command including a non-identifying data-related address, a non-identifying technology type, and the like. Although not shown, the second memory module 130 may send information to the central processing unit 110 that the non-identifying action has been completed after the non-identifying action.

When the cache is managed as described above, the original data stored in the cache 5 and the cache 6 can be recovered even if the bit for validity is invalidated by the digital forensic later. That is, when the worst situation such as hacking occurs, leakage of personal information may occur. In order to solve this problem, it is necessary to manage not only the bits related to the validity but also the data.

3 is a diagram for explaining a method of managing data stored in a nonvolatile memory according to an embodiment of the present invention. Referring to FIG. 3, in the method of managing data stored in the second memory module 130 proposed in the present invention, when receiving a cache invalidation request, not only the bit for managing the validity is changed, . At this time, the new value to be stored in the cache data is a randomly generated value.

By changing the original data to the value arbitrarily generated, the individual information can be efficiently managed. Particularly, personal information can be more reliably invalidated in the second memory module 130. This protects personal information efficiently and safeguards personal information even if unexpected accidents such as hacking occur.

At this time, if the second memory module 130 is an overwritable memory such as a PRAM, an MRAM, a ReRAM, and a 3DXpoint memory, random random data can be generated and the cache data can be changed. However, when the second memory module 130 is a non-overwritable memory such as a NAND flash memory, the original cache data can be changed by generating random cache data in a limited environment. A more detailed explanation will be given later.

4 is a diagram for explaining an apparatus for managing data stored in a nonvolatile memory according to an embodiment of the present invention. Referring to FIG. 4, the data management apparatus of the second memory module 130 proposed by the present invention may include a memory controller 210 and a non-volatile memory unit 230. The memory controller 210 may include a DDN processing unit 220. Here, DDN refers to a separate processing unit for applying duty to delete to a non-volatile memory.

The DDN processing unit 220 of the memory controller 210 may generate the random data 221 in response to the invalidation request. Here, the invalidation request may include address information on which data of the non-volatile memory unit 230 is to be invalidated. After generating the random data 221, the DDN processing unit 220 can overwrite the random data 221 in the actual space of the corresponding address of the nonvolatile memory unit 230.

At this time, the process of overwriting the random data 221 according to the type of the nonvolatile memory unit 230 can be largely divided into two processes. In the case where the non-volatile memory unit 230 is an overwritable memory such as a PRAM, an MRAM, a ReRAM, or a 3DX memory, the random data 221 can be generated using a random number. In this case, random numbers can be generated using a random number generator. After generating the random data 221 using the random number, the random data 221 can be overwritten in the actual space. Then, the central processing unit 110 can be informed that the invalidation request has been completed.

On the other hand, when the non-volatile memory unit 230 is a non-overwritable memory such as a NAND memory, it is impossible to generate data using a random number like an overwritable memory, and random data 221 must be generated in a limited environment. That is, after the actual cache data of the invalidation target memory is read, the random data 221 is generated based on the read cache data. After generating the random data 221 based on the value of the actual cache data, the random data 221 is overwritten in the actual space. Then, the central processing unit 110 can be informed that the invalidation request has been completed.

That is, the method of generating the random data 221 may vary depending on the type of the non-volatile memory unit 230. However, after generating the random data 221, the value of the validity bit is changed from valid to invalid, and the personal information can be completely invalidated by overwriting the actual data with the random data 221 have.

The data management method of the second memory module 130 proposed by the present invention is compared with a general data management method, as shown in the following Table 1.

Read time Write time Random Data Gen. time Erase time GC Overhead DDN Process 0.049 ms 0.6 ms <0.1 ms None None Prior Erase 4ms Non-expected

The data management method of the second memory module 130 proposed by the present invention should include both reading and writing time of the memory when the second memory module 130 is a non-overwritable memory. For example, NAND flash memory is non-overwritable and requires more time to read data. For example, for a 3D NAND flash memory with a value in Table 1, the page read time is less than 0.049 ms, Write time is less than 0.6 ms. It is less than 1 ms including the time for generating the random data 221. On the other hand, a typical data management method takes about 4 ms in erase time.

In addition, common data management methods require additional load due to garbage collection (GC). That is, when the data management method of the second memory module 130 proposed in the present invention is used as compared with the general data management method, the time and cost consumed in invalidating the data can be reduced.

5 is a diagram for explaining a random data generating process of a NAND flash memory according to an embodiment of the present invention. Referring to FIG. 5, in the case of the NAND flash memory, the random data 221 that can be generated at present depends on the originally stored data. For example, if the current data has a value of S5 " 100 ", the random data 221 can be generated only from the values S6, S7 and S8 of the states after the corresponding S5. On the other hand, it should be understood that the data corresponding to the states shown in Fig. 5 are not limitative of the present invention as one embodiment.

This is because the NAND flash memory writes and erases data on a cell-by-cell basis. That is, in the S5 state of the NAND flash memory, only the data in the states S6, S7 and S8 can be written unless data is erased. That is, if the data of the cell is erased, it is possible to return to the S1 state. Therefore, the random data 221 is generated from the data that can be written based on the current state S5.

In the case of the NAND flash memory, the process of generating and writing the random data 221 based on the current state value is more efficient in terms of time and cost than erasing the data and returning to the S1 state.

6 is a diagram for explaining a method of managing data stored in a nonvolatile memory according to another embodiment of the present invention. Referring to FIG. 6, it is possible to partially overwrite original cache data (original cache data) which need to be invalidated, in addition to overwriting all of the original cache data with random data 221. This is because it is impossible to restore complete personal information even if partially overwritten.

In this case, non-random data can be utilized instead of random data. That is, the value of specific data such as " 000 " or " 111 " At this time, it is possible to overwrite the entire target area as shown in FIG. 6 (a), and only the half area as shown in FIG. 6 (b) It is also possible.

Also, after the cache data is stored in the non-volatile memory 130 after the flushing process, the cache data may be automatically invalidated when a predetermined time has elapsed. At this time, the cache data can be invalidated using the random data proposed in the present invention.

Meanwhile, the present invention is applicable to a data server. A data server system according to an embodiment of the present invention may include a relational database management system (RDBMS), a cache server, and an application server. The cache server may include a key value storage for holding and deleting different key, value pairs in response to the invalidation notification from the database management system. At least one of the database management system (RDBMS), the cache server, and the application server can be implemented with the technique of invalidating the nonvolatile memory described in Figs.

While the present invention has been described in connection with what is presently considered to be practical exemplary embodiments, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, You will understand. It is therefore to be understood that the above-described embodiments are illustrative in all aspects and not restrictive.

100: Hybrid main memory system
110: central processing unit (CPU)
120: first memory module
130: second memory module
210: memory controller
220: DDN processor
230: Nonvolatile memory unit

Claims (6)

A method of operating a data server system including a first memory module, a second memory module, and a central processing unit controlling the first and second memory modules,
Storing effective cache data of a first memory module according to a flush operation in the second memory module;
Generating random cache data in response to an invalidation request for the valid cache data in the second memory module; And
And overwriting the valid cache data with the random data in the second memory module,
The first memory module includes a dynamic random access memory (DRAM)
Wherein the second memory module includes a NAND flash memory,
Wherein the random data is selected among values that can be generated after the value of the current state corresponding to the valid cache data. The method according to claim 1,
Wherein the first and second memory modules are coupled to the central processing unit by a Double Data Rate (DDR) interface. The method according to claim 1,
Wherein the valid cache data comprises cache data having private information and a management bit indicating validity of the cache data. The method according to claim 1,
Wherein overwriting with the random data comprises:
And overwriting a portion of the valid cache data with the random data. The method according to claim 1,
Wherein the data server system comprises a relational database management system (RDBMS). 6. The method according to any one of claims 1 to 5,
Wherein a flush operation is performed in which data stored in the cache of the first memory module is transferred to the second memory module if the central processing unit does not use the cache for a predetermined time.

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