KR20170064735A

KR20170064735A - Integrated simulation architecture

Info

Publication number: KR20170064735A
Application number: KR1020150170561A
Authority: KR
Inventors: 천이진; 최종욱
Original assignee: 한국항공우주연구원
Priority date: 2015-12-02
Filing date: 2015-12-02
Publication date: 2017-06-12

Abstract

The integrated simulation architecture according to the present invention includes a mounting computer on which a real or simulated computer can be mounted for satellite performance verification; A simulation host outside the on-board computer for performing a complicated algorithm simulation of actual hardware or simulation hardware connected to the on-board computer and connected to the input / output device of the onboard computer; A control host for controlling input / output values to be changed in accordance with test scenarios and events established in connection with the mounting computer and the simulation host; And an Ethernet interface for providing a communication interface between the mounting computer, the simulation host, and the control host, so that the hardware input / output of the system can be modified to easily simulate the actual operating environment, Hardware model can be mixed.

Description

Integrated Simulation Architecture {INTEGRATED SIMULATION ARCHITECTURE}

The present invention relates to an integrated simulation architecture, and more particularly, to an integrated simulation architecture capable of simulating a hardware unit and an interface connected thereto to maintain real-time characteristics of a system under test composed of actual hardware and a simulation hardware model. Simulation architecture.

In general, performance is verified during satellite assembly and test periods for successful satellite operation on orbit, and many tests are performed for performance verification. Many methods and techniques are used to verify satellite performance.

One of them is to verify satellite performance using satellite design and analysis tools. It is easy to perform the performance verification by using these tools, but it is difficult to accurately reflect the actual hardware characteristics in the test environment.

For example, while satellite systems are very complex systems operating in parallel, concurrent, and real-time, satellite design and analysis tools have difficulty reflecting such complexity, (sequence).

In other words, although the satellite system operates in a parallel, concurrent, and real-time relationship with multiple operations, the satellite design and analysis tool uses the output as an input of the next operation after one operation, And the like.

Another method is to verify the system using an electrical / electronic engineering test bed constructed using an actual hardware model as shown in FIG. 1 to reflect the real time characteristics as it is.

Using real hardware or similar hardware model can maximize real-time environment with hardware characteristics in test and verification.

However, the actual hardware will continue to run if there are no events that cause the hardware to stop running, such as reset or halt, so you can stop, stop, or restart the test procedure to monitor system parameters or monitor trends. And the like.

In addition, since it is necessary to use the actual hardware model, it is costly to construct the test bed for verification, and even if one user uses only one hardware, not all of the verification test bed, have.

Korean Patent Registration No. 10-0289804 (June 20, 2001)

In order to solve the above-described problems, the present invention provides an integrated simulation architecture capable of simulating a hardware unit and an interface connected thereto to maintain real-time characteristics of a test target system constituted by real hardware and a simulation hardware model .

According to an aspect of the present invention, there is provided an integrated simulation architecture comprising: a mounting computer on which an actual or simulation computer can be mounted for verifying satellite performance; A simulation host outside the on-board computer for performing a complicated algorithm simulation of actual hardware or simulation hardware connected to the on-board computer and connected to the input / output device of the onboard computer; A control host for controlling input / output values to be changed in accordance with test scenarios and events established in connection with the mounting computer and the simulation host; And an Ethernet interface for providing a communication interface between the mounting computer, the simulation host, and the control host.

Preferably, the integrated computer of the integrated simulation architecture according to the present invention for achieving the above-mentioned object comprises: an operating system mounting unit mounted with an operating system for operating the mounting computer; A software I / O stub activated through a command interface and modifying the input / output of the system under test according to a user's request or scenario; And a software loading unit for having a plurality of application software and calling the software input / output server to change a value of a driver required in the simulation; And a mapper 130 for exchanging data between the software loading unit and the sub-server.

The integrated simulation architecture according to the present invention can modify the hardware input / output of the system so that it can easily simulate the actual operating environment, and it is possible to mix the actual hardware and the simulation hardware model.

1 is a schematic diagram of a conventional simulation architecture,
2 is a block diagram of an integrated simulation architecture in accordance with the present invention for an on-board computer,
Figure 3 is a block diagram of an integrated simulation architecture in accordance with the present invention for a simulated computer;
FIG. 4 is a software I / O server and an external control host structure having an embedded simulation function of the integrated simulation architecture according to the present invention,
FIG. 5 is a software I / O server and an internal control host structure having an embedded simulation function of the integrated simulation architecture according to the present invention,
FIG. 6 is a software I / O server structure diagram having an external simulation function of the integrated simulation architecture according to the present invention, and FIG.
7 is a data exchange structure diagram between the embedded software and the slave server using the mapper of the integrated simulation architecture according to the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. Prior to this, terms and words used in the present specification and claims should not be construed as limited to ordinary or dictionary terms, and the inventor should appropriately interpret the concept of the term appropriately in order to describe its own invention in the best way. The present invention should be construed in accordance with the meaning and concept consistent with the technical idea of the present invention.

Therefore, the embodiments described in this specification and the configurations shown in the drawings are merely the most preferred embodiments of the present invention and do not represent all the technical ideas of the present invention. Therefore, It is to be understood that equivalents and modifications are possible.

Figure 2 is a block diagram of an integrated simulation architecture in accordance with the present invention for an actual on-board computer, and Figure 3 is a block diagram of an integrated simulation architecture in accordance with the present invention for a simulated computer.

2 and 3, the integrated simulation architecture according to the present invention includes a mounting computer 100, an Ethernet interface 200, a simulation host 300, and a control host 400.

The mounting computer 100 may be an actual mounted computer or a simulated computer simulated by software.

The mounting computer 100 includes a software I / O stub 110, a software loading unit 120, a mapper 130, and a real-time operating system 140.

The software input / output server 110 may modify the input / output of the system according to the user's request or scenario.

Since the software input / output sub-shelf 110 is not part of the embedded software that is typically stored in the non-volatile memory, it may be activated via the command interface if it needs to be used for performance verification.

The loading software places the software input / output shelf 110 at a suitable location and has hooks for it so that it can modify the input / output of a specific hardware unit and interface connected thereto for required performance verification If you do, you can do it.

When the integrated simulation architecture according to the present invention is deactivated, the software input / output server 110 uses a minimum amount of time so as not to affect normal loading software execution.

2, the software input / output circuit 110 is located in the memory of the mounting computer 100 and is connected to the Ethernet interface 200, which is a communication interface, To the simulation host (300).

3, the floating point unit (FPU), a read only memory (ROM), a random access memory (RAM), an IU (Integer Unit), and an interrupt controller The important components of the on-board computer 100, such as those described above, are emulated.

When the simulation of the mounting computer 100 is completed,

The architecture architecture is also similar to the integrated simulation architecture of real-world computers.

That is, the integrated simulation architecture according to the present invention is located in the simulation computer and connects to the external simulation host 300 through the Ethernet interface 200, which is a communication interface.

As described above, the reason why the simulation host 300 is placed outside is that, in the case of simulation, a complicated algorithm and a memory required for execution are large. On the other hand, in a case of a mounted computer, memory resources are limited, The basic input / output of the mounting computer 100 is influenced, so that only a minimum interface, that is, a mechanism related to communication and input / output correction, is implemented in the mounting computer 100.

Since the integrated simulation architecture according to the present invention has the purpose of minimizing the use of actual hardware in performance verification, it is possible to appropriately modify the input / output of the system according to the user's requirement or the test scenario.

Basically, the integrated simulation architecture must be able to read or export sensor values, and provide hardware I / O interfaces to the embedded software so that the software can perform error free.

The following are the basic features to consider in designing and implementing a unified simulation architecture:

First, the integrated simulation architecture can change input data of a sensor used in a system such as a gyro, an accelerometer, a star tracker, and a solar sensor to simulate actual operating values.

In addition, the integrated simulation architecture can change output data of drivers such as reaction wheel, thruster, and magnetic field talker to simulate actual operation.

In addition, the integrated simulation architecture can simulate the environment in which the system operates in response to internal or external forces acting on satellites, tokers, and the like, in a manner similar to a sensor actually mounted.

In addition, the integrated simulation architecture has an input and output filtering function, and the input and output can be simulated and modified only for the sensors selected for the specific test by the input and output filtering unit 112.

In addition, the integrated simulation architecture must have a real-time command interface for control, and control is performed through the control host 400 connected to the communication interface as shown in FIG. 2 and FIG.

In addition, the integrated simulation architecture should be able to change input / output values according to test scenarios or events set by time, and such control is also performed through the control host 400.

In addition, the integrated simulation architecture should provide diagnostic telemetry data for monitoring the system or debugging the test, and control of monitoring and debugging is performed through the control host 400. [

In addition, the basic functions of the integrated simulation architecture may be added according to the system to be applied. However, importantly, the structure of the software input / output system 110 mounted on the mounting computer 100 must be designed simply, And the remaining additional functions are preferably disposed in the simulation host 300 or the control host 400. [

FIGS. 4, 5, and 6 are views for explaining in detail the software input / output surge of the integrated simulation architecture according to the present invention.

The software input / output server 110 includes a server server 111 and an input / output filtering unit 112.

The surveillance server 111 is connected to an application software layer of the software installation unit 120 and modifies a value input to the sensor in a required simulation and transmits the modified value to the application software layer of the software installation unit 120 do.

The application software layer of the software loading unit 120 has a structure for calling up the sub server 111 and changing the value of the driver required in the simulation.

The input / output filtering unit 112 includes filtering selection information for a specific input / output, so that simulation can be controlled for a specific input / output.

That is, the input / output filtering unit 112 allows the simulation to be implemented as part of the software input / output surge 110 when the test is a very small part or only a part of the system characteristics is required, And filtering is performed in the simulation host 300.

The server server 111 may be configured in various ways depending on the complexity of the simulation or the simulation environment for determining the operation of the system.

That is, in the present invention, the structure of the control host 400 outside the server 111 of the software input / output server 110 having the embedded simulation function, the structure of the external control host 400, the structure of the software input / output server 110 having the embedded simulation function Output server 110 having a structure of the control server 400 and a structure of the control host 400 inside the server 111 and a function of the server 111 of the software input / output server 110 having an external simulation function.

In the present invention, the structure of the surveillance server 111 having the simulation function in the mounting computer 100 will be described irrespective of the actual mounted computer and the simulated mounted computer.

First, if the test using the integrated simulation architecture is a small portion or only a part of the system characteristics are required, the simulation can be implemented as part of the software input / output server 110.

That is, a test environment simulation may be embedded in the software input / output server 110 as shown in FIGS.

For example, this structure can be applied when the integrated simulation architecture is not required to perform a full simulation on the system environment, and only the sensors and actuators of the attitude control need to perform input / output modification.

Apart from the simulation function, the control host 400 can be placed inside or outside.

There is an advantage that the complexity of the design for providing a complicated interface can be reduced while the simulation host 300 is externally located. On the other hand, since the limited memory resources of the mounting computer 100 must be used, the simulation function may be limited.

However, when the on-board computer 100 uses the on-board computer, the memory resources of the host on which the on-board computer is executed can be used to the maximum extent. However, in this case, performance of the simulation computer may deteriorate, so it is important to select an appropriate simulation function.

The structure of the embedded simulator 113 and the external control host 400 of the software input / output circuit 110 having the embedded simulation function is as shown in FIG. 4, and the embedded simulator 113 having the embedded simulation function The structure of the control host 400 inside is as shown in FIG.

If a test using the integrated simulation architecture according to the present invention needs to deal with a complex scenario in order to verify the system performance or each process used in the test requires a response of a complicated system, The structure of the simulation host 300 and the software input / output servoval 110 is shown in FIG. 6 so that simulation is performed externally due to memory resources and processing capability.

When the above structure is used, the server server 111 must have a connection structure with the application software layer of the software loading unit 120, and connected to the external simulation host 300 through the Ethernet interface 200, And may be connected to an external control host 400 for input / output filtering or the like so as to exchange data.

The structure of the sub server 111 having the simulation host 300 on the outside may require complexity because the complexity increases when the functional implementation is concerned, so the functions should be unitized and the data exchange between the functions should be minimized.

In general, the mounting software in which the operating part of the system is implemented allows direct access or control of the input and output channels to the sensor or driver.

However, when using the integrated simulation architecture according to the present invention,

The output is blocked from directly accessing or controlling by the software input / output ceiling 110 for simulation for performance verification.

Therefore, if necessary, the mounting software should be able to access or control the hardware I / O channel, and I / O modification should be done through the integrated simulation architecture.

7, in order to satisfy the above-mentioned requirement, a mapper structure including a mapper 130 for exchanging data between the software loading unit 120 and the server server 111, as shown in FIG. 7, based architecture.

For example, in the mapper-based structure, the mapper 130

The input / output channel of the actual hardware is not directly accessed by the mounting software, but the data stored in the mapper 130 is used.

To this end, the server server 111 maintains the mapper 130 so that it has the most recent value periodically or non-periodically according to a test scenario.

The use of the mapper 130 minimizes the software dependency between the mounting software and the server server 111.

For example, it is possible to write additional information in the mapper 130. For example, when the software server 110 is called from the application software layer of the software installed in the software loading unit 120, And the driver output can be transmitted to the simulation host 300 outside the server via the server server 111.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments, but, on the contrary, It is to be understood that various modifications and changes may be made without departing from the scope of the appended claims.

100: mounted computer
110: Software I / O Surveillance
111: Subtab server
112: input / output filtering unit
113: Simulator
120: software loading unit
130: mapper
140: Operating system mounting part
200: Ethernet interface
300: Simulation host
400: Control host

Claims

A mounting computer 100 on which an actual or simulation mounted computer can be mounted for satellite performance verification;
A simulation host (300) external to the mounting computer (100) for performing a complicated algorithm simulation of actual hardware or simulation hardware connected to the input / output device of the mounting computer (100) in connection with the mounting computer (100);
A control host 400 for controlling input / output values to be changed according to test scenarios and events that are established and connected to the mounting computer 100 and the simulation host 300; And
And an Ethernet interface (200) for providing a communication interface between the mounting computer (100), the simulation host (300), and the control host (400).

The method according to claim 1,
The mounting computer 100
An operating system mounting unit 140 mounted with an operating system for operating the mounting computer 100;
A software I / O stub (110) activated through an instruction interface and modifying input / output of the system under test according to a user's request or scenario; And
And a software loading unit (120) having a plurality of application software and calling the software input / output server (110) to change a value of a driver required in the simulation.

3. The method of claim 2,
The software input / output sub-
A server server 111 connected to an application software layer of the software loading unit 120 and modifying a value input to the sensor in a required simulation and transferring the modified value to an application software layer of the software loading unit 120, ; And
The input / output filtering unit 112 (which can control the simulation so that the mounting computer 100 is simulated only for the specific input / output, including the filtering selection information for the specific input / output, and the complicated simulation is performed in the simulation host 300) ); &Lt; / RTI >

3. The method of claim 2,
When the mounting computer 100 is an actual mounted computer, the software input / output contactor 110 is located in the memory of the mounting computer 100 and is connected to the simulation host 300 through the Ethernet interface 200 A unified simulation architecture featuring.

3. The method of claim 2,
When the on-board computer 100 is a computer with a copy function, it is characterized in that the FPU (Floating Point Unit), ROM (Read Only Memory), RAM Random Access Memory, IU (Integer Unit) and interrupt controllers are emulated A unified simulation architecture.

3. The method of claim 2,
The simulator 113 is connected to the software input / output subcube 110 so that the simulation can be implemented as part of the software input / output subcube 110 when only a part of the actual hardware or simulation hardware characteristics connected to the mounting computer 100 is needed Integrated simulation architecture that is built-in.

The method according to claim 6,
Wherein the control host (400) is embedded in the software input / output shelf (110).

3. The method of claim 2,
The software input / output supervisor 110 may be configured to process the complex scenario of the actual hardware or simulation hardware connected to the on-board computer 100, or to perform the simulation in the case where a complicated system response is required, (300) and the Ethernet interface (200).

The method of claim 3,
The mounting computer 100
And a mapper (130) for exchanging data between the software loading unit (120) and the server server (111).

5. The method of claim 4,
The sub-server (111)
The mapper 130 is maintained so as to have the latest value periodically or aperiodically according to the test scenario so that the loading software of the software loading unit 120 does not directly access the input / output channel of the actual hardware, ) To use the stored data.