KR20160112191A - Device memory access method - Google Patents

Device memory access method Download PDF

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Publication number
KR20160112191A
KR20160112191A KR1020150037441A KR20150037441A KR20160112191A KR 20160112191 A KR20160112191 A KR 20160112191A KR 1020150037441 A KR1020150037441 A KR 1020150037441A KR 20150037441 A KR20150037441 A KR 20150037441A KR 20160112191 A KR20160112191 A KR 20160112191A
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South Korea
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memory
area
address
host
index
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KR1020150037441A
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Korean (ko)
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KR101998347B1 (en
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권대길
조진웅
김용성
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전자부품연구원
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0615—Address space extension
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System (AREA)

Abstract

The present invention relates to a device memory access method for efficiently accessing a device (modem) memory that is larger than a host address, the method comprising: initializing a shadow index for memory access; Determining whether the host address is included in the range of the set area of the memory; If the host address is included in the range of the set area of the memory, the index is set. If the host address is smaller than MAX_SIZE (Internal SRAM + Data SRAM) for one area of the memory, the offset value relative to the start address of BaseAddress To Address; If the host address belongs to VALID_RANGE, setting the address as the io_base start address value of the memory and offset as the calculated host address; If the index value is different from the shadow index (shadow_index), the new index value is set in the BaseAddrReg existing in the SFR area of the memory, the index value is stored in the shadow_index, and the data is written ).

Description

Device memory access method [0001]

The present invention relates to a device memory access method, and more particularly, to a device memory access method for efficiently accessing a device (modem) memory larger than a host address.

In general, a device (modem) memory can be divided into an SFR area, a data SRAM area, an internal SRAM area, and other areas.

A general procedure for accessing such a device memory will be described with reference to FIG.

1 is a diagram illustrating an example of a process of accessing a device memory from a general host.

As shown in FIG. 1, the internal SRAM of the device memory 20 is used as a code area, and the data SRAM (DATA SRAM) is used as a buffer data area.

If the internal SRAM area is smaller than the internal SRAM area, the buffer area can be used instead.

In general, a host can directly access the internal memory of the device (modem) to exchange data with each other, and access special function registers (SFRs) to access special functions provided by the modem.

In FIG. 1, the Host 1 10 has a 22-bit address in terms of hardware, and can access the entire memory area (0x0000_0000 to 0x0040_0000) of the modem 20.

However, the host 2 (11) has a 16-bit address, so that only the partial memory area (0x0000_0000 to 0x0010_0000) of the memory in the modem 20 can be accessed. Therefore, the Host 2 (11) can not access the buffer data area (part of the internal SRAM + data SRAM) except the code area and the SFR area, and thus can not control the modem 20 or transmit / receive data.

Therefore, research and development are needed to efficiently access to a device (modem) memory that is larger than the host address.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a device memory access method capable of efficiently accessing a device (modem) memory larger than a host address.

According to another aspect of the present invention, there is provided a device memory access method including: initializing a shadow index for accessing a memory; Determining whether the host address is included in the range of the set area of the memory; If the host address is included in the range of the set area of the memory, the index is set. If the host address is smaller than MAX_SIZE (Internal SRAM + Data SRAM) for one area of the memory, the offset value relative to the start address of the BaseAddress To Address; If the host address belongs to VALID_RANGE, setting the address as the io_base start address value of the memory and offset as the calculated host address; If the index value is different from the shadow index (shadow_index), the new index value is set in the BaseAddrReg existing in the SFR area of the memory, the index value is stored in the shadow_index, and the data is written ). ≪ / RTI >

When the host address is included in the range of the set area of the memory, the index is set to 2 when the host address is included in the first area (BASE_2) set in the memory, and the host address is set in the memory And the index is set to 3 when included in the second area BASE_3.

Determining whether the host address is included in the range of the SFR area of the memory when the host address is not included in the set area of the memory; As a result of the determination, if the host address is included in the range of the SFR area of the memory, the base is determined as the SFR area base, and it is determined that the host address belongs to the SFR (Special Function Range) area and the offset address is set as the SFR start address .

When the host address is included in the range of the SFR area of the memory, the host further includes a step of writing data into the memory area of the base + offset address.

If the host address is not smaller than MAX_SIZE (Internal SRAM + Data SRAM), it is determined that the host address is out of the range of MAX_SIZE (Internal SRAM + Data SRAM), and memory access is terminated.

MAX_SIZE for one area of the memory is an area where the internal SRAM area and the data SRAM area of the memory are combined.

According to the present invention, in order to reduce the size and cost of a host chip recently, address lines can be efficiently accessed to devices having a memory area larger than a host address in accordance with a tendency to decrease gradually. For example, You can access up to 96k memory area.

BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 shows an example of an address range for accessing a device memory in a general host. Fig.
Fig. 2 shows an example of an address range for accessing a device memory in a host according to the present invention; Fig.
3 is a diagram illustrating an example of a BaseAddress-based access window when a host accesses a device memory.
4 is a flowchart illustrating a method of calculating a BaseAddress-based address in accessing a device memory according to the present invention.
5 is a diagram illustrating a memory mapping method between a host and a device memory.

BRIEF DESCRIPTION OF THE DRAWINGS The advantages and features of the present invention and the manner of achieving them will become apparent with reference to the embodiments described in detail below with reference to the accompanying drawings. The present invention may, however, be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the invention to those skilled in the art. Is provided to fully convey the scope of the invention to those skilled in the art, and the invention is only defined by the scope of the claims. Like numbers refer to like elements throughout.

In the following description of the present invention, a detailed description of known functions and configurations incorporated herein will be omitted when it may make the subject matter of the present invention rather unclear. The following terms are defined in consideration of the functions in the embodiments of the present invention, which may vary depending on the intention of the user, the intention or the custom of the operator. Therefore, the definition should be based on the contents throughout this specification.

Hereinafter, a device memory access method according to the present invention will be described in detail with reference to the accompanying drawings.

FIG. 2 is a diagram illustrating an example of an address range for accessing a device memory in a host according to the present invention. FIG. 3 is a diagram illustrating an example of a BaseAddress-based access window when accessing a device memory from a host. FIG. 5 is a diagram illustrating a method of mapping a memory between a host and a device memory according to an embodiment of the present invention; FIG. 5 is a flowchart illustrating an operation flow chart for calculating a BaseAddress-

 2, the host 1 10 accesses the memory of the device 20 with a 21-bit address and the host 2 11 accesses the memory of the device 20 with a 16-bit address. to be.

As shown in FIG. 2, in order to access the data buffer area (internal SRAM part) + data SRAM area of the memory 20 in the device 20 with a 16-bit address in the Host 2 11 in hardware, As shown in the following figure, the Base Address setting is randomly accessible within the 64 Kbyte Address Window.

In this case, BaseAddress can access the Host BaseAddr Register in the SFR area of the device 20 memory by HCS2.

Therefore, Host 2 (11) requires two Chip Select (HCS1, HCS2) lines. FIG. 4 specifically shows a method of accessing the address area within 64 k according to the BaseAddress value.

As shown in FIG. 2, since the Code area in the internal SRAM area of the memory area in the device 20 is larger than 64k but smaller than 96k, the remaining internal SRAM and data SRAM area can be used as the data buffer area.

In order to access the data buffer area of the device (modem) 20 from the Host 2 (11) having the 16-bit address to the data SRAM area and the SFR area in software, an address calculation method using BaseAddrss is required as shown in FIG. 4 .

To do this, memory mapping must first be performed between the host and the device as shown in FIG.

It is necessary to have an io_base start address that can access the data buffer of the memory of the device 20 and an sfr_base start address that can access the SFR area because the host 11 can access the maximum address of 64K as shown in FIG. Do.

If the BaseAddress value is 2 or 3 in the io_base area, the mapping area may be changed according to the DDORTPTM window (Access Window).

When the memory mapping is completed, the address is recalculated using the BaseAddress as shown in FIG. 4 to access the memory.

Hereinafter, a device memory access method according to the present invention will be described in detail with reference to FIG.

As shown in FIG. 4, first, the shadow index (Shadow_index) is initialized to 0 (S401).

After initializing the shadow index to 0, it is determined whether the host address is within the BSAE_2 area (S402).

As a result of the determination, if the address is within the BASE_2 area, the index value 2 of the base address is used (S403).

However, if it is determined in step S402 that the host address is not within the BSAE2 area, it is determined whether the host address is within the BASE_3 area (S404).

As a result of the determination, when the host address belongs to the range within the BASE_3 area, the index value 3 of BaseAddress is used (S405).

However, if the host address does not belong to the BASE_3 area, that is, if the host address does not correspond to any of the BASE_2 and BASE_3 areas, it is determined whether the host address belongs to the in-memory SFR area (S406) .

As a result of the judgment, if the host address does not belong to the SFR area of the memory, the process is terminated because the address range is invalid.

However, if the host address belongs to BASE_2 or BASE_3 in step S406, it can be determined that it corresponds to the memory buffer area. Otherwise, if the host address belongs to SFR_RANGE, it can be determined to belong to SFR (S407) .

If the host address is within the range of the memory buffer area, that is, it is determined whether the host address after step S403 and step S405 is smaller than MAX_SIZE (Internal SRAM + Data SRAM) (S408).

As a result of judgment, if the host address is not smaller than MAX_SIZE (Internal SRAM + Data SRAM), it is terminated because it is out of the range.

However, if the host address is smaller than MAX_SIZE in step S408, an offset value relative to the start address of BaseAddress is calculated as an address (S409).

After calculating the offset value relative to the start address of BaseAddress as an address, it is determined whether the host address belongs to VALID_RANGE (S410).

As a result of the determination, if the host address value is out of the VALID_RANGE, the process terminates. If the host address value does not exceed VALID_RANGE, the base is the io_base start address value of FIG. 5 and the offset becomes the recalculated host address (S411).

Next, it is determined whether the index value is the same as the shadow index (shadow_index) (S412).

If the index value differs from the shadow index (shadow_index value), the new index value is set in BaseAddrReg existing in the SFR area of FIG. 2 and the index value is stored in shadow_index (S413)

Then, the host writes the data in the memory area of the base + offset address (S414).

If the index is equal to the shadow index in step S412, the host writes data in the memory area of the base + offset address (S414).

If it is determined that the address belongs to the special function range (SFR) area, the base is the start address of the sfr_base shown in FIG. 5 and the offset value corresponding to the start address of the SFR area is calculated as an address. And thereafter writes data in the SFR (base + offset) area.

As described above, the link quality determination method in the wireless network system according to the present invention has been described with reference to the embodiments. However, the scope of the present invention is not limited to the specific embodiments, And various modifications, alterations, and changes may be made without departing from the spirit and scope of the invention.

Therefore, the embodiments described in the present invention and the accompanying drawings are intended to illustrate rather than limit the technical spirit of the present invention, and the scope of the technical idea of the present invention is not limited by these embodiments and accompanying drawings . The scope of protection of the present invention should be construed according to the claims, and all technical ideas within the scope of equivalents should be interpreted as being included in the scope of the present invention.

10, 11: Host
20: Device

Claims (6)

Initializing a shadow index for memory access;
Determining whether the host address is included in the range of the set area of the memory;
If the host address is included in the range of the set memory area, an index is set. If the host address is smaller than MAX_SIZE (Internal SRAM + Data SRAM) for one area of the memory, the offset value relative to the start address of BaseAddress is set to Address;
If the host address belongs to VALID_RANGE, setting the address as the io_base start address value of the memory and offset as the calculated host address;
If the index value is different from the shadow index (shadow_index), the new index value is set in the BaseAddrReg existing in the SFR area of the memory, the index value is stored in the shadow_index, and the data is written );
≪ / RTI >
The method according to claim 1,
When the host address is included in the range of the set memory area, the index is set to 2 when the host address is included in the memory first area (BASE_2) in which the host address is set, (BASE_3). ≪ / RTI >
The method according to claim 1,
Determining whether the host address is included in the range of the SFR area of the memory when the host address is not included in the set area of the memory;
If it is determined that the host address is included in the range of the SFR area of the memory, the base is judged as the SFR area base, and it is determined that the host address belongs to the SFR (Special Function Range) area and the offset address is set as the SFR start address / RTI >
The method of claim 3,
If the host address is included in the range of the SFR area of the memory, the host further includes writing data to the memory area of the base + offset address.
The method according to claim 1,
And if the host address is not smaller than MAX_SIZE (Internal SRAM + Data SRAM), it determines that the host address is out of the range of MAX_SIZE (Internal SRAM + Data SRAM) and terminates the memory access.
The method according to claim 1,
Wherein the MAX_SIZE for one area of the memory is an area of an internal SRAM area and a data SRAM area of the memory.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3291069A1 (en) 2016-08-31 2018-03-07 LG Display Co., Ltd. Organic light emitting display having touch sensor and method of fabricating the same

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20080064594A (en) * 2007-01-05 2008-07-09 삼성전자주식회사 System on a chip and method for access in memory thereof
US20140095779A1 (en) * 2012-09-28 2014-04-03 Andrew T. Forsyth Processing memory access instructions that have duplicate memory indices
KR20140107935A (en) * 2013-02-28 2014-09-05 삼성전자주식회사 Integrated circuit for computing target entry address of buffer descriptor based on data block offset and system having the same
KR20140112846A (en) * 2013-03-14 2014-09-24 삼성전자주식회사 Memory System

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20080064594A (en) * 2007-01-05 2008-07-09 삼성전자주식회사 System on a chip and method for access in memory thereof
US20140095779A1 (en) * 2012-09-28 2014-04-03 Andrew T. Forsyth Processing memory access instructions that have duplicate memory indices
KR20140107935A (en) * 2013-02-28 2014-09-05 삼성전자주식회사 Integrated circuit for computing target entry address of buffer descriptor based on data block offset and system having the same
KR20140112846A (en) * 2013-03-14 2014-09-24 삼성전자주식회사 Memory System

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3291069A1 (en) 2016-08-31 2018-03-07 LG Display Co., Ltd. Organic light emitting display having touch sensor and method of fabricating the same

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