KR20160092853A - Apparatus and Method for Checking Error Optical Transceiver using DQPSK - Google Patents

Abstract

The present invention relates to an optical transceiving device using modulation and demodulation of a differential quadrature phase shift keying method. The optical transceiving device comprises: a transmitting unit configured to generate PRBS signals in a multiplexer; and a receiving unit configured to check patterns of the PRBS signals, generated in the multiplexer, in a demultiplexer. If a signal channel of one of the PRBS signals is bit-inverted in the multiplexer, it is checked whether the PRBS signals have an error in accordance with whether a state of a signal channel of one of signals received from the demultiplexer is toggled.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to an optical transmission / reception apparatus using a modulation / demodulation scheme of a differential quadrature phase shift scheme,

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical communication system, and more particularly, to an error checking apparatus and method in an optical transceiver using a modulation scheme of a differential quadrature phase shift scheme capable of transmitting a transmission speed of 100 Gbps over a long distance using one wavelength channel will be.

A DP-QPSK (Dual Polarization-Quadrature Phase Shift Keying) modulation scheme has been studied to transmit 100 Gbps signals over long distance optical transmission networks. In this modulation scheme, two QPSK signals are applied to two mutually orthogonal polarized lights, so that 4 bits per symbol can be transmitted.

The DP-QPSK signal is received by a coherent receiver and a coherent receiving method using a digital signal processing technique.

Digital signal processing can be used to compensate for chromatic dispersion and polarization mode dispersion. Meanwhile, there is a direct receiving method in which two polarized lights are separated using a polarization demultiplexer and demodulated and received using a differential delayed line interferometer (DLI).

This method is expected to be suitable for a metro transport network with a relatively short transmission distance because of its advantage in that it consumes less power than a coherent receiving method. This method is called DP-DQPSK (Dual Polarization-Differential Quadrature Phase Shift Keying) modulation method by distinguishing it from the coherent reception DP-QPSK method.

In a conventional DP-DQPSK modulated optical transceiver, four 28-Gbps signals applied to the modulator must be received again at four 28-Gbps signals at the receiver. However, due to the characteristics of the differential delay interferometer used in the integrated DQPSK receiver, two of the four received 28 Gbps signals can receive the same signal. Also, the received signal can be received in a bit invert state.

That is, in the prior art, two of the four 28-Gbps signals received due to the characteristics of the differential delay interferometer in the DP-DQPSK optical receiver have the same signal, or the signal reception in which the received signal can be received in a bit invert state There is a problem that a malfunction occurs.

The present invention provides an apparatus and method that prevents erroneous signal reception and allows four 28 Gbps signals to be received and recovered at the receiver as is.

The present invention relates to an optical transceiver using a modulation / demodulation scheme of a differential quadrature phase shift scheme, the apparatus comprising: a transmitter for generating a PRBS signal in a multiplexer; and a receiver for checking a pattern of a PRBS signal generated in the demultiplexer in a demultiplexer, When bit invert of one of the PRBS signals in the multiplexer is performed, it is checked whether an error has occurred according to whether or not the state of one of the signals received by the demultiplexer is toggled.

In the present invention, a function for error detection is built in a multiplexer and a demultiplexer, and the transmission signal and the reception signal are set so as to correspond to each other at a ratio of 1: 1, and a differential delay interferometer (DLI) It provides a way to control, and effectively solves receiver malfunctions without the need for additional devices.

1 is a configuration diagram of a general DP-DQPSK modulation type optical transceiver.
2 is a structural diagram of a modulator used in a DP-DQPSK modulation type optical transceiver.
3 is a structural diagram of an integrated DQPSK receiver.
4 is a diagram showing a change in output according to the DLI phase difference.
5 is a diagram showing an output signal of the DQPSK receiver.
6A and 6B are views showing the structure of an optical transceiver according to an embodiment of the present invention.
7 is a flowchart illustrating an error checking method in an optical transceiver according to an embodiment of the present invention.
8A and 8B are views showing the structure of an optical transceiver according to another embodiment of the present invention.
9 is a flowchart illustrating an error checking method in an optical transceiver according to another embodiment of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to the like elements throughout.

In the following description of the present invention, a detailed description of known functions and configurations incorporated herein will be omitted when it may make the subject matter of the present invention rather unclear.

The terms used throughout the specification are defined in consideration of the functions in the embodiments of the present invention and can be sufficiently modified according to the intentions and customs of the user or the operator. It should be based on the contents of.

1 is a configuration diagram of an optical transceiver of the DP-DQPSK modulation method.

Referring to FIG. 1, a 10: 4 multiplexer 11 as a transmitting terminal is connected to ten external 11.2 Gbps signals, and multiplexes 10 11.2 Gbps signals into four 28 Gbps signals. The multiplexed four 28 Gbps signals are respectively amplified by a modulator driver 12 and connected to an optical modulator 14. [ The output of a laser diode (LD) 13 is modulated in the optical modulator 14. [ The optical modulator 14 used here may be a modulator that generates a DP-QPSK signal capable of transmitting 4 bits to one symbol.

And a polarization demultiplexer 21 is used as a receiving end to separate the two polarized signals to obtain a QPSK signal for each polarized light. Two 56 Gbps QPSK signals are demodulated and converted into electrical signals in respective integrated DQPSK receivers (22-1, 22-2). The four received 28 Gbps signals are connected to a 4:10 demultiplexer 23 and are demultiplexed into a 10 x 11.2 Gbps signal at a 4:10 demultiplexer 23. A 10x11.2 Gbps signal output from the 4:10 demultiplexer 23 is externally connected.

In this way, in the DP-DQPSK optical transceiver, four 28 Gbps signals applied to the modulator 14 of the transmitter must be received again at four 28 Gbps signals at the receiver. However, due to the characteristics of the differential delay interferometer used in the integrated DQPSK receivers 22-1 and 22-2, two of the four received 28 Gbps signals can receive the same signal. Alternatively, the received signal may be received in a bit invert state.

2 is a configuration diagram of a modulator used in an optical transceiver of a DP-DQPSK modulation scheme.

Referring to FIG. 2, the structure of the optical modulator includes four Mach-Zehnder modulators (Q-x and Q-y) capable of applying in-phase data (I_x and I_y) and quadrature data (Q_x and Q_y) for two polarizations of x- And a modulator (Mach-Zehnder modulator (MZM)) 210.

Bias_I_x, Bias_Q_x, Bias_I_y, and Bias_Q_y bias voltages are required to control the bias operating point of MZM. When the modulated signals from two MZMs are combined, the I- and Q- signals must have a phase difference of 90 ^° , and therefore the application of the voltages of Bias_90_x and Bias_90_y is required in order to control them.

In a 90 ^° polarization rotator, one of the polarizations is rotated by 90 ^° so that the two polarizations are orthogonal to each other. I- signal and Q- signal applied to the two MZM with respect to the x- polarized light is made by a QPSK signal to have a phase difference of 90 ^o. A QPSK signal is also generated for the y-polarized light in the same manner. Thereafter, the DP-QPSK signal is generated by vertically combining the two polarized signals.

The I_x, Q_x, I_y, and Q_y signals applied to each MZM are ~ 28Gbps electrical signals having binary data sequences. The optical signals of the DP-QPSK modulation method output by applying these four 28 Gbps electric signals are 28 Gbaud (GSymbol / s) signals in one wavelength channel.

Then, the receiver receives a signal on one wavelength channel as described in FIG. 1, and separates the two polarized lights using a polarization demultiplexer 21. The two separated polarized lights each have a QPSK signal. 1, two QPSK signals corresponding to the respective polarized lights are received and recovered using two integrated DQPSK receivers (integrated DQPSK receivers) 22-1 and 22-2.

3 is a structural diagram of an integrated DQPSK receiver.

Referring to FIG. 3, two differential delayed interferometers (DLI) 310-1 and 310-2 are used for demodulating a received DQPSK signal. The DQPSK input is input to the two DLIs 310-1 and 310-2, and the length of one symbol of the DQPSK signal is added to one arm of the DLIs 310-1 and 310-2. That is, one symbol and the next symbol interfere with each other to be output. Thus, the DLI has a free spectral range (FSR) of ~ 28 GHz.

If the phase difference between the two arms of the DLI is p / 4, -p / 4 after passing the DQPSK input through the DLI, the output signal becomes an on-off keying binary data sequence. In the case of the phase difference of p / 4 and the case of -p / 4, the binary data sequence is different, which corresponds to the I and Q signals applied in FIG.

In order to make the received signal equal to the transmitted signal, DQPSK is pre-coded before being applied to the signal shown in FIG. The signal passed through the DLI passes through the twin PDs 320-1 and 320-2 and the differential TIAs 330-1 and 330-2 and is output as an electric signal. Thus, it is necessary to adjust the phase difference of the DLI so that the output signal of the receiver can be recovered as a binary data sequence signal to be obtained.

The solid line in FIG. 4 shows the output curve of DLI according to the phase difference. This output curve is the output of one port of the DLI output when the laser light source is input, and the output of the other port is 180 ^° difference.

Referring again to FIG. 3, peak level detectors (PLD) 340-1 and 340-2 are located at output ends of the TIAs 330-1 and 330-2 to measure the peak value of the output signal . When the phase differences of the DLIs 310-1 and 310-2 are optimized, the output signal has a binary data sequence. However, when the phase difference of the DLIs 310-1 and 310-2 deviates from the optimum point, the output signal is divided into four output levels. From the values measured by the PLDs 340-1 and 340-2, it can be seen that the outputs of the PLDs 340-1 and 340-2 are minimized at the optimum point.

As shown by the dotted line in FIG. 4, the PLD output is minimized, and the period of the PDL output change is p / 2. If the binary signals at the transmitter of the DQPSK signal are I and Q, respectively, different sequences appear depending on the phase difference as shown in FIG. A binary signal of Q, p / 4, Q _inv for 3 * p / 4, and I _inv for 5 * p / 4 is obtained when the phase difference is -p / 4. Herein, I _inv and Q _inv represent bit inversed signals of the I and Q signals.

As described above, the DLI used in the DQPSK receiver outputs different binary signals every time the phase difference increases by p / 2, which can not be distinguished in the DLI itself. Therefore, it is necessary to confirm whether the two DLIs to be used are outputting different I, Q signals.

Assuming that the signals transmitted from the transmitter are I and Q, respectively, the signals Rx_I and Rx_Q of FIG. 3 may have 16 different states as shown in FIG. Eight of these should not be so because the two outputs converge to one of the same signals I or Q at the same time. The other eight have I and Q or its bit invert status. The output port of the receiver is not a problem if it is reversed. If a bit invert status is received, the received output can be bit invert, or bit invert at the time of transmission to simply obtain the desired binary signal.

In order to solve the problems described above, the present invention includes a function of determining the state of a received signal in a multiplexer and a demultiplexer. That is, it is a function to discriminate a state of a received signal and to correct it if there is an error.

6A and 6B are views showing the structure of an optical transceiver according to an embodiment of the present invention.

Referring to FIG. 6A, a multiplexer 610 multiplexes a 10x11.2 Gbps signal at 4 × 28 Gbps, as well as a pseudorandom binary sequence (PRBS) generator 611, a bit inverter, (612), and a DQPSK precoder (613). Accordingly, the PRBS signal generated in the multiplexer 610 itself can be transmitted.

Referring to FIG. 6B, a demultiplexer 670 demultiplexes a signal of 4 × 28 Gbps to a signal of 10 × 11.2 Gbps and includes a PRBS error checker 671, Pattern check and bit error rate (BER) verification of transmitted signal are possible. Accordingly, it is possible to send the four PRBS signals generated by the multiplexer 610 and to check the pattern of the signals received by the demultiplexer 670.

When the PRBS signal transmitted from the multiplexer 610 is correctly received, the corresponding pattern check register is toggled to 1 in the pattern check function. On the other hand, if the pattern sequence does not match or a bit invert signal is input, the pattern check register becomes 0.

Therefore, when bit invert one of the four PRBS signals in the multiplexer 610, the signal received by the demultiplexer 670 also needs to be toggled in the state of one signal channel in the pattern check. In this way, it is possible to confirm whether the signal transmitted from the transmitting terminal corresponds to the signal received from the receiving terminal on a one-to-one basis.

That is, in the pattern check of the signal received by the demultiplexer 670, even though the multiplexer 610 bit invert the signal of one of the four PRBS signals, If toggled, this means that the two received signals have converged to the same signal of either I or Q. In this case, it is necessary to increase the phase difference of the corresponding DLI to control them to be different from each other.

In this manner, it is necessary to sequentially check the status of the received pattern check signal while bit invertting the PRBS signal, and to adjust the DLI so that different signals are received. After confirming that one-to-one correspondence is established, it is necessary to set whether to perform bit invert in each of the four outputs of the multiplexer.

7 is a flowchart illustrating an error checking method in an optical transceiver according to an exemplary embodiment of the present invention.

Referring to FIG. 7, first, a 4-channel pattern check check is performed in the demultiplexer to check all four states of the pattern check register (S705). Thereafter, the PRBS channel # 1 bit invert is performed in the multiplexer (S710), and the 4-channel pattern check check of the demultiplexer is again performed (S715). At this time, if the state of the channel 1 is toggled, since the corresponding channel is normally received, the flow advances to the next step S725.

However, when two channels are simultaneously toggled, two identical signals are being received. Accordingly, the phase difference of the corresponding DLI is increased by p / 2 so that different signals are received (S720).

Similarly, after the PRBS channel # 2 bit invert is performed in the multiplexer (S725), the 4-channel pattern check is confirmed again in the demultiplexer (S730). In this case, since the phase difference of the DLI is increased by p / 2 and the different signals are adjusted to be received, there is no case where the two channels are toggled at the same time. In this case, check whether bit invert is necessary.

Bit invert is also performed for channel # 3 and channel # 4 in the same manner as in channel # 1 and channel # 2 to check the status (S735 to S760). After confirming all the channels and controlling the phase difference of DLI, the multiplexer sets PRBS channels # 1 to # 4 bit invert on-off (S765). In this way, it is possible to set the transmitted signal to be received correctly.

Fig. 7 shows an example applied to a case where two polarized lights are used for a transceiver of a DP-DQPSK modulation scheme. The present invention can be similarly applied to a DQPSK signal using one polarization.

8A and 8B are views showing the structure of an optical transceiver according to an embodiment of the present invention. Here, a transmitter and a receiver of a DQPSK signal using one polarization are shown.

Referring to FIG. 8A, in the transmitter, two binary data sequences are used to generate a QPSK signal using one polarization. Referring to FIG. 8B, the receiver receives two binary data sequences using a DQPSK receiver.

9 is a flowchart illustrating an error checking method in an optical transceiver according to another embodiment of the present invention.

Referring to FIG. 9, a 2-channel pattern check is checked in a demultiplexer, and all states of a 2-channel pattern check register are checked (S910). Next, the multiplexer performs PRBS channel # 1 bit invert (S920), and checks the demultiplexer 2 channel pattern check again (S930). At this time, if the state of the channel 1 is toggled, since the corresponding channel is normally being received, the process proceeds to the next step S950. However, when two channels are simultaneously toggled, two identical signals are being received. Therefore, the phase difference of the corresponding DLI is increased by p / 2 so that different signals are received (S940).

Similarly, after the PRBS channel # 2 bit invert is performed in the multiplexer (S950), the 2-channel pattern check is confirmed again in the demultiplexer (S960). In this case, since the phase difference of DLI is increased by p / 2 to adjust different signals to be received, there is no case where the two channels are toggled at the same time. In this case, check whether bit invert is necessary. Since confirmation of all the channels and control of the phase difference of DLI are completed, the multiplexers set the PRBS channels # 1 to # 2 bit invert on-off (S970). In this way, it is possible to set the transmitted signal to be received correctly.

Claims (1)

A transmitter for generating a PRBS signal in the multiplexer,
And a receiver for verifying a pattern of a PRBS signal generated by the demultiplexer in a demultiplexer,
Wherein when the bit invert of one of the PRBS signals in the multiplexer is performed in bit invert, whether or not an error has occurred is determined according to whether or not the state of one of the signals received in the demultiplexer is toggled. An optical transmission / reception apparatus using a quadrature phase shift type modulation / demodulation scheme.

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