KR20160016485A - Operating method of controller for setting link between interfaces of electronic devices, and storage device including controller - Google Patents

Abstract

Provided are an operating method of a controller for quickly setting a link between interfaces of an electronic device, and a storage device including the controller. The operating method comprises the following steps: sensing whether an interface circuit connects to other electronic devices; transmitting an identification code having a value different from defined and reserved values in an interface rule for defining an operation process of the interface circuit, and having different values according to an attribute of the electronic device; and setting a state of the interface circuit to a rapid linkup state in response to the identification code. According to the present invention, a time required for processing link startup between two electronic devices can be reduced.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a method of operating a controller for establishing a link between an interface of an electronic device and a storage device including the controller. BACKGROUND OF THE INVENTION < RTI ID =

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an interface technique, and more particularly, to a method and an apparatus for interfacing for link start-up between electronic devices using a high-speed serial interface And more particularly to a controller and an electronic device that operate.

Today, various types of electronic devices are being used. The electronic device can perform its own functions alone. Furthermore, the electronic device can perform its own functions by exchanging data with other electronic devices. Interface technology is used to exchange data between two electronic devices. As the types of electronic devices have become various, the kinds of interface protocols have also diversified. Recently, Mobile Industry Processor Interface (MIPI) Alliance has proposed an interface protocol that uses "UniPro" as a link layer to unify the interfacing process of a mobile device.

UniPro supports a physical layer called "PHY". An electronic device that performs interfacing using a UniPro and a PHY includes a transmitter and a receiver for exchanging data with other electronic devices. A transmitter included in one electronic device and a receiver included in another electronic device connected thereto form one lane. However, the number of transmitters and receivers included in one electronic device may be different from the number of transmitters and receivers included in other electronic devices. In addition, the performance of one electronic device may be different from that of other electronic devices.

Accordingly, the two electronic devices recognize a physically connected lane and perform processing for receiving information of the counterpart device. Both electronic devices perform a link start-up process before exchanging data. By performing link start-up processing, the two electronic devices can exchange and recognize information on the number of transmitters and receivers, information on physically connected lanes, information on the performance of the other device, and the like. After the link start-up process is completed, the two electronic devices are set to a linkup state in which data can be stably exchanged with each other.

The link start-up process is performed during the initialization operation performed when the electronic device is first used or the electronic device booting operation. Furthermore, the link start-up process is performed during an operation of recovering an error in the link-up state. However, since the link start-up process requires a lot of information exchange with respect to the two electronic devices, it may take a long time for the link start-up process. Link start-up processing that takes a long time may degrade the performance of the electronic device.

A method is provided for reducing the time required for link start-up processing between two electronic devices. The electronic device according to the embodiment of the present invention refers to the identification code and link-up information having different values according to the attribute of the electronic device, skips the exchange of information about the partner device, Up state can be entered.

A method of operating a controller for managing a second electronic device configured to communicate with a first electronic device in accordance with an embodiment of the present invention includes sensing a connection of a first electronic device to an interface circuit of a second electronic device; After the connection of the first electronic device is detected, an identification code having a value different from the defined and reserved values defined in the interface protocol defining the operating procedure of the interface circuit and having different values according to the attributes of the first electronic device, Receiving from an electronic device; And setting the state of the interface circuit to a fast link up state corresponding to the provided identification code to enable data communication with the first electronic device.

In an embodiment of the present invention, the attributes of the first electronic device may include the type and manufacturer of the first electronic device.

The method of operating the controller according to the embodiment of the present invention may further include providing a response signal corresponding to the provided identification code to the first electronic device.

In an embodiment of the invention, the step of configuring may comprise determining whether the value of the provided identification code is stored in a memory area of the second electronic device.

In an embodiment of the present invention, the step of setting, when the value of the provided identification code is stored in the memory area of the second electronic device, the link-up information used for establishing the fast link- In the memory area of the memory device.

In an embodiment of the present invention, the link-up information includes at least one of connection information of a lane used for data communication between the first electronic device and the second electronic device, performance information of the first electronic device, and performance information of the second electronic device One can be included.

In an embodiment of the invention, the step of establishing comprises the step of setting the state of the interface circuit to a fast link-up state based on the stored link-up information if the link-up information is stored in the memory area of the second electronic device .

In an embodiment of the present invention, the step of establishing comprises the steps of: receiving the link information and performance information of the first electronic device if the link-up information is not stored in the memory area of the second electronic device; Setting the state of the interface circuit to a fast link up state based on the provided lane connection information and the provided performance information; And storing the provided lane connection information and the provided performance information in a memory area of the second electronic device.

The method of operation of the controller according to an embodiment of the present invention may be used when a reconnection of a first electronic device to a second electronic device is detected after the first electronic device is disconnected, And restoring the fast link-up state when re-establishment of the link-up state is necessary. In this embodiment, the step of restoring comprises: receiving an identification code from a first electronic device; And setting the state of the interface circuit to a fast link-up state based on the stored lane connection information and the stored performance information.

In an embodiment of the present invention, the step of setting comprises: if the value of the provided identification code is not stored in the memory area of the second electronic device, storing the value of the provided identification code in the memory area of the second electronic device step; Receiving the lane connection information and performance information of the first electronic device corresponding to the value of the provided identification code; Setting the state of the interface circuit to a fast link up state based on the provided lane connection information and the provided performance information; And storing the provided lane connection information and the provided performance information in a memory area of the second electronic device.

In an embodiment of the present invention, the second electronic device may be a storage device comprising a non-volatile memory and a controller.

A method of operating a controller for managing a first electronic device in accordance with an embodiment of the present invention includes sensing a connection of a second electronic device to an interface circuit of the first electronic device; After the connection of the second electronic device is detected, an identification code having a value different from those defined and reserved in the interface protocol defining the operating procedure of the interface circuit and having a different value according to the attribute of the first electronic device, Providing to an electronic device; Waiting for transmission of a response signal corresponding to the identification code provided from the second electronic device during the waiting time; And setting the state of the interface circuit to a link up state corresponding to the transmitted response signal to enable data communication with the second electronic device if a response signal is sent from the second electronic device within the latency time can do.

In an embodiment of the invention, the first electronic device may be a host including an application processor.

A storage device according to an embodiment of the present invention includes: a non-volatile memory configured to store one or more identification codes having different values according to attributes of a host; An interface circuit configured to exchange data with a host in accordance with an interface protocol using a physical layer and a link layer; And a controller configured to receive an identification code corresponding to an attribute of a connected host when the connection of the host to the interface circuit is detected, and to provide a response signal corresponding to the provided identification code to the connected host. In this embodiment, one of the controller and link layers comprises: a discrimination circuit configured to determine whether an identification code having the same value as the provided identification code is stored in the nonvolatile memory; And a status setting circuit configured to set the status of the physical layer and the link layer to a fast link up state corresponding to the provided identification code to enable data communication with the connected host.

In an embodiment of the invention, the value of each of the one or more identification codes can be stored directly in memory cells included in the non-volatile memory, or embedded in program instructions stored in the non-volatile memory.

In an embodiment of the invention, each of the one or more stored identification codes has a value different from the values defined and reserved in the interface specification.

In an embodiment of the invention, the stored one or more identification codes correspond to one or more link-up states, respectively, for hosts having different attributes, and the non-volatile memory is a one used to set one or more link- And the determination circuit can determine whether or not the target linkup information used for setting the fast linkup state is stored in the nonvolatile memory.

In an embodiment of the present invention, the target link-up information includes at least one of connection information of a lane used for data communication with a connected host, performance information of each physical layer and link layer, and performance information of a connected host, The data values corresponding to the link-up information can be directly stored in the memory cells included in the non-volatile memory or inserted into the program command stored in the non-volatile memory.

In the embodiment of the present invention, the state setting circuit sets the state of the physical layer and the link layer directly into the fast link-up state based on the stored target link-up information, or sets the target link-up information inserted in the program command executed by the controller The state of the physical layer and the link layer can be set to the fast link-up state.

In an embodiment of the present invention, the controller controls the storage memory in accordance with the JEDEC UFS standard interface protocol, and the non-volatile memory, the interface circuit, the controller, and the storage memory are connected to an embedded storage or mobile electronic system May be implemented in a card storage configured to be connected.

According to the embodiment of the present invention, the time required for the link start-up processing between the two electronic devices can be reduced. As a result, the time required for the initialization operation or the booting operation of the electronic device can be reduced. Furthermore, the time required for recovery operation of errors in the link-up state can be reduced.

1 is a block diagram showing the configuration of an electronic system including two electronic devices connected to each other.
2 is a conceptual diagram showing a connection between interface circuits included in each of the two electronic apparatuses of Fig.
3 is a flowchart for explaining the setting of the link-up state according to the embodiment of the present invention.
FIGS. 4 and 5 are flowcharts illustrating a process in which two electronic devices are set in a link-up state according to an embodiment of the present invention.
6 is a table for explaining the concept of identification code and link-up information according to an embodiment of the present invention.
7 to 9 are flowcharts illustrating a process in which two electronic devices are set in a link-up state according to an embodiment of the present invention.
10 and 11 are flowcharts illustrating the operation of the electronic device according to the embodiment of the present invention.
12 is a flowchart illustrating restoration of a fast link up state according to an embodiment of the present invention.
13 is a block diagram showing a configuration of a storage system according to an embodiment of the present invention.
14 and 15 are block diagrams showing the configuration of the storage device of Fig.
16 is a block diagram illustrating a configuration of a storage system including an embedded storage or a card storage according to an embodiment of the present invention.
17 is a block diagram illustrating the configuration of an electronic system including a controller according to an embodiment of the present invention and interfaces operating in accordance with an embodiment of the present invention.

The foregoing features and the following detailed description are exemplary of the invention in order to facilitate a description and understanding of the invention. That is, the present invention is not limited to these embodiments, but may be embodied in other forms. The following embodiments are merely examples for the purpose of fully disclosing the present invention and are intended to convey the present invention to those skilled in the art. Thus, where there are several ways to implement the components of the present invention, it is necessary to make it clear that the implementation of the present invention is possible by any of these methods or any of the equivalents thereof.

It is to be understood that, in the context of this specification, when reference is made to a configuration including certain elements, or when it is mentioned that a process includes certain steps, other elements or other steps may be included. In other words, the terms used herein are for the purpose of describing specific embodiments only, and are not intended to limit the concept of the present invention. Further, the illustrative examples set forth to facilitate understanding of the invention include its complementary embodiments.

The terms used in this specification are meant to be understood by those of ordinary skill in the art to which this invention belongs. Commonly used terms should be construed in a manner consistent with the context of this specification. Also, terms used in the specification should not be construed as being excessively ideal or formal in nature unless the meaning is clearly defined. BRIEF DESCRIPTION OF THE DRAWINGS Fig.

1 is a block diagram showing the configuration of an electronic system including two electronic devices connected to each other. The electronic system 100 may include a first electronic device 110 and a second electronic device 120. The first electronic device 110 may include a first interface circuit 113 and a first controller 115. The second electronic device 120 may include a second interface circuit 123 and a second controller 125. However, each of the first electronic device 110 and the second electronic device 120 may further include other components not shown in FIG. The configuration shown in Fig. 1 is only an example for facilitating understanding of the present invention.

As an example, the first electronic device 110 may be a host. For example, if the electronic system 100 is a mobile electronic system, the first electronic device 110 may include an application processor. As an example, the second electronic device 120 may be a storage device.

However, the present invention is not limited to the above embodiments. By way of example, the functionality and configuration of the first electronic device 110 may be interchanged with the functionality and configuration of the second electronic device 120. Further, the first electronic device 110 and the second electronic device 120 may be other types of electronic devices. By way of example, the second electronic device 120 may be one of a display device, an image sensor, a wireless communication chip, and the like. The above embodiments are only examples for helping understanding of the present invention.

The first electronic device 110 may be coupled to the second electronic device 120 through a first interface circuit 113. The first electronic device 110 may exchange data with the second electronic device 120 via the first interface circuit 113.

The first interface circuit 113 may include a first physical layer PL1 and a first link layer LL1. The first physical layer PL1 may include physical configurations for exchanging data with the second electronic device 120. [ By way of example, the first physical layer PL1 may include one or more transmitters and one or more receivers for exchanging data with the second electronic device 120. [ The first link layer LL1 may manage the transmission and composition of data. Furthermore, the first link layer LL1 can manage the integrity and error of the data.

As an embodiment, when the electronic system 100 is a mobile electronic system, the first link layer LL1 may be defined by the "UniPro" specification, and the first physical layer PL1 may be defined as & "Specification. ≪ / RTI > UniPro and M-PHY are the interface protocols proposed by the Mobile Industry Processor Interface (MIPI) Alliance. In this embodiment, the first link layer LL1 of the first interface circuit 113 may include a Physical Adapted Layer (not shown). The physical adaptation layer can control the first physical layer PL1 such as managing symbols of data or managing power.

However, the present invention is not limited to the above embodiments. As will be described later, the present invention can be employed in all interface circuits including a physical layer and a link layer.

The first controller 115 can manage and control the overall operation of the first electronic device 110. [ In particular, the first controller 115 can process and manage the exchanged data through the first interface circuit 113. [ Under the control of the first controller 115, the first electronic device 110 can perform its own functions.

The second electronic device 120 may be coupled to the first electronic device 110 via a second interface circuit 123. The second electronic device 120 may exchange data with the first electronic device 110 via the second interface circuit 123. [

The second interface circuit 123 may include a second physical layer PL2 and a second link layer LL2. The second physical layer PL2 may comprise physical configurations for exchanging data with the first electronic device 110. [ By way of example, the second physical layer PL2 may include one or more transmitters and one or more receivers for exchanging data with the first electronic device 110. [ The second link layer LL2 can manage the transmission and combination of data. Furthermore, the second link layer LL2 can manage the integrity and error of the data.

As an embodiment, when the electronic system 100 is a mobile electronic system, the second link layer LL2 may be defined by the UniPro specification and the second physical layer PL2 may be defined by the M-PHY specification. have. In this embodiment, the second link layer LL2 of the second interface circuit 123 may comprise a physical adaptation layer (not shown).

The second controller 125 can manage and control the overall operation of the second electronic device 120. [ In particular, the second controller 125 can process and manage the exchanged data through the second interface circuit 123. [ Under the control of the second controller 125, the second electronic device 120 can perform its own functions.

As an embodiment, when the second electronic device 120 is a storage device including flash memory, the second controller 125 operates in accordance with the interface protocol defined in the UFS (Universal Flash Storage) specification proposed by JEDEC . In this embodiment, when the first electronic device 110 is a host, the first controller 115 may operate in accordance with the interface protocol defined in the UFSHCI (UFS Host Controller Interface) specification. However, the present invention is not limited to the above embodiments. As another example, if the second electronic device 120 is an image sensor, the second controller 125 may operate in accordance with an interface protocol called CSI (Camera Serial Interface). That is, the present invention can be employed in all interface circuits including a physical layer and a link layer, and embodiments of the present invention can be changed or modified in various forms according to an interfacing method.

2 is a conceptual diagram showing a connection between interface circuits included in each of the two electronic apparatuses of Fig. 1, the electronic system 100 may include a first electronic device 110 and a second electronic device 120 connected to each other. The first electronic device 110 may be coupled to the second electronic device 120 via a first physical layer PL1. The second electronic device 120 may be coupled to the first electronic device 110 via a second physical layer PL2.

As an example, the first physical layer PL1 may include four transmitters Tx11, Tx12, Tx13, Tx14 and two receivers Rx25, Rx26. As an example, the second physical layer PL2 may include two receivers Rx21 and Rx22 and one transmitter Tx25. However, the number of transmitters and receivers included in each of the first physical layer PL1 and the second physical layer PL2 may be variously changed. The configuration shown in Fig. 2 is only an example for facilitating understanding of the present invention. The present invention is not limited to the configuration shown in Fig.

When the first electronic device 110 and the second electronic device 120 are different kinds of electronic devices, the number of transmitters and receivers included in the first physical layer PL1, as shown in FIG. 2, And may be different from the number of transmitters and receivers included in layer PL2. In addition, the capability of the first electronic device 110 may be different than the performance of the second electronic device 120. By way of example, the maximum data rate of the first electronic device 110 may be 6 Gbps, while the maximum data rate of the second electronic device 120 may be 3 Gbps.

If the configuration and performance of the first electronic device 110 is different from that of the second electronic device 120 as in the above example, the data exchange between the first electronic device 110 and the second electronic device 120 This can be unstable. Thus, the first electronic device 110 and the second electronic device 120 can perform a link startup process before exchanging data. During the link start-up process, the first electronic device 110 and the second electronic device 120 may exchange information about the number of transmitters and receivers, information about device capabilities, and the like. Accordingly, the first electronic device 110 can recognize the configuration and performance of the second electronic device 120 and the second electronic device 120 can recognize the configuration and performance of the first electronic device 110 .

After the link start-up process is completed, each of the first electronic device 110 and the second electronic device 120 is set to a linkup state in which data can be stably exchanged. By way of example, the first transmitter Tx11 of the first electronic device 110 and the first receiver Rx21 of the second electronic device 120 may form a single lane. Furthermore, the second transmitter Tx12 and the second receiver Rx22 form one lane, and the fifth transmitter Tx25 and the fifth receiver Rx25 form one lane. The third transmitter Tx13, the fourth transmitter Tx14, and the sixth receiver Rx26, which do not form a lane, may not be used for data exchange. However, the connection between the transmitter and the receiver may be changed or modified differently from that shown in Fig. The connection shown in Fig. 2 is only an example for facilitating understanding of the present invention.

Further, if the maximum data transfer rate of the first electronic device 110 is 6 Gbps and the maximum data transfer rate of the second electronic device 120 is 3 Gbps, then the first electronic device 110 transmits the second electronic Data exchange with the device 120 is possible. That is, in the link up state, the first electronic device 110 can exchange data with the second electronic device 120 at a rate of 3 Gbps over three lanes. Once the link up state is established, the first electronic device 110 can exchange data with the second electronic device 120 stably. However, the link start-up process requires a lot of information exchange with respect to the first electronic device 110 and the second electronic device 120. [ Therefore, it may take a long time for the link start-up processing.

However, when the first electronic device 110 or the second electronic device 120 is a well-known electronic device, a link start-up process may not be required. For example, if the first electronic device 110 or the second electronic device 120 is a widely used electronic device manufactured by a well known vendor, the first electronic device 110 or the second electronic device 120 Information about configuration and performance may already be well known. Alternatively, the electronic system 100 may already be aware of information about lanes connected between the first electronic device 110 and the second electronic device 120.

Information about the configuration and performance of the first electronic device 110 and information about the connection of the lane is stored in advance in the second electronic device 120 and the second electronic device 120 is pre- If the device 110 can be identified, the second electronic device 120 may skip the link start-up process and enter a link-up state based on previously stored information. If the link start-up process is omitted, the performance of the first electronic device 110 or the second electronic device 120 can be improved.

3 is a flowchart for explaining the setting of the link-up state according to the embodiment of the present invention. By way of example, the first electronic device 110 or the second electronic device 120 of FIG. 1 may operate according to the process shown in FIG.

In step S110, one electronic device can detect the connection of another electronic device. By way of example, the first electronic device 110 may be physically connected to the second electronic device 120 via a first interface circuit 113 (see FIG. 1). Further, the second electronic device 120 may be physically connected to the first electronic device 110 via a second interface circuit 123 (see FIG. 1). The first electronic device 110 and the second electronic device 120 can sense the connection of the counterpart device. As an example, the steps referred to in the description of FIG. 3 may be performed by the first controller 115 (see FIG. 1) of the first electronic device 110 or the second controller 125 (see FIG. 1) of the second electronic device 120 ). ≪ / RTI >

In step S120, an Identification Code (ID_CODE) may be transmitted between two electronic devices connected to each other. By way of example, the first electronic device 110 may provide an identification code ID_CODE to the second electronic device 120. In this example, the identification code (ID_CODE) may have different values depending on the attributes of the first electronic device 110. As an embodiment, the identification code (ID_CODE) may have different values depending on the type of electronic device and the manufacturer. By way of example, the second electronic device 120 may determine the attributes of the first electronic device 110 based on the value of the provided identification code (ID_CODE). As an example, the second electronic device 120 may determine the type and manufacturer of the first electronic device 110 based on the value of the provided identification code (ID_CODE).

Here, the name "identification code" is used, but the name is not intended to limit the present invention. By way of example, the identification code may be a particular Binary Bit String. Alternatively, the identification code may be a specific signal pattern. The identification code can be changed or modified in various forms. As an example, the identification code may be transmitted in a manner similar to the "TRG_UPR" pattern defined by the UniPro and M-PHY specifications.

For example, if the first electronic device 110 and the second electronic device 120 use the identification code (ID_CODE) of the present invention, step S130 may be performed. As an embodiment, if the second electronic device 120 pre-stores the value of the identification code ID_CODE and is able to identify the first electronic device 110 based on the stored identification code ID_CODE, The device 120 may operate in accordance with step S130. In another embodiment, if the second electronic device 120 is capable of operating in accordance with an embodiment of the present invention, even though the second electronic device 120 is not storing a value of the identification code ID_CODE, The device 120 may operate in accordance with step S130.

In step S130, each of the two electronic devices connected to each other can enter the link-up state. As an example, in step S130, the first electronic device 110 and the second electronic device 120 may enter a link-up state corresponding to the identification code ID_CODE. As will be described in more detail in the description of FIGS. 4 to 12, according to the embodiment of the present invention, the link-up state can be established without link start-up processing that requires exchange of a large amount of information. Therefore, according to the embodiment of the present invention, the link-up state can be set quickly. A link up state established in accordance with an embodiment of the present invention may be referred to as a "fast link up state ".

On the other hand, if the first electronic device 110 and the second electronic device 120 do not use the identification code (ID_CODE) of the present invention, steps S140 through S160 may be performed.

In step S140, two electronic devices connected to each other can exchange lane information. For example, if the first electronic device 110 and the second electronic device 120 operate in accordance with the UniPro and M-PHY interface conventions, step S140 may include the steps of "TRG_UPR0", "TRG_UPR1" TRG_UPR2 "patterns. ≪ / RTI >

In step S150, two electronic devices connected to each other can exchange performance information. As an example, if the first electronic device 110 and the second electronic device 120 operate according to the UniPro and M-PHY interface conventions, step S150 may be performed using the "PACP_CAP_ind" and "PACP_CAP_EXT1_ind" functions ). ≪ / RTI >

In step S160, each of the two electronic devices connected to each other can enter a link-up state. In particular, in step S160, the first electronic device 110 and the second electronic device 120 may enter the link-up state based on the lane information exchanged in step S140 and the performance information exchanged in step S150. According to the steps S140 to S160, a link start-up process for requesting exchange of a large amount of information is performed in order to set the link-up state. The link-up state set in accordance with steps S140 through S160 may be referred to as a "normal link-up state. &Quot;

Here, the term "fast link-up state" is used to emphasize the established link-up state according to an embodiment of the present invention. The state of the electronic device set in the quick link-up state may be the same as or similar to the state of the electronic device set in the general link-up state. However, it will be understood that the time required for setting up the fast link-up state is shorter than the time required for setting the normal link-up state, when the setting of the quick link-up state is compared with the setting of the general link-up state. This is because the setting of the quick link-up state does not require a lot of information exchange, whereas the setting of the general link-up state requires a lot of information exchange. Therefore, according to the embodiment of the present invention, the link-up state can be set quickly. Embodiments of the present invention are further described with reference to Figures 4 to 12. [

4 is a flowchart illustrating a process in which two electronic devices are set in a link-up state according to an embodiment of the present invention. To facilitate understanding of the present invention, it is assumed that the first electronic device 110 is a host (e.g., a device including an application processor). However, as mentioned above, the above assumptions are not intended to limit the invention. In some cases, the second electronic device 120 may be a host.

As shown in Fig. 4, the link start-up process can be performed in a single-end manner in which one electronic device first starts processing. However, unlike the one shown in Fig. 4, the link start-up process can be performed in a both-end manner in which two electronic devices start processing at the same time. The embodiments of the present invention can be modified or modified in various forms as needed. Figure 4 is an illustration for illustrating one of the possible embodiments and is not intended to limit the invention.

First, the first electronic device 110 may be physically connected to the second electronic device 120 via a first interface circuit 113 (see FIG. 1). Further, the second electronic device 120 may be physically connected to the first electronic device 110 via a second interface circuit 123 (see FIG. 1). The first electronic device 110 and the second electronic device 120 can sense the connection of the counterpart device. 4 may be performed under the control of the first controller 115 of the first electronic device 110 and the second controller 125 of the second electronic device 120 have.

In step S210, the first electronic device 110 may provide an identification code ID_CODE to the second electronic device 120. [ The identification code ID_CODE may have different values depending on the attributes of the first electronic device 110. [ As an example, the identification code (ID_CODE) may have different values depending on the type and manufacturer of the first electronic device 110. The second electronic device 120 may determine the attributes of the first electronic device 110 based on the value of the provided identification code ID_CODE. As an example, the second electronic device 120 may determine the type and manufacturer of the first electronic device 110 based on the value of the provided identification code (ID_CODE).

The first electronic device 110 may wait for a waiting time ST after providing the identification code ID_CODE. In particular, the first electronic device 110 may wait for the transmission of a response signal RSP during the waiting time ST. As an example, the waiting time ST may have a specific value. Alternatively, the waiting time ST may have an adjustable value as needed.

In step S220, the second electronic device 120 may enter a link-up state to enable data communication with the first electronic device 110. [ In particular, the state of the second interface circuit 123 of the second electronic device 120 may be set to a link-up state corresponding to the identification code ID_CODE provided in step S210. In an embodiment of the present invention, based on the identification code (ID_CODE), the second electronic device 120 may enter a link-up state without exchanging information with the first electronic device 110. [ Therefore, according to the embodiment of the present invention, the link-up state can be set quickly. A link up state established in accordance with an embodiment of the present invention may be referred to as a fast link up state.

As an embodiment, if the second electronic device 120 pre-stores the value of the identification code ID_CODE and is able to identify the first electronic device 110 based on the stored identification code ID_CODE, The status of the second interface circuit 123 of the device 120 may be set to a fast link up state corresponding to the identification code ID_CODE. In another embodiment, if the second electronic device 120 is capable of operating in accordance with an embodiment of the present invention, even though the second electronic device 120 is not storing a value of the identification code ID_CODE, The status of the second interface circuit 123 of the device 120 may be set to a fast link up state corresponding to the identification code ID_CODE. The setting of the fast link-up state is further described with reference to Figs. 5 to 12. Fig.

In step S230, as an example, the second electronic device 120 may provide a response signal RSP to the first electronic device 110. [ The response signal RSP is a signal corresponding to the identification code ID_CODE. That is, the response signal RSP is a signal for responding to the identification code ID_CODE. When the response signal RSP is provided in the waiting time ST, the first electronic device 110 determines that the identification code ID_CODE has been normally provided to the second electronic device 120 and the second electronic device 120 has received the identification code Lt; RTI ID = 0.0 > (ID_CODE). ≪ / RTI > That is, the second electronic device 120 may inform the first electronic device 110 that it can operate according to an embodiment of the present invention, by providing a response signal RSP.

The first electronic device 110 can grasp the attributes of the second electronic device 120 based on the provided response signal RSP. As an example, the first electronic device 110 may determine the type and manufacturer of the second electronic device 120 based on the response signal RSP provided.

In step S240, the first electronic device 110 may enter a link-up state to enable data communication with the second electronic device 120. [ Specifically, when the response signal RSP is provided in the waiting time ST, the state of the first interface circuit 113 of the first electronic device 110 is changed to the link-up state corresponding to the response signal RSP provided in step S230 Lt; / RTI > In an embodiment of the present invention, based on the response signal RSP, the first electronic device 110 may enter the fast link up state without exchanging information with the second electronic device 120. [ In a fast link up state, stable data communication between the first electronic device 110 and the second electronic device 120 may be enabled.

Step S240 for setting the fast link up state of the first electronic device 110 is performed independently of step S220 for setting the fast link up state of the second electronic device 120. [ Accordingly, step S240 may be performed earlier or later than step S220. Alternatively, step S240 may be performed simultaneously with step S220.

Further, the step S230 is performed independently of the step S220. Accordingly, step S230 may be performed earlier or later than step S220. Alternatively, step S230 may be performed simultaneously with step S220.

According to the embodiment of FIG. 4, the link start-up processing for requesting exchange of a large amount of information can be omitted. The first electronic device 110 may operate in accordance with an embodiment of the present invention based on the response signal RSP. The second electronic device 120 may operate according to an embodiment of the present invention based on the identification code ID_CODE. Thereby, each of the first electronic device 110 and the second electronic device 120 can enter the fast link-up state.

The method of operating the controller according to the embodiment of FIG. 4 may be performed during an initialization operation or a booting operation of the electronic device. Alternatively, the method of operation of the controller according to the embodiment of FIG. 4 may be performed during a recovery operation of an error in the link-up state. According to the embodiment of Fig. 4, the time required for the initialization operation, the boot operation, or the recovery operation of the electronic device can be reduced.

If the response signal RSP is not provided in the waiting time ST, as an example, the first electronic device 110 may operate according to steps S140, S150, and S160 in Fig. If the first electronic device 110 operates in accordance with steps S140, S150, and S160 of FIG. 3, the second electronic device 120 may also operate in accordance with steps S140, S150, and S160 of FIG.

5 is a flowchart illustrating a process in which two electronic devices are set in a link-up state according to an embodiment of the present invention. FIG. 5 is an illustration for illustrating one of the possible embodiments, and not for limiting the present invention.

First, the first electronic device 110 and the second electronic device 120 can sense the connection of the counterpart device. 5 illustrate the steps of the first controller 115 (see FIG. 1) of the first electronic device 110 and the second controller 125 (see FIG. 1) of the second electronic device 120 ). ≪ / RTI >

In step S310, the first electronic device 110 may provide an identification code ID_CODE to the second electronic device 120. [ The second electronic device 120 may determine the attributes of the first electronic device 110 based on the value of the provided identification code ID_CODE. As an example, the second electronic device 120 may determine the type and manufacturer of the first electronic device 110 based on the value of the provided identification code (ID_CODE).

The first electronic device 110 may wait for a waiting time ST after providing the identification code ID_CODE. In particular, the first electronic device 110 may wait for the transmission of a response signal RSP during the waiting time ST.

In step S320, the second electronic device 120 can determine whether the value of the identification code ID_CODE is stored in advance. As an example, the value of the identification code (ID_CODE) may be stored in the memory area of the second electronic device 120 in advance. If the first electronic device 110 is a widely used electronic device manufactured by a well-known vendor, then the second electronic device 120 determines the value of the identification code ID_CODE for identifying the first electronic device 110 Can be stored in advance. If it is determined that the value of the identification code (ID_CODE) is stored in advance in the second electronic device 120, steps S330 and S345 may be performed.

In step S330, as an example, the second electronic device 120 may provide a response signal RSP to the first electronic device 110. [ When the response signal RSP is provided in the waiting time ST, the first electronic device 110 determines that the identification code ID_CODE has been normally provided to the second electronic device 120 and the second electronic device 120 has received the identification code Lt; RTI ID = 0.0 > (ID_CODE). ≪ / RTI > That is, the second electronic device 120 may inform the first electronic device 110 that it can operate according to an embodiment of the present invention, by providing a response signal RSP.

The first electronic device 110 can grasp the attributes of the second electronic device 120 based on the provided response signal RSP. As an example, the first electronic device 110 may determine the type and manufacturer of the second electronic device 120 based on the response signal RSP provided.

In step S340, the first electronic device 110 may determine whether link-up information is stored. The link-up information is information used for establishing a fast link-up state. As an example, the link-up information may include linking information of a lane used for data communication between the first electronic device 110 and the second electronic device 120, performance information of the first electronic device 110, Performance information of the mobile terminal 120, and the like. The description of the link-up information is further described with reference to Fig. As an example, the link-up information may be stored in the memory area of the first electronic device 110. [ If link-up information is stored in the first electronic device 110, step S350 may be performed.

In step S350, the first electronic device 110 may enter a fast link-up state. In particular, the fast link-up state of the first electronic device 110 may be set based on the stored link-up information. As mentioned above, the link-up information is information used for establishing a fast link-up state. Thus, the first electronic device 110 can enter a fast link-up state for data communication with the second electronic device 120 with reference to the link-up information without exchanging information with the second electronic device 120. [ In particular, the fast link up state of the first electronic device 110 is a link up state corresponding to the response signal RSP. Thus, the fast link up state of the first electronic device 110 may be in a state suitable for exchanging data with the second electronic device 120 (e.g., a lane connection, a signal transmission rate, etc.).

In step S345, the second electronic device 120 may determine whether link-up information is stored. As an example, the link-up information may be stored in the memory area of the second electronic device 120. [ If the link-up information is stored in the second electronic device 120, step S355 may be performed.

In step S355, the second electronic device 120 may enter the fast link-up state. In particular, the fast link-up state of the second electronic device 120 may be set based on the stored link-up information. The second electronic device 120 may enter the fast link up state for data communication with the first electronic device 110 with reference to the link up information without exchanging information with the first electronic device 110. [ In particular, the fast link up state of the second electronic device 120 is a link up state corresponding to the identification code ID_CODE. Thus, the fast link up state of the second electronic device 120 may be in a state suitable for exchanging data with the first electronic device 110. [

Steps S340 and S350 for setting the fast link up state of the first electronic device 110 are performed independently of steps S345 and S355 for setting the quick link up state of the second electronic device 120. [ Therefore, steps S340 and S350 may be performed earlier or later than steps S345 and S355. Alternatively, steps S340 and S350 may be performed simultaneously with steps S345 and S355.

Furthermore, step S330 is performed independently of steps S345 and S355. Therefore, step S330 may be performed earlier or later than steps S345 and S355. Alternatively, step S330 may be performed simultaneously with steps S345 and S355.

According to the embodiment of Fig. 5, the link start-up processing for requesting exchange of a large amount of information can be omitted. The first electronic device 110 may identify the second electronic device 120 based on the response signal RSP. The first electronic device 110 may obtain information regarding an appropriate state (e.g., lane connection, signal transmission rate, etc.) to exchange data with the second electronic device 120 based on the stored linkup information. The second electronic device 120 may identify the first electronic device 110 based on the identification code ID_CODE. The second electronic device 120 may obtain information regarding the appropriate state for exchanging data with the first electronic device 110 based on the stored link-up information. Thereby, each of the first electronic device 110 and the second electronic device 120 can enter the fast link-up state.

The method of operating the controller according to the embodiment of FIG. 5 may be performed during an initialization operation or a booting operation of the electronic device. Alternatively, the method of operating the controller according to the embodiment of FIG. 3 may be performed during a recovery operation of an error in the link-up state. According to the embodiment of Fig. 5, the time required for the initialization operation, the boot operation, or the recovery operation of the electronic device can be reduced.

6 is a table for explaining the concept of identification code and link-up information according to an embodiment of the present invention. To facilitate understanding of the present invention, it is assumed that the data of the table shown in Fig. 6 is stored in the memory area of the second electronic device 120 (see Fig. 1). As an example, the second electronic device 120 may store in the memory area an identification code (ID_CODE) and link-up information respectively corresponding to electronic devices having different attributes (e.g., type, manufacturer, etc.).

The second electronic device 120 may be provided with an identification code ID_CODE having a value of "0xA1 " in step S310 (see FIG. 5). The second electronic device 120 may determine in step S320 (see FIG. 5) whether or not the identification code (ID_CODE) having a value of "0xA1" is stored in the memory area. In the embodiment of Fig. 6, an identification code (ID_CODE) having a value of "0xA1 " is stored in the memory area of the second electronic device 120. [ Thus, the second electronic device 120 may recognize that the electronic device having the attribute corresponding to the A device is connected as the first electronic device 110 (see FIG. 1). The second electronic device 120 may provide a response signal RSP to the first electronic device 110 at step S330 (see FIG. 5).

The second electronic device 120 can determine whether link-up information corresponding to the identification code ID_CODE having a value of "0xA1 " is stored in step S345 (see Fig. 5). As described above, the link-up information is information used for establishing a fast link-up state. As an example, the link-up information may include linking information of a lane used for data communication between the first electronic device 110 and the second electronic device 120, performance information of the first electronic device 110, Performance information of the mobile terminal 120, and the like.

In the embodiment of FIG. 6, linkage information for enabling data communication with the A device is stored in the memory area of the second electronic device 120. Thus, the second electronic device 120 can enter the fast link up state based on the link-up information stored in step S355 (see FIG. 5) without exchanging information with the first electronic device 110. [

6, if the second electronic device 120 is provided with an identification code (ID_CODE) having a value of "0xA1 ", then the second electronic device 120 generates 2 It is possible to set interface conditions for exchanging data at a rate of 3Gbps by activating two transmitters and one receiver. The second electronic device 120 may further configure other interface conditions based on the stored link-up information. Thereby, the state of the second electronic device 120 can be set to a fast link-up state corresponding to an identification code (ID_CODE) having a value of "0xA1 ".

Similarly, when the second electronic device 120 is provided with an identification code (ID_CODE) having a value of "0xA2 ", the second electronic device 120 determines that the electronic device having the attribute corresponding to the B device is the first It can be recognized that it is connected as the electronic device 110. If an identification code (ID_CODE) having a value of "0xA2" is provided, the second electronic device 120 refers to the stored link-up information to activate one transmitter and one receiver and exchange data at a speed of 1.5 Gbps Can be set. Thereby, the state of the second electronic device 120 can be set to a fast link-up state corresponding to an identification code (ID_CODE) having a value of "0xA2 ".

Link-up information for interfacing with widely used electronic devices manufactured by well-known vendors may already be known. Thus, if a well-known electronic device is used and link-up information for interfacing with the electronic device is stored in advance according to an embodiment of the present invention, the link start-up process requiring a lot of information exchange can be omitted. Thus, the time required for setting up the link-up state can be reduced.

Other embodiments of the present invention are further described. When the second electronic device 120 is provided with an identification code (ID_CODE) having a value of "0xA4 ", the second electronic device 120 determines that the electronic device having the attribute corresponding to the C device is the first electronic device 110 As shown in FIG. However, in the memory area of the second electronic device 120, link-up information for enabling data communication with the C device is not stored. In this case, the second electronic device 120 may be provided with link-up information regarding the C device when it is first connected to the C device. The second electronic device 120 may store the link-up information provided. If the second electronic device 120 is again provided with an identification code (ID_CODE) having a value of "0xA4 ", the second electronic device 120 may enter a fast link up state based on the stored link up information . This embodiment is further described with reference to FIGS. 7 and 8. FIG.

As another example, assume that the second electronic device 120 is provided with an identification code ID_CODE having a value of "0xA8 " (i.e., the second electronic device 120 is identified with a value of & It is assumed to be associated with the first electronic device 110 providing the code ID_CODE). In the embodiment of FIG. 6, an identification code (ID_CODE) having a value of "0xA8" is not stored in the memory area of the second electronic device 120. In this case, the second electronic device 120 has an identification code ID_CODE having a value of "0xA8 " when first connected to the first electronic device 110 providing the identification code ID_CODE having a value of & Corresponding link-up information can be provided. The second electronic device 120 may store the provided identification code (ID_CODE) and link-up information. If the second electronic device 120 is again provided with an identification code (ID_CODE) having a value of "0xA8 ", the second electronic device 120 may enter a fast link up state based on the stored link up information . This embodiment is further described with reference to FIG.

The first electronic device 110 may store data similar to the data in the table shown in Fig. 6 in a memory area. However, as described above, the first electronic device 110 may operate based on the response signal RSP instead of the identification code ID_CODE. The first electronic device 110 may store response signals RSP and link-up information respectively corresponding to electronic devices having different attributes. If the first electronic device 110 is capable of operating based on the response signal RSP, the first electronic device 110 may be configured to store the link up information stored in the memory area or the link up information provided from the second electronic device 120 It is possible to enter the fast link-up state based on the information. Descriptions of overlapping ranges are omitted.

The types and the number of devices that can be identified by the first electronic device 110 or the second electronic device 120 may be changed or modified differently from those shown in Fig. Further, the link-up information may further include other information necessary for setting the link-up state in addition to the connection information of the lane and the performance information of the electronic device. By way of example, if the first electronic device 110 and the second electronic device 120 operate in accordance with the UniPro and M-PHY interface conventions, the link up information is processed by the link start-up process defined in the UniPro and M- Lt; RTI ID = 0.0 > exchange. ≪ / RTI > The table shown in Fig. 6 is only an example for facilitating understanding of the present invention, and the present invention is not limited by the embodiment of Fig.

When the first electronic device 110 and the second electronic device 120 operate in accordance with a particular interface protocol, the values of the identification code (ID_CODE) and the response signal (RSP) must be different from the defined and reserved values in the interface protocol do. In order to avoid conflict with the already defined interface protocol, the specification and reserved values defined in the specification can not be used as the values of the identification code (ID_CODE) and the response signal (RSP). If the values defined in the specification are avoided, the values of each of the identification code ID_CODE and the response signal RSP can be arbitrarily determined.

However, the value of each of identification code (ID_CODE) and response signal (RSP) may have a fixed value to identify a particular electronic device. As an embodiment, the P company that manufactures the second electronic device 120 negotiates with the Q company that manufactures the first electronic device 110 and sends an identification code (ID_CODE) or a response signal (RSP ) To identify the other party device. However, the above embodiments are merely examples for helping understanding of the present invention.

7 is a flowchart illustrating a process in which two electronic devices are set in a link-up state according to an embodiment of the present invention. FIG. 7 is an illustration for illustrating one of the possible embodiments, and not for limiting the present invention.

First, the first electronic device 110 and the second electronic device 120 can sense the connection of the counterpart device. 7, the steps of the first controller 115 (see FIG. 1) of the first electronic device 110 and the second controller 125 (see FIG. 1) of the second electronic device 120 ). ≪ / RTI >

In step S410, the first electronic device 110 may provide an identification code ID_CODE to the second electronic device 120. [ The second electronic device 120 may be provided with an identification code ID_CODE from the first electronic device 110. [ The description of the identification code (ID_CODE) has been mentioned with reference to Figs. 4 to 6. Descriptions of overlapping ranges are omitted.

The first electronic device 110 may wait for a waiting time ST after providing the identification code ID_CODE. In particular, the first electronic device 110 may wait for the transmission of a response signal RSP during the waiting time ST.

In step S420, the second electronic device 120 may determine whether the value of the identification code ID_CODE is stored in advance. As an example, if the first electronic device 110 is a widely used electronic device manufactured by a well-known vendor, the second electronic device 120 may include an identification code (ID_CODE ) In advance in the memory area. If it is determined that the value of the identification code (ID_CODE) is stored, steps S430 and S445 may be performed.

In step S430, the second electronic device 120 may provide a response signal RSP to the first electronic device 110. [ The description of the response signal RSP has been made with reference to Figs. 4 to 6. Descriptions of overlapping ranges are omitted.

In step S440, the first electronic device 110 may determine whether link-up information is stored. The description of link-up information has been mentioned with reference to Fig. As an example, the link-up information may be stored in the memory area of the first electronic device 110. [ If the link-up information is stored in the first electronic device 110, step S450 may be performed.

In step S450, the first electronic device 110 may enter a fast link up state. In particular, the state of the first interface circuit 113 (see FIG. 1) of the first electronic device 110 can be set to a fast link-up state based on the response signal RSP and the stored link-up information.

In step S445, the second electronic device 120 may determine whether link-up information is stored. 6, however, the link-up information for one or more of the electronic devices may not be stored in the memory area of the second electronic device 120 (e.g., C in FIG. 6) Link-up information about the device may not be stored in the memory area of the second electronic device 120). If the link-up information is not stored in the second electronic device 120, steps S460 to S490 may be performed.

In step S460, the second electronic device 120 may send a request signal REQ to the first electronic device 110. [ The request signal REQ is a signal for requesting information necessary for setting up a fast link-up state. As an example, the second electronic device 120 may transmit the request signal REQ to send the lane connection information of the first electronic device 110, the performance information of the first electronic device 110, etc. to the first electronic device 110 ).

In step S470, the first electronic device 110 may provide the second electronic device 120 with the link-up information INFO necessary for setting up the fast link-up state. As an example, the second electronic device 120 may be provided with the lane connection information and performance information of the first electronic device 110. However, the present invention is not limited to the above embodiments. The second electronic device 120 may be further provided with other information necessary for establishing a fast link up state in addition to the lane connection information and performance information.

As an embodiment, the transmission of the request signal (REQ) in step S460 and the provision of the link-up information INFO in step S470 may be performed by an additional or separately defined process. As another embodiment, the transmission of the request signal (REQ) in step S460 and the link-up information INFO of step S470 may be performed by a process similar to the link start-up process defined by the UniPro interface specification.

In step S480, the second electronic device 120 may enter the fast link-up state. In particular, the fast link-up state of the second electronic device 120 may be set based on link-up information INFO (e.g., lane connection information, performance information, etc.) provided in step S470. Unlike step S355 in FIG. 5, in step S480, the fast link-up state of the second electronic device 120 may be set based on link-up information INFO provided separately, rather than previously stored link-up information. However, the setting of the quick link-up state can be set through a process similar to that described with reference to Figs. 4 to 6. Fig.

In step S490, the second electronic device 120 may store link-up information INFO (e.g., lane connection information, performance information, etc.) provided in step S470 in the memory area. If the first electronic device 110 is reconnected to the second electronic device 120 after the connection between the first electronic device 110 and the second electronic device 120 is released, If the operation is performed, the link-up information stored in step S490 may be referred to. That is, if the second electronic device 120 is again provided with the identification code ID_CODE from the first electronic device 110, the second electronic device 120 may perform step S490 without exchanging information with the first electronic device 110 Up state based on the link-up information stored in the link-up state. This embodiment is further described with reference to Fig.

Steps S440 and S450 are performed independently of step S445. Accordingly, steps S440 and S450 may be performed earlier or later than step S445. Alternatively, steps S440 and S450 may be performed simultaneously with step S445. Furthermore, step S430 is performed independently of step S445. Accordingly, step S430 may be performed earlier or later than step S445. Alternatively, step S430 may be performed simultaneously with step S445.

7 illustrates that steps S440 and S450 are performed before steps S460 and S470. However, steps S440 and S450 may be performed later than steps S460 and S470, or may be performed simultaneously with steps S460 and S470. After steps S460 and S470 have been performed, steps S480 and S490 may be performed at any time. Furthermore, step S480 is performed independently of step S490. Accordingly, step S480 may be performed earlier or later than step S490. Alternatively, step S480 may be performed simultaneously with step S490.

8 is a flowchart illustrating a process in which two electronic devices are set in a link-up state according to an embodiment of the present invention. Figure 8 is an illustration for illustrating one of the possible embodiments and is not intended to limit the invention.

First, the first electronic device 110 and the second electronic device 120 can sense the connection of the counterpart device. 8) of the first electronic device 110 and the second controller 125 (see FIG. 1) of the second electronic device 120. In the embodiment of FIG. ). ≪ / RTI >

In step S510, the first electronic device 110 may provide an identification code ID_CODE to the second electronic device 120. [ The second electronic device 120 may be provided with an identification code ID_CODE from the first electronic device 110. [ The description of the identification code (ID_CODE) has been given in the description of Figs. 4 to 6. Descriptions of overlapping ranges are omitted.

The first electronic device 110 may wait for a waiting time ST after providing the identification code ID_CODE. In particular, the first electronic device 110 may wait for the transmission of a response signal RSP during the waiting time ST.

In step S520, the second electronic device 120 may determine whether the value of the identification code ID_CODE is stored in advance. As an example, if the first electronic device 110 is a widely used electronic device manufactured by a well-known vendor, the second electronic device 120 may include an identification code (ID_CODE ) In advance in the memory area. If it is determined that the value of the identification code ID_CODE is stored in advance in the second electronic device 120, steps S530 and S545 may be performed.

In step S530, the second electronic device 120 may provide a response signal RSP to the first electronic device 110. [ The description of the response signal RSP has been made with reference to Figs. 4 to 6. Descriptions of overlapping ranges are omitted.

In step S540, the first electronic device 110 may determine whether link-up information is stored. The description of link-up information has been mentioned with reference to Fig. 6, however, the link-up information for one or more of the electronic devices may not be stored in the memory area of the first electronic device 110. For example, If the link-up information is not stored in the first electronic device 110, steps S560 to S590 may be performed.

In step S560, the first electronic device 110 may send a request signal REQ to the second electronic device 120. [ The request signal REQ is a signal for requesting information necessary for setting up a fast link-up state. The first electronic device 110 may transmit the request signal REQ to send the second electronic device 120 lane connection information, the second electronic device 120 performance information, etc. to the second electronic device 120 ).

In step S570, the second electronic device 120 may provide the first electronic device 110 with the link-up information INFO required for setting up the fast link-up state. As an example, the first electronic device 110 may be provided with the lane connection information and performance information of the second electronic device 120. [ However, the present invention is not limited to the above embodiments. The first electronic device 110 may be further provided with other information necessary for establishing a fast link-up state in addition to the lane connection information and performance information.

As an embodiment, the transmission of the request signal (REQ) in step S560 and the provision of the link-up information INFO in step S570 may be performed in addition or separately defined processes. As another embodiment, the transmission of the request signal (REQ) in step S560 and the link-up information INFO of step S570 may be performed by a process similar to the link start-up process defined by the UniPro interface specification.

In step S580, the first electronic device 110 may enter the fast link up state. In particular, the fast link-up state of the first electronic device 110 may be set based on link-up information INFO (e.g., lane connection information, performance information, etc.) provided in step S570. In step S580, unlike step S350 in FIG. 5, the fast link-up state of the first electronic device 110 may be set based on link-up information INFO provided separately, rather than previously stored link-up information. However, the setting of the quick link-up state can be set through a process similar to that described with reference to Figs. 4 to 6. Fig.

In step S590, the first electronic device 110 may store link-up information INFO (e.g., lane connection information, performance information, etc.) provided in step S570 in the memory area. If the first electronic device 110 is reconnected to the second electronic device 120 after the connection between the first electronic device 110 and the second electronic device 120 is released, If the operation is performed, the link-up information stored in step S590 may be referred to. That is, when the first electronic device 110 provides the identification code ID_CODE to the second electronic device 120 and receives the response signal RSP again from the second electronic device 120, 110 may enter the fast link-up state based on the link-up information stored in step S590 without exchanging information with the second electronic device 120. [ This embodiment is further described with reference to Fig.

In step S545, the second electronic device 120 may determine whether link-up information is stored. As an example, the link-up information may be stored in the memory area of the second electronic device 120. [ If the link-up information is stored in the second electronic device 120, step S555 may be performed.

In step S555, the second electronic device 120 may enter the fast link-up state. In particular, the fast link-up state of the second electronic device 120 may be set based on the stored link-up information.

Step S540 is performed independently of steps S545 and S555. Accordingly, step S540 may be performed earlier or later than steps S545 and S555. Alternatively, step S540 may be performed simultaneously with steps S545 and S555. Furthermore, step S530 is performed independently of steps S545 and S555. Accordingly, step S530 may be performed earlier or later than steps S545 and S555. Alternatively, step S530 may be performed simultaneously with steps S545 and S555.

8 illustrates that steps S545 and S555 are performed prior to steps S560 and S570. However, steps S545 and S555 may be performed later than steps S560 and S570, or may be performed simultaneously with steps S560 and S570. After steps S560 and S570 have been performed, steps S580 and S590 may be performed at any time. Furthermore, step S580 is performed independently of step S590. Accordingly, step S580 may be performed earlier or later than step S590. Alternatively, step S580 may be performed simultaneously with step S590.

9 is a flowchart illustrating a process in which two electronic devices are set in a link-up state according to an embodiment of the present invention. Figure 9 is an illustration to illustrate one of the possible embodiments and is not intended to limit the invention.

First, the first electronic device 110 and the second electronic device 120 can sense the connection of the counterpart device. As an example, the steps referred to in the description of FIG. 9 may be performed by the first controller 115 (see FIG. 1) of the first electronic device 110 and the second controller 125 (see FIG. 1) of the second electronic device 120 ). ≪ / RTI >

In step S610, the first electronic device 110 may provide the identification code ID_CODE to the second electronic device 120. [ The second electronic device 120 may be provided with an identification code ID_CODE from the first electronic device 110. [ The description of the identification code (ID_CODE) has been mentioned with reference to Figs. 4 to 6. Descriptions of overlapping ranges are omitted.

The first electronic device 110 may wait for a waiting time ST after providing the identification code ID_CODE. In particular, the first electronic device 110 may wait for the transmission of a response signal RSP during the waiting time ST.

In step S620, the second electronic device 120 may determine whether the value of the identification code ID_CODE is stored in advance. 6, the value of the identification code (ID_CODE) for one or more of the electronic devices may not be stored in the memory area of the second electronic device 120 (e.g., 6, an identification code (ID_CODE) having a value of "0xA8 " may not be stored in the memory area of the second electronic device 120). If it is determined that the value of the identification code (ID_CODE) is not stored, steps S630 and S640 may be performed.

In step S630, the second electronic device 120 may provide a response signal RSP to the first electronic device 110. [ If the second electronic device 120 can operate based on the identification code ID_CODE even though the value of the identification code ID_CODE is not stored in the memory area of the second electronic device 120, The controller 120 can output the response signal RSP. As such, the first electronic device 110 may recognize that the second electronic device 120 may operate in accordance with an embodiment of the present invention. The description of the response signal RSP has been made with reference to Figs. 4 to 6. Descriptions of overlapping ranges are omitted.

In step S640, the second electronic device 120 may store the value of the identification code ID_CODE provided in step S610 in the memory area. If the first electronic device 110 is reconnected to the second electronic device 120 after the connection between the first electronic device 110 and the second electronic device 120 is released, If the operation is performed, the value of the identification code (ID_CODE) stored in step S640 may be referred to.

In step S650, the first electronic device 110 and the second electronic device 120 may exchange the lane connection information LA_INFO with each other. As an embodiment, when the first electronic device 110 and the second electronic device 120 operate in accordance with the UniPro interface protocol, the lane connection information LA_INFO includes "TRG_UPR0", "TRG_UPR1", " And "TRG_UPR2" patterns. However, this embodiment is an example for helping understanding of the present invention, and the present invention is not limited by this embodiment.

In step S655, the first electronic device 110 and the second electronic device 120 can exchange performance information CAP_INFO with each other. As an example, when the first electronic device 110 and the second electronic device 120 operate in accordance with the UniPro interface protocol, the performance information CAP_INFO may include the "PACP_CAP_ind " and" PACP_CAP_EXT1_ind " Functions can be exchanged in a similar manner. However, this embodiment is an example for helping understanding of the present invention, and the present invention is not limited by this embodiment.

Steps S650 and S655 are mentioned as examples. However, the first electronic device 110 and the second electronic device 120 may further exchange other information needed to establish a link-up state. After steps S650 and S655 are performed, steps S660 to S675 may be performed.

In step S660, the first electronic device 110 may enter the link-up state. In particular, the state of the first interface circuit 113 (see FIG. 1) of the first electronic device 110 may be set to a link up state based on the response signal RSP, and the information exchanged in steps S650 and S655 .

In step S670, the first electronic device 110 may store the information exchanged in steps S650 and S655 in the memory area. If the first electronic device 110 is reconnected to the second electronic device 120 after the connection between the first electronic device 110 and the second electronic device 120 is released, If the operation is performed, the information stored in step S670 may be referred to. That is, when the first electronic device 110 provides the identification code ID_CODE to the second electronic device 120 and receives the response signal RSP again from the second electronic device 120, 110 may enter the fast link up state based on the information stored in step S670 without exchanging information with the second electronic device 120. [ This embodiment is further described with reference to Fig.

In step S665, the second electronic device 120 may enter a link-up state. In particular, the state of the second interface circuit 123 (see FIG. 1) of the second electronic device 120 can be set to a link-up state based on the identification code ID_CODE, and the information exchanged in steps S650 and S655 .

In step S675, the second electronic device 120 may store the information exchanged in steps S650 and S655 in the memory area. If the first electronic device 110 is reconnected to the second electronic device 120 after the connection between the first electronic device 110 and the second electronic device 120 is released, If the operation is performed, the information stored in step S675 may be referred to. That is, if the second electronic device 120 is again provided with the identification code ID_CODE from the first electronic device 110, then the second electronic device 120 does not exchange information with the first electronic device 110, (ID_CODE) stored in step S675 and the information stored in step S675. This embodiment is further described with reference to Fig.

The step S640 is performed independently of the step S630. Accordingly, step S640 may be performed earlier or later than step S630. Alternatively, step S640 may be performed simultaneously with step S630. Further, step S640 may be performed earlier or later than steps S650 through S675. Alternatively, step S640 may be performed simultaneously with steps S650 to S675.

Steps S660 and S670 may be performed earlier or later than steps S665 and S675. Alternatively, steps S660 and S670 may be performed simultaneously with steps S665 and S675. After steps S650 and S655 have been performed, steps S660 through S675 may be performed at any time.

The step S660 is performed independently of the step S670. Accordingly, step S660 may be performed earlier or later than step S670. Alternatively, step S660 may be performed simultaneously with step S670. The step S665 is performed independently of the step S675. Accordingly, step S665 may be performed earlier or later than step S675. Alternatively, step S665 may be performed simultaneously with step S675.

10 is a flow chart illustrating the operation of an electronic device according to an embodiment of the present invention. In particular, FIG. 10 illustrates the operation of the first electronic device 110 of FIG. As an example, the steps referred to in the description of FIG. 10 may be performed under the control of the first controller 115 (see FIG. 1) included in the first electronic device 110. As an example, the first electronic device 110 may be a host (e.g., a device including an application processor), but the invention is not limited to this embodiment.

In step S710, the first electronic device 110 may sense the connection of the second electronic device 120 (see FIG. 1). The first electronic device 110 may be physically connected to the second electronic device 120 via a first interface circuit 113 (see FIG. 1).

In step 720, the first electronic device 110 may provide an identification code (ID_CODE) to the second electronic device 120. The identification code ID_CODE may have different values depending on the attributes of the first electronic device 110 (e.g., type, manufacturer, etc.). The identification code ID_CODE must have a value different from the defined and reserved values in the interface protocol defining the operating procedure of the first interface circuit 113. A detailed description of the identification code (ID_CODE) is omitted.

In step 730, the first electronic device 110 may wait for a waiting time ST. In particular, the first electronic device 110 may await the transmission of a response signal RSP corresponding to the identification code ID_CODE from the second electronic device 120 during the standby time ST. The status of the first interface circuit 113 of the first electronic device 110 can be set to a fast link up state corresponding to the response signal RSP when the response signal RSP is transmitted within the waiting time ST . The setting of the quick link-up state can be performed in steps S740 to S764.

In step S740, the first electronic device 110 can determine whether link-up information is stored in the memory area. The link-up information is information (e.g., lane connection information, performance information, and the like) used for establishing a fast link-up state. Detailed description of link-up information is omitted. If the link-up information is stored in the first electronic device 110, step S750 may be performed. On the other hand, if the link-up information is not stored in the first electronic device 110, step S760 may be performed.

In step S750, the first electronic device 110 may enter the fast link up state. In particular, the state of the first interface circuit 113 of the first electronic device 110 may be set to a fast link-up state corresponding to the response signal RSP based on the stored link-up information.

In step S760, the first electronic device 110 may be provided with link-up information necessary for setting up the fast link-up state from the second electronic device 120. [ As an example, the first electronic device 110 may be provided with the lane connection information and performance information of the second electronic device 120. [ However, the present invention is not limited to the above embodiments. The first electronic device 110 may be further provided with other information necessary for establishing a fast link-up state in addition to the lane connection information and performance information.

In step S762, the first electronic device 110 may enter the fast link up state. In particular, the state of the first electronic device 110 may be set to a fast link-up state corresponding to the response signal RSP based on the link-up information provided in step S760.

In step S764, the first electronic device 110 may store the link-up information provided in step S760 in the memory area. If the first electronic device 110 is reconnected to the second electronic device 120 after the connection between the first electronic device 110 and the second electronic device 120 is released, If the operation is performed, the link-up information stored in step S764 may be referred to. This embodiment is further described with reference to Fig.

The step S764 is performed independently of the step S762. Accordingly, step S764 may be performed earlier or later than step S762. Alternatively, step S764 may be performed simultaneously with step S762.

11 is a flowchart illustrating the operation of the electronic device according to the embodiment of the present invention. In particular, FIG. 11 illustrates the operation of the second electronic device 120 of FIG. As an example, the steps referred to in the description of FIG. 11 may be performed in accordance with the control of the second controller 125 (see FIG. 1) included in the second electronic device 120. As an example, the second electronic device 120 may be a storage device including a non-volatile memory and a second controller 125, but the invention is not limited to this embodiment.

In step 810, the second electronic device 120 may sense the connection of the first electronic device 110 (see FIG. 1). The second electronic device 120 may be physically connected to the first electronic device 110 via a second interface circuit 123 (see FIG. 1).

In step S820, the second electronic device 120 may be provided with an identification code ID_CODE from the first electronic device 110. [ A detailed description of the identification code (ID_CODE) is omitted. If the identification code ID_CODE is provided, the state of the second interface circuit 123 of the second electronic device 120 may be set to a fast link up state corresponding to the identification code ID_CODE. The setting of the quick link-up state may be performed in steps S830 to S874.

In step S830, the second electronic device 120 can determine whether the value of the identification code (ID_CODE) provided in step S820 is stored in advance in the memory area. If the value of the identification code ID_CODE is not previously stored in the second electronic device 120, the second electronic device 120 may store the value of the identification code ID_CODE in the memory area in step S835.

In step 840, as an example, the second electronic device 120 may provide the first electronic device 110 with a response signal RSP corresponding to the identification code ID_CODE. The second electronic device 120 may inform the first electronic device 110 that it can operate in accordance with an embodiment of the present invention by providing a response signal RSP within a waiting time ST.

In step S850, the second electronic device 120 can determine whether or not link-up information is stored in the memory area. Detailed description of link-up information is omitted. If the link-up information is stored in the second electronic device 120, step S860 may be performed. On the other hand, if link-up information is not stored in the second electronic device 120, step S870 may be performed.

In step 860, the second electronic device 120 may enter a fast link up state. In particular, the state of the second electronic device 120 may be set to a fast link-up state corresponding to the identification code ID_CODE based on the stored link-up information.

In step S870, the second electronic device 120 may be provided with link-up information necessary for setting the fast link-up state from the first electronic device 110. [ As an example, the second electronic device 120 may be provided with the lane connection information and performance information of the first electronic device 110. However, the present invention is not limited to the above embodiments. The second electronic device 120 may be further provided with other information necessary for establishing a fast link up state in addition to the lane connection information and performance information.

In step S872, the second electronic device 120 may enter a fast link-up state. In particular, the state of the second electronic device 120 may be set to a fast link-up state corresponding to the identification code (ID_CODE) based on the link-up information provided in step S870.

In step S874, the second electronic device 120 may store the link-up information provided in step S870 in the memory area. If the first electronic device 110 is reconnected to the second electronic device 120 after the connection between the first electronic device 110 and the second electronic device 120 is released, If the operation is performed, the link-up information stored in step S874 may be referred to. This embodiment is further described with reference to Fig.

The step S874 is performed independently of the step S872. Accordingly, step S874 may be performed earlier or later than step S872. Alternatively, step S874 may be performed simultaneously with step S872.

12 is a flowchart illustrating restoration of a fast link-up state according to an embodiment of the present invention. To facilitate understanding of the present invention, restoration of the fast link up state of the second electronic device 120 of FIG. 1 is described. Restoration of the fast link up state of the first electronic device 110 of FIG. 1 may be performed by steps similar to those described below. A detailed description of restoration of the fast link-up state of the first electronic device 110 is omitted. As an example, the steps referred to in the description of FIG. 12 may be performed under the control of the second controller 125 (see FIG. 1) included in the second electronic device 120.

In step S910, the second electronic device 120 may detect reconnection of the first electronic device 110. [ As an example, restoration of the fast link-up state may be achieved when the first electronic device 110 is reconnected to the second electronic device 120 after the first electronic device 110 and the second electronic device 120 are disconnected . ≪ / RTI > Alternatively, in step S910, the second electronic device 120 may detect an error related to the link-up state. By way of example, restoration of the fast link up state may be performed to recover an error in the link-up state of the second electronic device 120. [

In step S920, the second electronic device 120 may be provided with the identification code ID_CODE from the first electronic device 110. [ A detailed description of the identification code (ID_CODE) is omitted. The second electronic device 120 may restore the fast link up state based on the identification code ID_CODE.

In operation S930, as an example, the second electronic device 120 may provide a response signal RSP corresponding to the identification code ID_CODE to the first electronic device 110. [ A detailed description of the response signal RSP is omitted.

In step S940, the second electronic device 120 may enter the fast link-up state. In particular, the state of the second interface circuit 123 (see FIG. 1) of the second electronic device 120 may be set to a fast link up state corresponding to the identification code ID_CODE. The setting of the fast link-up state may be performed based on the value of the stored identification code ID_CODE and the stored link-up information (e.g., lane connection information of the first electronic device, performance information, etc.).

When restoration of the fast link-up state is performed, the value of the identification code (ID_CODE) and link-up information may already be stored. The value of the stored identification code (ID_CODE) and the stored link-up information can be referred to for restoring the fast link-up state. According to the embodiment of the present invention, when the fast link up state is restored, the link start-up processing for requesting exchange of a large amount of information can be omitted. That is, the second electronic device 120 can restore the fast link-up state by referring to the stored link-up information without exchanging information with the first electronic device 110. [ Therefore, according to the embodiment of the present invention, the time required for restoration of the link-up state can be reduced.

The step S940 is performed independently of the step S930. Therefore, step S940 may be performed before or after step S930. Alternatively, step S940 may be performed simultaneously with step S930.

13 is a block diagram showing a configuration of a storage system according to an embodiment of the present invention. The storage system 200 may include a host 210 and a storage device 220.

Host 210 may be the first electronic device 110 of FIG. As an example, when the storage system 200 is implemented in a mobile electronic system, the host 210 may include an application processor.

The storage device 220 may be the second electronic device 120 of FIG. The storage device 220 according to an embodiment of the present invention may include a non-volatile memory 221, an interface circuit 223, and a controller 225. The interface circuit 223 may include a physical layer PL and a link layer LL. However, the storage device 220 may further include other components not shown in Fig. The configuration shown in Fig. 13 is only an example for facilitating understanding of the present invention. The description of the configuration of the storage device 220 will be described in detail with reference to FIGS. 14 and 15. FIG.

14 is a block diagram showing the configuration of the storage device of Fig. The storage device 220 according to an embodiment of the present invention may include a non-volatile memory 221, an interface circuit 223, and a controller 225.

The nonvolatile memory 221 can store data regardless of whether power is supplied or not. In an embodiment of the present invention, the non-volatile memory 221 may store one or more identification codes. The one or more identification codes may each correspond to one or more link-up states for hosts having different attributes (see FIG. 6). A detailed description of the identification code is omitted.

As an example, the value of each of the one or more identification codes may be stored directly (i.e., physically) in the memory cells included in the non-volatile memory 221. In this embodiment, the value of each of the one or more identification codes may be read directly from the memory cell. In another embodiment, the value of each of the one or more identification codes may be stored in software form. For example, the value of each of the one or more identification codes may be inserted into the program command. When a program command is executed, the value of each of the one or more identification codes can be extracted. As an embodiment, the program command may be a code stored in firmware or ROM (Read-Only Memory). The program instructions may be stored in the nonvolatile memory 221 in binary data form.

Further, in an embodiment of the present invention, the non-volatile memory 221 may further store one or more link-up information. The one or more link-up information may each be used to establish one or more link-up states, respectively. As an embodiment, the link-up information includes link information of a lane used for data communication with the host 210, performance information of a physical layer (PL), performance information of a link layer (LL) And may include at least one. Detailed description of the link up state and link up information is omitted.

As an example, data values corresponding to one or more link-up information may be stored directly (i.e., physically) in memory cells included in non-volatile memory 221. In this embodiment, the data value corresponding to the link-up information may be read directly from the memory cell. As another example, data values corresponding to one or more link-up information may be stored in software form. For example, data values corresponding to one or more link-up information may be inserted into a program command. When the program command is executed, the data value corresponding to the link-up information can be extracted. As an example, the program instructions may be code stored in firmware or ROM. The program instructions may be stored in the nonvolatile memory 221 in binary data form.

As an example, the non-volatile memory 221 may be utilized as a storage memory configured to perform a unique function of the storage device 220. [ In another embodiment, the non-volatile memory 221 may be a memory separately provided from the storage memory. In other words, one or more identification codes according to an embodiment of the present invention may be stored in a storage memory or in a memory separately provided from the storage memory.

As an example, the value of each of the one or more identification codes may be stored in the same nonvolatile memory 221 along with the data values corresponding to the one or more linkup information. In this embodiment, one nonvolatile memory 221 may be provided. Furthermore, a particular area of memory may be allocated to store the value of each of the one or more identification codes and the data values corresponding to the one or more link-up information. As another embodiment, two or more nonvolatile memories 221 may be provided. In this embodiment, the non-volatile memory storing the value of each of the one or more identification codes may be different from the non-volatile memory storing the data values corresponding to the one or more link-up information.

The interface circuit 223 according to an embodiment of the present invention may include a physical layer PL and a link layer LL. The interface circuit 223 can operate according to an interface protocol using the physical layer PL and the link layer LL. The interface circuit 223 can exchange data (DAT) with the host 210. Further, the interface circuit 223 can exchange control signals CTL with the host 210. [ For example, the control signals CTL may include a power supply signal, a clock signal, a reset signal, and the like.

As an embodiment, when the storage device 220 is implemented in a mobile electronic system, the link layer LL may be defined by the UniPro specification, and the physical layer PL may be defined by the M-PHY specification. The physical layer PL may include physical configurations (e.g., one or more transmitters and one or more receivers) for exchanging data with the host 210. The link layer LL manages the transmission and combination of data, and can manage the integrity and error of the data. In this embodiment, the link layer LL of the interface circuit 223 may further include a physical adaptation layer (not shown).

The controller 225 according to the embodiment of the present invention may include a discrimination circuit 227 and a state setting circuit 228. [ The controller 225 can manage and control the overall operation of the storage device 220. In particular, the controller 225 can process and manage data exchanged with the host 210 via the interface circuit 223. [

As an embodiment, the controller 225 may control the storage memory according to the UFS interface protocol proposed by JEDEC, but the present invention is not limited to this embodiment. For example, the controller 225 may be any of a variety of devices, such as a Universal Serial Bus (USB), a Small Computer System Interface (SCSI), a Peripheral Component Interconnect Express (PCIe), a Mobile PCIe (M-PCIe), an Advanced Technology Attachment (ATA) ), SATA (Serial ATA), SAS (Serial Attached SCSI), IDE (Integrated Drive Electronics), and the like.

In accordance with the control of the controller 225, the storage device 220 can perform its own functions. For example, when the nonvolatile memory 221 is used as a storage memory, the controller 225 may store data provided from the host 210 via the interface circuit 223 in the nonvolatile memory 221. [ Alternatively, the controller 225 may provide the data stored in the non-volatile memory 221 to the host 210 via the interface circuit 223. [

In an embodiment of the present invention, the controller 225 may sense the connection of the host 210 to the interface circuit 223. The controller 225 may be provided with an identification code corresponding to the attribute of the host 210. [ As an example, the controller 225 may provide the host 210 with a response signal corresponding to the identification code. A detailed description of the identification code and the response signal is omitted.

The determination circuit 227 can determine whether or not the identification code having the same value as the provided identification code is stored in the nonvolatile memory 221. [ If the identification code is not stored in the nonvolatile memory 221, the value of the provided identification code can be stored in the nonvolatile memory 221 under the control of the controller 225. [ In order to set the quick link-up state, the determination circuit 227 can determine whether or not the target link-up information is stored in the nonvolatile memory 221. [ The target link-up information is link-up information used for setting a fast link-up state among one or more link-up information.

The state setting circuit 228 can set the state of the storage device 220 to a fast link-up state. In particular, the status setting circuit 228 can set the status of the physical layer PL and the link layer LL to a fast link up state corresponding to the received identification code. The state setting circuit 228 can set the state of the physical layer PL and the link layer LL to the fast link up state based on the target linkup information stored in the nonvolatile memory 221. [ When the fast link up state is set, data communication between the host 210 and the storage device 220 can be activated.

The controller 225 can be provided with the lane connection information and performance information of the host 210 when it is determined that the target link up information is not stored in the nonvolatile memory 221. [ However, this is only an example, and the controller 225 may be further provided with other information necessary for establishing a fast link-up state in addition to the lane connection information and performance information. The state setting circuit 228 can set the state of the physical layer PL and the link layer LL to a fast link up state based on the provided information. Further, according to the control of the controller 225, the provided information can be stored in the nonvolatile memory 221.

As an embodiment, the stored identification code (ID_CODE) and the stored link-up information may be referred to for restoring the fast link-up state. For example, the restoration of the link-up state may be performed when reconnection of the host 210 to the interface circuit 223 is detected after the connection between the host 210 and the storage device 220 is released, Can be performed when an error is detected.

When the restoration of the link-up state is performed, the controller 225 may be provided with the identification code corresponding to the attribute of the host 210 again. Further, the controller 225 may provide the host 210 with a response signal corresponding to the identification code. The state setting circuit 228 sets the state of the physical layer PL and the link layer LL to a fast link up state based on the value of the stored identification code and stored information (e.g., stored lane connection information, stored performance information, Can be restored.

State setting circuit 228 directly (i.e., physically or electrically) states the physical layer PL and the link layer LL based on the target link-up information stored in the nonvolatile memory 221. [ It can be set to a fast link-up state. In another embodiment, the status setting circuit 228 may set the status of the physical layer PL and the link layer LL to a fast link up state using a program command. For example, when the target link-up information is inserted into the program command and the program command is executed by the controller 225, the status setting circuit 228 extracts the target link-up information embedded in the program command, And the link layer LL can be set to the fast link-up state.

Storage device 220 may operate in accordance with embodiments of the present invention using controller 225, discrimination circuitry 227, and state setting circuitry 228. The storage device 220 may operate according to the procedures described in the description of FIGS. Duplicate descriptions are omitted.

In the description of Fig. 14, the configuration of the controller 225 included in the storage device 220 is mentioned. 3 to 12, the host 210 may also include a controller having a similar configuration and function to the controller 225 of the storage device 220. [ A detailed description of the host 210 is omitted.

As mentioned above, the storage device 220 may include a storage memory configured to perform a unique function of the storage device 220. As an embodiment, the non-volatile memory 221, the interface circuit 223, the controller 225, and the storage memory may be embodied in an embedded storage embedded in a mobile electronic system. In another embodiment, the non-volatile memory 221, the interface circuit 223, the controller 225, and the storage memory may be implemented in a card storage connected to a mobile electronic system. However, the present invention is not limited to the above embodiments. Storage device 220 may be implemented with other types of storage.

15 is a block diagram showing the configuration of the storage device of Fig. The storage device 220 according to an embodiment of the present invention may include a non-volatile memory 221, an interface circuit 223, and a controller 225.

14, the discrimination circuit 227 and the status setting circuit 228 may be included in the link layer LL of the interface circuit 223 instead of the controller 225. In this case, That is, embodiments of the present invention may be modified or modified in various forms as needed. The present invention is not limited to the embodiments described above. The description of the configuration and functions of the nonvolatile memory 221, the interface circuit 223, the controller 225, the discrimination circuit 227 and the state setting circuit 228 has already been described with reference to Fig. Duplicate descriptions are omitted.

16 is a block diagram illustrating a configuration of a storage system including an embedded storage or a card storage according to an embodiment of the present invention. The storage system 2000 may include a host 2100 and an embedded or card storage 2200 (hereinafter referred to as an embedded / card storage).

A host 2100 according to an embodiment of the present invention may include an application 2110, a device driver 2120, a host interface 2130, a host controller 2140, and a buffer memory 2150. However, the configuration of the host 2100 shown in Fig. 16 is merely an example for facilitating understanding of the present invention. The host 2100 may further include other components not shown in FIG. Alternatively, the host 2100 may not include one or more of the components shown in FIG.

The application 2110 can manage various kinds of application programs executed in the host 2100. The device driver 2120 can manage and operate the peripheral devices connected to the host 2100. In the embodiment of FIG. 16, the device driver 2120 may drive the embedded / card storage 2200. Application 2110 and device driver 2120 may be implemented as program instructions, e.g., firmware.

The host interface 2130 is connected to the embedded / card storage 2200 and a signal (e.g., a reset signal RST, a clock signal CLK, etc.) and data (e.g., input data DIN, output data DOUT, Exchangeable. The host interface 2130 may include a physical layer (PLH) and a link layer (LLH). As an example, the host interface 2130 may communicate with the embedded / card storage 2200 in accordance with an interface protocol using a physical layer (PLH) and a link layer (LLH).

The host controller 2140 can manage and control the overall operation of the host 2100. The host controller 2140 may process and manage data exchanged with the embedded / card storage 2200 via the host interface 2130.

In the embodiment of the present invention, the host controller 2140 may include a nonvolatile memory 2141, a discrimination circuit 2143, and a state setting circuit 2145. [ The configuration and functions of the nonvolatile memory 2141, the discrimination circuit 2143 and the state setting circuit 2145 are the same as those of the nonvolatile memory 221, the discrimination circuit 227 and the state setting circuit 228 And can cope with configuration and function. By way of example, the non-volatile memory 2141 can store the information of the response signal corresponding to the identification code and the link-up information. For example, the states of the physical layer PLH and the link layer LLH may be set to "fast link up state" according to the operation of the determination circuit 2143 and the state setting circuit 2145. [ The host 2100 can operate according to an embodiment of the present invention using the nonvolatile memory 2141, the discrimination circuit 2143, and the state setting circuit 2145. [ Host 2100 may operate in accordance with the process described in the description of Figures 3-12. Duplicate descriptions are omitted.

16, the nonvolatile memory 2141, the discrimination circuit 2143, and the state setting circuit 2145 can be included in the host controller 2140. [ However, the nonvolatile memory 2141, the determination circuit 2143, and the state setting circuit 2145 may be implemented as separate circuits from the host controller 2140, if necessary. Alternatively, the determination circuit 2143 and the status setting circuit 2145 may be included in the link layer (LLH) of the host interface 2130. The configuration shown in Fig. 16 is only an example for facilitating understanding of the present invention, and is not intended to limit the present invention.

The buffer memory 2150 can temporarily buffer the data processed by the host 2100. For example, the buffer memory 2150 may include volatile memory such as SRAM (Static RAM), DRAM (Dynamic RAM), SDRAM (Synchronous DRAM), or nonvolatile memory such as flash memory, PRAM, MRAM, ReRAM, .

The embedded card storage 2200 according to an embodiment of the present invention may include a storage memory 2210, a memory input / output block 2220, a storage interface 2230, and a memory controller 2240 . However, the configuration of the embedded / card storage 2200 shown in FIG. 16 is only an example for facilitating understanding of the present invention. The embedded / card storage 2200 may further include other components not shown in FIG. Alternatively, the embedded / card storage 2200 may not include one or more of the components shown in FIG.

Storage memory 2210 is a memory configured to perform the unique functions of embedded / card storage 2200. The storage memory 2210 can store data regardless of whether power is supplied or not. For example, the storage memory 2210 may be a NAND-type flash memory, a NOR-type flash memory, a phase-change random access memory (PRAM), a magneto-resistive RAM (MRAM) (Resistive RAM), FRAM (Ferro-electric RAM), or the like. Alternatively, the storage memory 2210 may include heterogeneous memories together.

The memory input / output block 2220 can process the writing of data to and reading the data from the storage memory 2210. By way of example, the memory input / output block 2220 may include a buffer memory 2222 for temporarily buffering data. By way of example, buffer memory 2222 may include volatile memory such as SRAM, DRAM, SDRAM, or the like, or non-volatile memory such as flash memory, PRAM, MRAM, ReRAM, FRAM, Although not shown in FIG. 16, the memory input / output block 2220 may further include other components used for data input / output such as an address decoder and a sense amplifier.

The storage interface 2230 can exchange signals (e.g., reset signal RST, clock signal CLK, etc.) and data (e.g., input data DIN, output data DOUT, etc.) with host 2100 have. The storage interface 2230 may include a physical layer (PLS) and a link layer (LLS). As an example, the storage interface 2230 may operate according to an interface protocol using a physical layer (PLS) and a link layer (LLS).

The memory controller 2240 can manage and control the overall operation of the embedded / card storage 2200. The memory controller 2240 can process and manage the data exchanged with the host 2100 through the storage interface 2230. [

In an embodiment of the present invention, the memory controller 2240 may include a non-volatile memory 2241, a discrimination circuit 2243, and a state setting circuit 2245. The configuration and functions of the nonvolatile memory 2241, the discrimination circuit 2243 and the state setting circuit 2245 are the same as those of the nonvolatile memory 221, the discrimination circuit 227 and the state setting circuit 228 Configuration, and functionality. By way of example, non-volatile memory 2241 may store identification codes and link-up information. For example, the states of the physical layer PLS and link layer LLS may be set to "fast link up state" according to the operation of the determination circuit 2243 and the state setting circuit 2245. [ The embedded / card storage 2200 can operate in accordance with embodiments of the present invention using the non-volatile memory 2241, the discrimination circuit 2243, and the state setting circuit 2245. The embedded / card storage 2200 may operate according to the procedures described in the description of FIGS. 3-12. Duplicate descriptions are omitted.

As shown in FIG. 16, the nonvolatile memory 2241 may be implemented as a separate memory from the storage memory 2210. However, if desired, the non-volatile memory 2241 may be implemented as a single memory with the storage memory 2210. [ Further, as shown in Fig. 16, the determination circuit 2243 and the state setting circuit 2245 may be included in the memory controller 2240. Fig. However, the determination circuit 2243 and the state setting circuit 2245 may be implemented as separate circuits from the memory controller 2240, if necessary. Alternatively, the determination circuit 2243 and the status setting circuit 2245 may be included in the link layer (LLS) of the storage interface 2230. The configuration shown in Fig. 16 is only an example for facilitating understanding of the present invention, and is not intended to limit the present invention.

In Fig. 16, the configuration of the storage device implemented based on the embodiment of the present invention has been described. However, as mentioned above, the present invention can be employed in all interface circuits that use the physical layer and the link layer. Figure 16 is not intended to limit the invention.

17 is a block diagram illustrating the configuration of an electronic system including a controller according to an embodiment of the present invention and interfaces operating in accordance with an embodiment of the present invention. The electronic system 3000 may be implemented in a data processing unit that may utilize or support the interface proposed by the MIPI federation. For example, the electronic system 3000 may be implemented as a portable communication terminal, a PDA (Personal Digital Assistant), a PMP (Portable Media Player), a smart phone, or a wearable device.

The electronic system 3000 may include an application processor 3100, a display 3220, and an image sensor 3230. The application processor 3100 may include a DigRF master 3110, a Display Serial Interface (DSI) host 3120, a CSI (Camera Serial Interface) host 3130, and a physical layer 3140.

The DSI host 3120 may communicate with the DSI device 3225 of the display 3220 according to the DSI. As an example, an optical serializer (SER) may be implemented in the DSI host 3120. As an example, an optical deserializer (DES) may be implemented in the DSI device 3225.

The CSI host 3130 can communicate with the CSI device 3235 of the image sensor 3230 according to the CSI. As an example, a CSI host 3130 may be implemented with an optical deserializer (DES). As an example, an optical serializer (SER) may be implemented in the CSI device 3235.

The DSI and CSI can utilize the physical layer and the link layer. DSI and CSI may employ embodiments of the present invention. By way of example, the DSI host 3120 and the DSI device 3225 may enter a "fast link up state" based on the identification code and the link up information. Further, the CSI device 3235 and the CSI host 3130 can enter the "fast link up state" based on the identification code and link-up information.

The electronic system 3000 may further include an RF (Radio Frequency) chip 3240 that communicates with the application processor 3100. The RF chip 3240 may include a physical layer 3242, a DigRF slave 3244, and an antenna 3246. By way of example, the physical layer 3242 of the RF chip 3240 and the physical layer 3140 of the application processor 3100 may exchange data with each other by means of the DigRF interface proposed by the MIPI association. The DigRF interface may employ embodiments of the present invention. By way of example, physical layer 3140 and physical layer 3242 may enter a "fast link up state" based on identification code and link-up information.

The electronic system 3000 may further include a working memory (3250) and an embedded / card storage (3255). The working memory 3250 and the embedded / card storage 3255 may store data provided by the application processor 3100. Further, working memory 3250 and embedded / card storage 3255 may provide stored data to application processor 3100.

Working memory 3250 may temporarily store data to be processed or processed by application processor 3100. [ Working memory 3250 may include volatile memory such as SRAM, DRAM, SDRAM, or the like, or non-volatile memory such as flash memory, PRAM, MRAM, ReRAM, FRAM,

The embedded / card storage 3255 can store data regardless of whether power is supplied or not. As an example, embedded / card storage 3255 may operate in accordance with UFS interface conventions, but the invention is not limited to this embodiment. In this embodiment, the embedded / card storage 3255 can enter the "fast link up state" based on the identification code and the link up information, as described in the description of Figs.

The electronic system 3000 can communicate with an external system through a World Interoperability for Microwave Access (WIMAX) 3260, a Wireless Local Area Network (WLAN) 3262, an Ultra Wideband (UWB) As an example, when WLAN 3262 operates in accordance with the UniPro and M-PHY interface conventions, application processor 3100 and WLAN 3262 enter "fast link up state" can do.

The electronic system 3000 may further include a speaker 3270 and a microphone 3275 for processing voice information. Furthermore, the electronic system 3000 may further include a GPS (Global Positioning System) device 3280 for processing position information.

The electronic system 3000 may further include a bridge chip 3290 for managing connection with peripheral devices. As an example, when the bridge chip 3290 operates in accordance with the UniPro and M-PHY interface conventions, the application processor 3100 and the bridge chip 3290 are connected to the "fast link up state" . ≪ / RTI >

The configurations shown in the respective conceptual diagrams should be understood from a conceptual viewpoint only. In order to facilitate understanding of the present invention, the shape, structure, size, etc. of each of the components shown in the conceptual diagram have been exaggerated or reduced. The configuration actually implemented may have a physical shape different from that shown in the respective conceptual diagrams. Each conceptual diagram is not intended to limit the physical form of the component.

The device configurations shown in the respective block diagrams are intended to facilitate understanding of the invention. Each block may be formed of blocks of smaller units depending on the function. Alternatively, the plurality of blocks may form a block of a larger unit depending on the function. That is, the technical idea of the present invention is not limited to the configuration shown in the block diagram.

The present invention has been described above with reference to the embodiments of the present invention. It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed. Accordingly, the above embodiments should be understood in an illustrative rather than a restrictive sense. That is, the technical idea that can achieve the same object as the present invention, including the gist of the present invention, should be interpreted as being included in the technical idea of the present invention.

Therefore, it is intended that the present invention cover modifications and variations of this invention provided they come within the scope of the appended claims and their equivalents. The scope of protection of the present invention is not limited to the above embodiments.

100: Electronic system
110: first electronic device 113: first interface circuit
115: first controller 120: second electronic device
123: second interface circuit 125: second controller
200: storage system 210: host
220: storage device 221: nonvolatile memory
223: Interface circuit 225: Controller
227: discrimination circuit 228: state setting circuit
2000: storage system 2100: host
2110: Application 2120: Device Driver
2130: Host interface 2140: Host controller
2141: nonvolatile memory 2143: discrimination circuit
2145: state setting circuit 2150: buffer memory
2200: Embedded / Card Storage 2210: Storage Memory
2220: memory input / output block 2222: buffer memory
2230: storage interface 2240: memory controller
2241: nonvolatile memory 2243: discrimination circuit
2245: State setting circuit
3000: electronic system 3100: application processor
3110: DigRF Master 3120: DSI Host
3130: CSI host 3140: physical layer
3220: Display 3225: DSI device
3230: Image sensor 3235: CSI device
3240: RF chip 3242: physical layer
3244: DigRF Slave 3246: Antenna
3250: Working Memory 3255: Embedded / Card Storage
3260: Wimax 3262: WLAN
3264: UWB 3270: Speaker
3275: Microphone 3280: GPS
3290: Bridge Chip

Claims (20)

A method of operating a controller for managing a second electronic device configured to communicate with a first electronic device,
Sensing a connection of the first electronic device to an interface circuit of the second electronic device;
An identification code having a value different from the reserved values defined in the interface protocol defining the operating procedure of the interface circuit and having a different value according to the attribute of the first electronic device after the connection of the first electronic device is detected, From the first electronic device; And
And setting the state of the interface circuit to a fast link up state corresponding to the provided identification code to enable data communication with the first electronic device. The method according to claim 1,
Wherein the attribute of the first electronic device comprises the type and manufacturer of the first electronic device. The method according to claim 1,
And providing a response signal to the first electronic device corresponding to the provided identification code. The method according to claim 1,
Wherein the setting comprises determining whether a value of the provided identification code is stored in a memory area of the second electronic device. 5. The method of claim 4,
Wherein the setting comprises:
Further comprising the step of determining whether link-up information used for setting the quick link-up state is stored in the memory area when the value of the provided identification code is stored in the memory area . 6. The method of claim 5,
Wherein the link-up information includes at least one of connection information of a lane used for data communication between the first electronic device and the second electronic device, performance information of the first electronic device, and performance information of the second electronic device Included operating methods. 6. The method of claim 5,
Wherein the setting comprises:
And setting the state of the interface circuit to the fast link-up state based on the stored link-up information when the link-up information is stored in the memory area. 6. The method of claim 5,
Wherein the setting comprises:
Receiving link-up information and performance information of the first electronic device when the link-up information is not stored in the memory area;
Setting the state of the interface circuit to the fast link-up state based on the provided lane connection information and the provided performance information; And
Storing the provided lane connection information and the provided performance information in the memory area. 9. The method of claim 8,
When a reconnection of the first electronic device to the second electronic device is detected after disconnecting the first electronic device or when an error relating to the established quick link up condition is detected, Further comprising the step of:
Wherein the restoring comprises:
Receiving the identification code from the first electronic device; And
And setting the state of the interface circuit to the fast link up state based on the stored lane connection information and the stored performance information. 5. The method of claim 4,
Wherein the setting comprises:
Storing a value of the provided identification code in the memory area when the value of the provided identification code is not stored in the memory area;
Receiving the lane connection information and performance information of the first electronic device corresponding to the value of the provided identification code;
Setting the state of the interface circuit to the fast link-up state based on the provided lane connection information and the provided performance information; And
Storing the provided lane connection information and the provided performance information in the memory area. The method according to claim 1,
Wherein the second electronic device is a storage device comprising a non-volatile memory and the controller. A method of operating a controller for managing a first electronic device,
Sensing a connection of a second electronic device to an interface circuit of the first electronic device;
After the connection of the second electronic device is detected, an identification code having a value different from the defined and reserved values defined in the interface protocol defining the operating procedure of the interface circuit and having a different value according to the attribute of the first electronic device To the second electronic device;
Waiting for transmission of a response signal corresponding to the provided identification code from the second electronic device during a waiting time; And
The state of the interface circuit is changed to a link-up state corresponding to the transmitted response signal in order to enable data communication with the second electronic device when the response signal is transmitted from the second electronic device within the waiting time Said method comprising the steps of: 13. The method of claim 12,
Wherein the first electronic device is a host that includes an application processor. A nonvolatile memory configured to store one or more identification codes having different values according to attributes of the host;
An interface circuit configured to exchange data with the host in accordance with an interface protocol using a physical layer and a link layer; And
And a controller configured to receive an identification code corresponding to the attribute of the connected host when the connection of the host to the interface circuit is detected and to provide a response signal corresponding to the provided identification code to the connected host,
Wherein one of the controller and the link layer comprises:
A discrimination circuit configured to discriminate whether or not an identification code having the same value as the provided identification code is stored in the nonvolatile memory; And
And a status setting circuit configured to set a state of the physical layer and the link layer to a fast link up state corresponding to the provided identification code so as to enable data communication with the connected host. 15. The method of claim 14,
Wherein the value of each of the one or more identification codes is directly stored in memory cells included in the non-volatile memory, or inserted into a program command stored in the non-volatile memory. 15. The method of claim 14,
Wherein each of the stored one or more identification codes has a value different from that defined and reserved in the interface specification. 15. The method of claim 14,
Wherein the stored one or more identification codes correspond to one or more link-up states for hosts having different attributes,
Wherein the non-volatile memory is further configured to store one or more link-up information used to set the one or more link-up states,
Wherein the determination circuit is configured to determine whether target link-up information used for setting the quick link-up state is stored in the non-volatile memory. 18. The method of claim 17,
Wherein the target link-up information includes at least one of connection information of a lane used for data communication with the connected host, performance information of each of the physical layer and the link layer, and performance information of the connected host,
Wherein data values corresponding to the target link-up information are directly stored in memory cells included in the non-volatile memory, or inserted into a program command stored in the non-volatile memory. 19. The method of claim 18,
Wherein the state setting circuit directly sets the state of the physical layer and the link layer to the fast link up state based on the stored target link up information, And to set the state of the physical layer and the link layer to the fast link up state based on the information. 15. The method of claim 14,
The controller controls the storage memory according to the JEDEC UFS standard interface protocol,
Wherein the non-volatile memory, the interface circuit, the controller, and the storage memory are embodied in a mobile electronic system, or embedded storage configured to be connected to the mobile electronic system.

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