KR20130049603A - Hexc Deblocking Filter Parallel Processing Algorithm and How Hexc Deblocking Filter Enables Parallel Processing - Google Patents
Hexc Deblocking Filter Parallel Processing Algorithm and How Hexc Deblocking Filter Enables Parallel Processing Download PDFInfo
- Publication number
- KR20130049603A KR20130049603A KR1020110114713A KR20110114713A KR20130049603A KR 20130049603 A KR20130049603 A KR 20130049603A KR 1020110114713 A KR1020110114713 A KR 1020110114713A KR 20110114713 A KR20110114713 A KR 20110114713A KR 20130049603 A KR20130049603 A KR 20130049603A
- Authority
- KR
- South Korea
- Prior art keywords
- unit
- block
- prediction
- parallel processing
- data
- Prior art date
Links
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/80—Details of filtering operations specially adapted for video compression, e.g. for pixel interpolation
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Compression Or Coding Systems Of Tv Signals (AREA)
Abstract
Description
The present invention relates to a deblocking filter performance improvement and speed improvement technique of a video codec.
The present invention relates to a deblocking filter scheme of a video codec. This method can be applied to codecs that require faster speeds in processing high quality images.
Recently, there is an increasing demand for high-resolution, high-quality images such as HD (High Definition) and UHD (Ultra High Definition) images in various applications. As the video data becomes higher resolution and higher quality, the amount of data increases relative to the existing video data. Therefore, when the video data is transmitted or stored using a medium such as a conventional wired / wireless broadband line, The storage cost will increase. High-efficiency image compression techniques can be utilized to solve such problems as image data becomes high-resolution and high-quality.
An inter-screen prediction technique for predicting pixel values included in the current picture from a picture before or after the current picture using an image compression technique, an intra prediction technique for predicting pixel values included in a current picture using pixel information in the current picture, Various techniques exist, such as an entropy encoding technique for allocating a short code to a high frequency of appearance and a long code to a low frequency of appearance, and the image data can be effectively compressed and transmitted or stored.
The present invention is to provide a parallel processing method for faster execution time by removing the data dependency in order to solve the problems of the prior art described above.
If you perform horizontal boundary filtering after waiting for the result of vertical boundary filtering, parallel processing is not performed. Accordingly, an object of the present invention is to separate data to be read from data to be read so that parallel processing is possible by eliminating data dependency.
The present invention also aims to bring about improved image quality by better reflecting the characteristics of the boundary using the pre-filtered pixel without using the filtered pixel.
According to one embodiment of the present invention, a method is provided that enables parallel processing in an HEVC deblocking filter.
Using the present invention results in a slightly better performance gain in the filtering process of the deblocking filter. It can be used in various ways with the scalability of parallel processing in the structure that parallel processing was not possible.
According to the configuration of the present invention has a scalability for parallel processing can be used in various ways.
1 is a block diagram illustrating an image encoding apparatus according to an embodiment of the present invention.
2 is a block diagram illustrating a configuration of an image decoding apparatus according to another embodiment of the present invention.
3 is a diagram for explaining data dependency in an 8x8 block.
4 is a diagram for explaining data dependency among 8x8 blocks.
5 is a view for explaining the operation of the deblocking filter.
6 is a diagram for describing an operation sequence of neighboring inter-block filtering.
7 is a flowchart illustrating an algorithm of the proposed deblocking filter.
8 is a view for explaining the operation sequence of the proposed algorithm.
9 is a diagram for describing an operation of simultaneously processing two blocks.
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In the following description of the embodiments of the present invention, a detailed description of known functions and configurations incorporated herein will be omitted when it may make the subject matter of the present disclosure rather unclear.
It is to be understood that when an element is referred to as being "connected" or "connected" to another element, it may be directly connected or connected to the other element, . In addition, the description of "including" a specific configuration in the present invention does not exclude a configuration other than the configuration, and means that additional configurations can be included in the practice of the present invention or the technical scope of the present invention.
The terms first, second, etc. may be used to describe various components, but the components should not be limited by the terms. The terms are used only for the purpose of distinguishing one component from another. For example, without departing from the scope of the present invention, the first component may be referred to as a second component, and similarly, the second component may also be referred to as a first component.
In addition, the components shown in the embodiments of the present invention are shown independently to represent different characteristic functions, which does not mean that each component is composed of separate hardware or software constituent units. That is, each constituent unit is included in each constituent unit for convenience of explanation, and at least two constituent units of the constituent units may be combined to form one constituent unit, or one constituent unit may be divided into a plurality of constituent units to perform a function. The integrated embodiments and separate embodiments of the components are also included within the scope of the present invention, unless they depart from the essence of the present invention.
In addition, some of the components are not essential components to perform essential functions in the present invention, but may be optional components only to improve performance. The present invention can be implemented only with components essential for realizing the essence of the present invention, except for the components used for the performance improvement, and can be implemented by only including the essential components except the optional components used for performance improvement Are also included in the scope of the present invention.
1 is a block diagram illustrating an image encoding apparatus according to an embodiment of the present invention.
Referring to FIG. 1, the
The
In the intra-picture prediction mode, the intra-prediction unit 120 (or the intra-picture prediction unit can also be used as a term having the same meaning) performs spatial prediction using pixel values of already coded blocks around the current block And generates a prediction block.
The
In addition, the
The operation of the
In the case of the inter-picture prediction mode, the
The
Since the HEVC performs inter prediction coding, i.e., inter prediction coding, the currently encoded image needs to be decoded and stored for use as a reference image. Accordingly, the quantized coefficients are inversely quantized in the
The restoration block passes through the
2 is a block diagram illustrating a configuration of an image decoding apparatus according to another embodiment of the present invention.
2, the
The
The
In the intra-picture prediction mode, the intra-prediction unit 240 (or the inter-picture prediction unit) performs spatial prediction using the pixel values of the already coded blocks around the current block to generate a prediction block.
In the inter-view prediction mode, the
The residual block and the prediction block are added through the
Methods for improving the prediction performance of the encoding / decoding apparatus include a method of increasing the accuracy of the interpolation image and a method of predicting the difference signal. Here, the difference signal is a signal indicating the difference between the original image and the predicted image. In the present invention, the term " difference signal " may be replaced by a " difference signal ", " residual block ", or " difference block " depending on the context. Those skilled in the art may influence the idea You will be able to distinguish this within the scope of not giving.
As described above, in the embodiment of the present invention, a coding unit (coding unit) is used as a coding unit for convenience of explanation, but it may be a unit for performing not only coding but also decoding. Hereinafter, an encoding / decoding method of an intra prediction mode using two candidate intra prediction modes described with reference to FIGS. 3 to 9 according to an embodiment of the present invention may be implemented according to the functions of the modules described above with reference to FIGS. 1 and 2. These encoders and decoders are included in the scope of the present invention. That is, the image encoding method and image decoding method to be described later in the embodiment of the present invention can be performed in each component included in the image encoder and the image decoder described with reference to FIG. 1 and FIG. The meaning of the component may include not only the hardware meaning but also a software processing unit that may be performed through an algorithm.
In addition, hereinafter, the image encoding method and the image decoding method which will be described later in an embodiment of the present invention may be performed by each component included in the image encoder and the image decoder described above with reference to FIGS. 1 and 2. The meaning of the component may include not only the hardware meaning but also a software processing unit that may be performed through an algorithm.
The deblocking filter of HEVC, which is being standardized, is an issue in parallelization. Currently Panasonic's Deblocking Filter takes the form of horizontal boundary filtering after vertical boundary filtering. Since data dependence exists in the display portion of FIG. 3 (waiting for the vertical boundary filtering result and performing horizontal boundary), there is a problem in that the data is not parallelized. That is, Panasonic's De-blocking Filter does not have parallelism due to the problem of data dependency.
The configuration of the present invention replaces all inputs used as pixels before filtering.
The parallel deblocking filter algorithm proposed by the present invention is as follows.
1. Data dependency in 8x8 blocks
The reason for no parallelism is the data dependence that exists between the processes. Referring to FIG. 4, the value of the horizontal boundary of the previous 8x8 block must be written after filtering to perform vertical boundary filtering of the next 8x8 block. There is a data dependency between these two boundaries. Panasonic, Tandberg, Nokia, and ericsson's deblocking filters have data dependencies between the vertical and horizontal boundaries even within a single 8x8 block. Data dependency is an obstacle to parallelism because it prevents simultaneous filtering. As shown in FIG. 4, the #n 8x8 block and the #n 8x8 block cannot be processed simultaneously.
2. Reuse of unfiltered pixels
Looking at Panasonic's deblocking filter algorithm, the unfiltered pixels can be used in the decision process to eliminate parallelism by eliminating data dependency. If this is used in the filtering process, data dependence disappears in the filtering process. Data dependencies occur when data that has to be read has not been written yet. This is because reading old data without reading new data may not produce the desired results. Panasonic's deblocking filter uses the pixels before filtering in the decision process (ON / OFF, type), but in the filtering process, after the result of the filtering value of the previous block is written, the result is received as a new input and the next process is performed. Thus, data dependencies exist, which makes parallel processing impossible. To solve this problem, the filtered pixels are used in the filtering process as well as the determination process.
5 is a data processing sequence when the pre-filtering pixel is used in the filtering process. In Fig. 5, (1) reads data to determine ON / OFF, and (2) reads data to determine type. Improvements in the Panasonic algorithm are (3) and (4) in FIG. 5, and both processes use the pixels before filtering. The pixels before filtering are stored in the line buffer, and the pixels are filtered to read the stored pixels. After filtering, data is written to the reference frame. In (3) and (4), if one difference is made, the data will be overwritten without collision. In the previous algorithm, processing (4) using the result of (3) generates delay as much as the execution time of filtering. However, if the pixel is used before filtering, the delay can be reduced by one clock difference.
In addition, data dependence between neighboring blocks also disappears. As shown in FIG. 6, when only the timing at which data is written is adjusted to be different, the #n block and the # n + 1 block can be simultaneously executed. In FIG. 6, the pixels displayed in dark color create new values by using 4 to 6 neighboring pixels, and write the values back into the memory to complete filtering. If the timing of writing to the memory is not overlapped, the operation (1) and the operation (2) of FIG. 6 can be completed until the operation of writing to the memory after filtering by the time difference of one clock.
3. New Deblocking Filter
When the pixels before filtering are used in the determination process and the filtering process, parallel processing is possible by removing data dependency between blocks. Next, FIG. 7 is an algorithm of the proposed deblocking filter.
The new deblocking filter proceeds as shown in FIG. 7. The Panasonic algorithm performs both boundaries at the same time for the ON / OFF decision and the type decision, but in the filtering process, the vertical boundary and the horizontal boundary must be sequentially performed due to the above-described data dependency problem. However, the proposed algorithm can filter both vertical and horizontal boundaries simultaneously by removing data dependence using pixels before filtering as described above.
8 shows areas used and applied when processing each process in one block. In FIG. 8, (1) determines using the pixels in the 3rd and 6th lines in order to make the ON / OFF decision, and (2) the filtering type of each line using the pixels of all the lines. Determine. When each filtering is determined, the process of FIG. 8 (3) starts and immediately the process of (4) begins. As explained in "2. Reusing Unfiltered Pixels," the use of pre-filtering pixels eliminates data dependence, allowing the process to proceed without waiting for results.
9 is a diagram illustrating an operation of simultaneously processing two blocks. In the first step of FIG. 9, the on / off determination of the vertical and horizontal boundaries of the n block and the neighboring block is performed. In the second step, the #n block and the neighboring block determine the type at the same time, and the # n + 2 block starts the ON / OFF decision step. In the final step, #n block performs filtering and # n + 2 block performs type determination. Since there is no dependency between data, deblocking filtering is possible continuously as shown in FIG. 9.
Unlike Panasonic's algorithm, the biggest feature of the proposed algorithm is that it uses the pixels before filtering at every stage. Table 1 shows the difference between the pixels used in the conventional algorithm and the pixels used in the proposed algorithm.
Table 1 Input Comparison of Algorithms
As shown in Table 1, the proposed algorithm differs from using the pre-filtering pixel in the filtering step compared with the reference algorithm Panasonic algorithm. In addition, the equation used in each step is as follows.
<8x8 block boundary and pixel>
If all of the equations (3) to (5) are satisfied, the strong filter is performed. If none of the equations are satisfied, the weak filter is performed. When determining the strong filter in the type determination step, filtering is performed using Equations 6 to 11 below.
Equations 6 to 11 represent the operation of the strong filter. After each calculation, after clipping, we change both pixels from the boundary. When determining the weak filter in type determination, filtering is performed using the following Equations 12 to 16.
Equations 12 to 16 express the operation of the weak filter. It will replace both two pixels from the boundary.
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020110114713A KR20130049603A (en) | 2011-11-04 | 2011-11-04 | Hexc Deblocking Filter Parallel Processing Algorithm and How Hexc Deblocking Filter Enables Parallel Processing |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020110114713A KR20130049603A (en) | 2011-11-04 | 2011-11-04 | Hexc Deblocking Filter Parallel Processing Algorithm and How Hexc Deblocking Filter Enables Parallel Processing |
Publications (1)
Publication Number | Publication Date |
---|---|
KR20130049603A true KR20130049603A (en) | 2013-05-14 |
Family
ID=48660299
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020110114713A KR20130049603A (en) | 2011-11-04 | 2011-11-04 | Hexc Deblocking Filter Parallel Processing Algorithm and How Hexc Deblocking Filter Enables Parallel Processing |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR20130049603A (en) |
-
2011
- 2011-11-04 KR KR1020110114713A patent/KR20130049603A/en not_active Application Discontinuation
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR101769937B1 (en) | Apparatus and method for image coding and decoding | |
US9832467B2 (en) | Deblock filtering for intra block copying | |
US9906790B2 (en) | Deblock filtering using pixel distance | |
US11910013B2 (en) | Image encoding method using a skip mode, and a device using the method | |
US11350125B2 (en) | Method and device for intra-prediction | |
KR20130045785A (en) | Method for managing a memory and apparatus for video coding thereof | |
KR20150090178A (en) | Content adaptive entropy coding of coded/not-coded data for next generation video | |
CN107646194B (en) | Apparatus and method for video motion compensation | |
KR20130098122A (en) | Device and method for encoding/decoding | |
JP7351908B2 (en) | Encoder, decoder, and corresponding method of deblocking filter adaptation | |
US11706449B2 (en) | Method and device for intra-prediction | |
KR101895294B1 (en) | A decoding method using prescaning and an appratus using it | |
KR20230161389A (en) | Method and apparatus for deciding boundary filtering strength of deblocking filtering | |
US20120014446A1 (en) | System for low resolution power reduction using deblocking | |
KR101443865B1 (en) | Method and apparatus for inter prediction | |
US20230269399A1 (en) | Video encoding and decoding using deep learning based in-loop filter | |
KR20130049603A (en) | Hexc Deblocking Filter Parallel Processing Algorithm and How Hexc Deblocking Filter Enables Parallel Processing | |
KR20130049604A (en) | Mode Switching Method in Entropy Coding | |
WO2023241340A1 (en) | Hardware for decoder-side intra mode derivation and prediction | |
WO2024016955A1 (en) | Out-of-boundary check in video coding | |
KR101802304B1 (en) | Methods of encoding using hadamard transform and apparatuses using the same | |
CN117981323A (en) | Video encoding using alternative neural network-based encoding tools | |
KR20140079519A (en) | Quantization parameter coding method using average quantization parameter | |
KR20130070215A (en) | Method and apparatus for seletcing the adaptive depth information and processing deblocking filtering | |
KR20120095794A (en) | Fast video coding method |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
WITN | Withdrawal due to no request for examination |