KR20110012525A - Line coding apparatus and method for transmitting data in visible light communication system - Google Patents

Abstract

PURPOSE: A line coding apparatus and a method for transmitting data in a visible light communication system are provided to reduce errors caused by the synchronization of continuous input bit 0. CONSTITUTION: A data input unit(210) is a transmission data input unit. According to a present bit level, an encoding unit(220) encodes a clock signal and a data signal of the data input unit. If the continuous 5 input bits 0 in the encoding operation, the encoding unit performs an encoding operation in an encoding mode which transits the initial and last bits as much as half bit. A transmission unit(230) transfers an encoded signal of the encoding unit as a visible light.

Description

LINE CODING APPARATUS AND METHOD FOR TRANSMITTING DATA IN VISIBLE LIGHT COMMUNICATION SYSTEM}

The present invention relates to a transmission data coding method, and more particularly, to a line coding apparatus and method for data transmission in a visible light communication (VLC) system.

Visible light communication is a wireless communication technology that uses light in the visible wavelength range to communicate using visible radio waves. Such visible light communication is a communication method that can replace a communication method based on a radio frequency, and active research is being conducted in recent years with the spread of light emitting diodes (LEDs). In addition, as the diversification of information and communication services by ubiquitous network has recently increased the application of indoor short-range communication technology using LED for lighting, the importance of technology is increasing.

The important thing in the application of the data coding method for such communication is how to encode and decode the data efficiently in a simple way and how easily the coding can be applied in the system implementation.

Currently, various encoding methods are already used by existing encoders, and various such methods include NRZ, AMI, 4B5B, HDB3, and Manchester.

First, the non-return to zero (NRZ) method converts each of the binary values of '1' and '0' into positive voltage values and negative voltage values. In this method, data is transmitted by dividing the signal into (1) and none (0) when the data is transmitted. In digital communication, this is also called OOK (On Off Keying).

The AMI method, also known as a bipolar code, refers to a line encoding method mainly used for DS-1 / DS-1C carrier (T1 1.544Mbps). 0 (No signal) is 0 Voltage, and 1 is a method of encoding (+) voltage and (-) voltage alternately. That is, during transmission, data bit 0 is considered to be 0V without pulses, and 1 corresponds to the polarity opposite to each other, first as + V and then as -V. There should be no more than 15 consecutive 0 bits and the average density of bit 1 should be 1/8 or more. If zero is repeated repeatedly, the eighth zero is forcibly changed to one to encode.

The 4B5B scheme encodes a 5-bit code for 4-bit information and is used as a transmission code of a FDDI. This encoding method is one of the code conversion principles commonly referred to as mBnB, and is an encoding for mapping n-bit binary sequences to m-bit binary sequences, and the conversion rate is m / n.

The HDB3 scheme replaces the '000V' or 'B00V' pattern instead of four consecutive zero bits. The first 1 encodes the positive and negative voltages alternately, with the first corresponding to the polarities, opposite to each other with + V first and then -V. If there are four consecutive zero bits here, it is equal to V opposite one bit that existed before, has the opposite sign V in four consecutive last zero bits, and has a half bit shift per one bit.

The Manchester scheme is a form of digital encoding in which data bits are represented by transitioning from one logical state to another. This is different from the usual way of encoding in which one bit is represented by either a high value such as + 5V or a low value such as 0V. Using this Manchester method, the length of each data bit is set to its default value, which creates a magnetic clock for the signal. The state of the bit depends on the direction of the transition. In some systems, the transition from low to high represents logic 1 and the transition from high to low represents logic 0, while in other systems it works the opposite way. The greatest advantage of Manchester encoding lies in the fact that the signal synchronizes itself. This reduces the error rate and optimizes reliability.

Reference is made to FIG. 1 to compare the output for each of the encoding schemes as described above. 1 is an exemplary view showing a simulation result using a conventional encoding scheme. In FIG. 1, when the input signal is '1 1 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0', the NRZ method, the AMI method, the 4B5B method, the HDB3 method, and the Manchester method, respectively, are used in the visible light communication system environment. The simulation results are shown.

In the case of the NRZ scheme, the synchronization is usually performed at the moment of signal transition at the reception side, so that the signal is easily synchronized when there is a signal transition, but there is a disadvantage in that it is of no use when the same value is maintained continuously. The AMI is also well suited for high-speed communications, but consecutive "0s" can cause synchronization problems. In addition, 4B5B method is superior in error detection than AMI method by preventing consecutive signal elements of 0 and 1. There is a disadvantage in that a cost is caused by the increase in bandwidth, which wastes 25% of the overall bandwidth. In addition, the Manchester method generates synchronization in the middle of one bit and requires twice as much bandwidth as the conventional NRZ method, and encoding using this Manchester method requires transmitting more bits than the original signal. It can cause a waste of bandwidth.

Accordingly, the present invention provides a line coding apparatus and method for data transmission in a visible light communication system that can reduce bandwidth while reducing errors due to synchronization of consecutive input bits '0'.

The present invention also provides a line coding apparatus and method for data transmission in a visible light communication system to facilitate synchronous reproduction of a receiver.

According to an aspect of the present invention, there is provided a line coding apparatus for data transmission in a visible light communication system, comprising: a data input unit serving as a transmission data input unit, and a data signal and a clock signal from the data input unit according to current bit levels. And an encoding unit for encoding the first and last bits by an encoding scheme of half-bit shifting when there are five consecutive input bits 0 during encoding, and a transmitter for transmitting the encoded signal from the encoding unit in the form of visible light. It is characterized by.

In addition, the present invention is a line coding method for data transmission in a visible light communication system, when encoding a data signal and a clock signal according to the current bit level, half the first and last bits when five consecutive input bits 0 And a process of encoding by a transition encoding method and transmitting the encoded signal in the form of visible light.

In addition, the present invention is a line coding method for data transmission in a visible light communication system, when encoding the data signal and the clock signal according to the current bit level, when the input bit is 1 encoding by a half-bit transition encoding method And transmitting the encoded signal in the form of visible light.

According to the present invention, it is easy to reduce errors due to synchronization of consecutive input bits '0' and to distinguish signal level differences, which is effective in error detection, thereby reducing the influence of noise. In addition, the present invention can not only save bandwidth, but also has an advantage of synchronous reproduction of the receiving end.

The present invention relates to a data coding method of a visible light communication system, and in particular, to a data coding method using a half bit transition. Specifically, the present invention proposes three coding methods. The first and third methods are methods for reducing errors due to continuous synchronization of '0', and the second method is a method for eliminating direct current components and reducing the length of coding.

Referring to FIG. 2 to look at the configuration of a data coding apparatus in a visible light communication system implemented with the above function.

Referring to FIG. 2, the visible light communication system includes a transmitting terminal 200 for transmitting data and a receiving terminal 240 for receiving data.

First, the transmitting terminal 200 transmits data to the receiving terminal 240 in a visible light communication method. The transmitting terminal 200 uses visible light for output of the data input unit 210, which is a transmission data input unit, an encoding unit 220 for encoding data from the data input unit 210, and an output of the encoding unit 220. And a transmitter 230 for transmitting. Here, the transmitter 230 may be an LED that emits visible light as a component that communicates using visible light. In particular, the coding proposed by the present invention is performed by the encoder 220. The encoder 220 performs line coding using any one of three coding methods corresponding to the embodiments of the present invention.

On the other hand, the receiving terminal 240 is a receiver 250 for receiving data transmitted from the transmitter 230 in the form of visible light, a decoder 260 for decoding the output from the receiver 250 and its decoder 260 It includes a data output unit 270 for receiving and processing the output of. The decoding unit 260 restores the received data to a decoding method corresponding to the coding method proposed by the present invention.

A detailed operation of the encoder 220 will be described with reference to FIG. 3. 3 is a diagram illustrating a configuration of the encoding unit 220 of FIG. 2.

Referring to FIG. 3, the data stream input unit 300 serves to input data to the bit level determination unit 310 in a stream form. The bit level determination unit 310 determines which bit level of the current bit level corresponds to '+1', '0', and '-1'. According to the determined bit level, the bit processing unit 320 sequentially performs line coding on the data input signal, which is made into a series of streams again by the combiner 330 and transmitted. Specifically, when the current bit level is '+1', the '+1' processor 340 of the bit processor 320 is encoded. If the current bit level is '0', the '0' processor 350 is encoded. If the current bit level is '-1', it is encoded by the '-1' processor 360.

In this case, the operation in the bit processing unit 320 depends on three coding schemes proposed by the present invention, and the operation in the bit processing unit 320 depends on the coding method in which the clock signal and the data input signal are encoded. Different. The operation in the bit processor 320 will be described below. To this end, a coding method according to an embodiment of the present invention described in the following detailed description of the present invention will be described separately as follows. The first embodiment of the present invention describes a case of using the B4-HBT method, the second embodiment of the present invention describes a case of using the 3B-HBT method, the third embodiment of the present invention is a Z-HBT method If you use. The encoding scheme proposed by the present invention has been named as B4-HBT scheme, 3B-HBT scheme, Z-HBT scheme, etc. as described above. In the following description, the named terms are used for convenience of description.

First, referring to FIG. 4 to describe a case in which data is encoded by the B4-HBT scheme according to the first embodiment of the present invention. In this case, the same input signal '1 1 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0' is used as an example to facilitate comparison with existing encoding schemes. It is assumed that the clock signal is constant.

Referring to FIG. 4, assuming that a clock signal is constantly transmitted as a reference signal and a data input signal is transmitted as '1 1 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0', B4-HBT. The graph of the signal waveform encoded by the method is as shown in Fig. 4A.

Referring to FIG. 4, the B4-HBT scheme is an encoding scheme improved from the existing AMI and 4B5B schemes. The coding structure of the B4-HBT scheme is made with reference to the scheme as shown in FIG. 4 (b). The B4-HBT method is based on the AMI code, and when there are five consecutive zeros, the first and last 0 bits have a 1 and a bit shifts by half from +1 to -1. In particular, when the next five consecutive zeros are similarly, the first and last 0 bits have 1, but the bits have a half-bit transition from -1 to +1. That is, each time five consecutive zeros are inputted, the first and last zero bits have a 1, and then shift by half from +1 to -1 or -1 to +1.

In the B4-HBT scheme, as shown in FIG. 4 (b), when the current bit level is -1, if the input bit is 1, it is shifted by half bit, and is shifted from -1 to +1. If there are five zeros, the first and last zero bits are shifted half by one with a shift of -1 to +1.

If the current bit level is zero, the input bit 0 stays at zero unless five consecutive bits are present.

If the current bit level is +1 and the input bit is 1, it is a half bit transition, and from +1 to -1, but if the input bit is 0 and there are 5 consecutive zeros, the first and last 0 bits have 1 and half bit transition. This transitions from +1 to -1.

Referring to the graph of Fig. 4 (a) which is the result encoded in the above manner, when input bit 1 is input in the state where the initial bit level is 1 in the part 1), it is shifted by half a bit and becomes +1 to -1. Shows transition. Next, since the next input bit is inputted again with the next input bit being changed to -1 in the ② part of the second input bit. Shows transition from 1 to +1. In this state, since 0 is input as the next input bit in the transition to +1, 0 is maintained in this case. That is, it shows that zero is maintained unless five zeros are continuously input as input bits. Accordingly, in the part of ③ ~ ⑥, since 4 input bits 0 are input continuously, it keeps 0 as it is. On the other hand, when there are five consecutive input bits 0 in ⑦ ~ ⑪, the bit having the first and last 0 is shifted by half a bit to shift from +1 to -1. Looking at the part where the input bit is '00000', it means '+1 0 0 0 +1', and actually shows that the first 0 input bit and the last 0 input bit are only half-bit shifted from +1 to -1. .

In this manner, after the clock signal and the data input signal are encoded by the B4-HBT scheme according to the first embodiment of the present invention, the combiner 330 combines and transmits them. In this case, the combining operation in the combiner 330 is in accordance with the order input from the bit level determiner 310 to each processor 340, 350, 360 of the bit processor 320, and the order information is the bit level determiner. It may be transferred directly from the 310 to the coupling portion 330.

The B4-HBT method according to the first embodiment of the present invention has an advantage that reliability can be improved by reducing errors due to continuous '0' synchronization. In addition, this scheme reduces the required frequency bandwidth and the code length is smaller than that of the conventional 4B5B scheme. Accordingly, there is an advantage that synchronous reproduction at the receiving terminal is easy and less affected by noise.

Referring to FIG. 5 to describe a case where data is encoded by the 3B-HBT scheme according to the second embodiment of the present invention. 5 also illustrates a simulation result using the same data input signal described above.

The 3B-HBT scheme has a feature of shifting half a bit when the input bit is one.

Referring to the coding structure of FIG. 5 (b), when the current bit level is -1 or +1, that is, when the input bit is 1, the transition is half-bit regardless of the current bit level, and from +1 to -1. Transition. If any other input bit is 0, it remains 0 regardless of the current bit level.

In this 3B-HBT method, since the average value of all codes is 0, the DC component can be eliminated and the coding length can be reduced. Accordingly, the bandwidth can be reduced compared to the existing 4B5B or 8B10B. The result of encoding the data input signal '1 1 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0' by the above-described method is as shown in the graph of FIG.

Referring to FIG. 6 to describe a case in which data is encoded by the Z-HBT scheme according to the third embodiment of the present invention. 6, the same data input signal is used as in FIG. 4, and the simulation result which is the coding example according to the data input signal is illustrated. Specifically, referring to FIG. 6 (b), when the input bit is 1 while the current bit level is −1, the input bit transitions to 0. When the input bit is 0, the transition to zero occurs.

If the current bit level is 0 and the input bit is 1, it transitions to -1 if the previous bit level is +1, and to +1 if the previous bit level is -1. In the state where the current bit level is 0, when the input bit is 0, if the previous bit level is +1, it is shifted to -1 by half bit shift, but when the previous bit level is -1, it is shifted to +1 by half bit shift.

If the current bit level is +1 and the input bit is 1, it is shifted to 0. If the input bit is 0, it is shifted to 0 with half-bit shift.

Referring to the graph of FIG. 6A, which is a result encoded in the above manner, the first input bit in the first input bit portion has no change in bit level. The second input bit section transitions to 0 if the next input bit is 1 at this +1 bit level. Subsequently, in the third input bit portion, the next input bit is 0 at the 0 bit level, and thus transitions to -1 or +1 while shifting half bit depending on whether the previous bit level is +1 or -1. This shows that the previous bit level is +1, so it shifts to -1 as it transitions by half a bit. Then, the fourth input bit part shows that the next input bit is 0 at -1 bit level, so it is shifted to 0 by half bit transition. In the fifth input bit section, the input bit is 0 at the 0 bit level, so the previous bit level must be referenced. Since the previous bit level was -1, it shows a half-bit shift to +1. Subsequently, in the sixth input bit portion, since the current bit level is +1 and the input bit is 0, the transition to the half bit transition to zero. In the seventh input bit portion, it transitions to -1 because the current bit level is 0, the input bit is 1, and the full bit level is +1.

Since the Z-HBT method uses a half-bit transition, the time is reduced, resulting in an increase in bandwidth. As a result, the required bandwidth is approximately 1.5 times smaller than that of the conventional Manchester method, and the code length is encoded. Does not increase. In addition, even in successive '0' and '1', the receiving terminal does not cause a problem in synchronization, and the influence of noise can be reduced by using the difference in signal level due to the transition in the '0' bit. In addition, the error caused by continuous '0' synchronization can be reduced.

The performance of the encoding method proposed by the present invention as described above is shown in FIG. 7 when compared with the performance of the conventional NRZ, AMI, 4B5B, and HDB3 schemes. FIG. 7 illustrates a graph obtained by inputting 20,000 random input signals and simulating in a visible light communication environment. If the encoding method according to the present invention is applied to a visible light communication system, as shown in FIG. 7, the influence of noise may be reduced, and the bandwidth may be reduced.

1 is a diagram illustrating encoding according to encoding methods of conventional NRZ, AMI, 4B5B, and HDB3, respectively.

2 is a block diagram of a visible light communication system according to an embodiment of the present invention;

3 is a block diagram of an encoding unit of FIG. 2;

4 is a diagram illustrating coding by a B4-HBT method according to the first embodiment of the present invention;

5 is an exemplary diagram of encoding by a 3B-HBT scheme according to a second embodiment of the present invention;

6 is a diagram illustrating encoding by a Z-HBT method according to a third embodiment of the present invention;

7 is a performance comparison graph of the encoding scheme and the conventional encoding scheme proposed in the present invention.

Claims (12)

A line coding apparatus for data transmission in a visible light communication system, A data input section that is a transmission data input means; An encoding unit for encoding a data signal and a clock signal from the data input unit according to a current bit level, and encoding the first and last bits by half an encoding method when there are five consecutive input bits 0 during the encoding; And a transmitter for transmitting the encoded signal from the encoder in the form of visible light. The method of claim 1, wherein the encoding unit, A bit level determination unit for determining which bit level the current bit level is' -1 ',' 0 ', or' +1 ''; If the current bit level determined by the bit level discrimination unit is '-1' and the consecutive input bits 0 are 5, the first and last 0 bits have 1 and a half bit transition is performed. Transition to 1 'and encode, and when the current bit level is' +1' and the consecutive input bits 0 are 5, the first and last 0 bits have 1 and the bit transitions from '+1' to '1' A bit processor for transcoding by encoding And a combiner for sequentially combining the coded signals from the bit processor. The method of claim 2, wherein the bit processing unit, When the current bit level is '-1' and the input bit is 1, the terminal transitions from '-1' to '+1' while encoding half a bit, When the current bit level is '+1' and the input bit is 1, the line coding apparatus for data transmission in the visible light communication system, characterized in that the half-bit transition, the transition from '+1' to '-1' to encode . The method of claim 2, wherein the bit processing unit, And if the current bit level is '0' and the input bit is zero, encoding the input bit to maintain zero unless five consecutive input bits are continuously input. The method of claim 1, wherein the encoding unit, When the encoding is performed by an encoding scheme of shifting half a bit when the input bit is 1 during the encoding, And if the input bit is 1, a line coding apparatus for data transmission in a visible light communication system, characterized in that the coder transitions from '+1' to '-1' while making a half-bit transition. A line coding method for data transmission in a visible light communication system, Encoding the data signal and the clock signal according to the current bit level by encoding an encoding method of half-bit shifting the first and last bits when there are five consecutive input bits 0; And transmitting the encoded signal in the form of visible light. The method of claim 6, wherein the encoding process comprises: When the current bit level is '-1' and the consecutive input bits 0 are 5, the first and last 0 bits have a 1 and a half-bit transition is performed by transcoding from '-1' to '+1'. A line coding method for data transmission in a visible light communication system. The method of claim 6, wherein the encoding process comprises: When the current bit level is '+1' and the consecutive input bits 0 are 5, the first and last 0 bits have 1, and the process of encoding by transitioning from '+1' to '1' while making a half-bit transition. Line coding method for data transmission in a visible light communication system. The method of claim 6, wherein the encoding process comprises: If the current bit level is '-1' and the input bit is 1, the code transitions from '-1' to '+1' while making a half bit transition. When the current bit level is '+1' and the input bit is 1, the line coding for data transmission in a visible light communication system is a process of transcoding by transcoding from '+1' to '-1' with a half-bit transition Way. The method of claim 6, wherein the encoding process comprises: And if the current bit level is '0' and the input bit is 0, encoding the input bit to maintain 0 unless five consecutive input bits are continuously inputted. Line coding method. A line coding method for data transmission in a visible light communication system, Encoding the data signal and the clock signal according to the current bit level by an encoding scheme of half-bit shifting when the input bit is 1; And transmitting the encoded signal in the form of visible light. The method of claim 11, wherein the encoding process comprises: If the current bit level is '+1' or '-1' and the input bit is 1, the terminal transitions from '+1' to '-1' while encoding half a bit, And encoding 0 when the input bit is 0. The line coding method for data transmission in a visible light communication system.

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