KR20100025822A - Method for decomposing mask layout and optical proximity correction using the same - Google Patents
Method for decomposing mask layout and optical proximity correction using the same Download PDFInfo
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- KR20100025822A KR20100025822A KR1020080084531A KR20080084531A KR20100025822A KR 20100025822 A KR20100025822 A KR 20100025822A KR 1020080084531 A KR1020080084531 A KR 1020080084531A KR 20080084531 A KR20080084531 A KR 20080084531A KR 20100025822 A KR20100025822 A KR 20100025822A
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- mask
- layout
- mask layout
- optical proximity
- layouts
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/70—Microphotolithographic exposure; Apparatus therefor
- G03F7/70425—Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
- G03F7/70433—Layout for increasing efficiency or for compensating imaging errors, e.g. layout of exposure fields for reducing focus errors; Use of mask features for increasing efficiency or for compensating imaging errors
- G03F7/70441—Optical proximity correction [OPC]
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/70—Microphotolithographic exposure; Apparatus therefor
- G03F7/70425—Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
- G03F7/70475—Stitching, i.e. connecting image fields to produce a device field, the field occupied by a device such as a memory chip, processor chip, CCD, flat panel display
Abstract
The present invention relates to a mask layout separation method for optical proximity correction and a correction method using the same, wherein a difference in pattern density between two mask layouts is equal to or less than a predetermined range in a step of separating a design pattern layout into a first mask layout and a second mask layout. By repeating the separation step until it is appropriate to adjust the pattern density between the first mask layout and the second mask layout, a technique capable of preventing the deterioration of the CD uniformity of the patterning proceeded to the subsequent process is disclosed.
Description
The present invention relates to a mask layout separation method for application in a double patterning technology (DPT) process.
As the degree of integration of semiconductor devices increases, it is required to form finer patterns in photolithography processes.
The photolithography process is a process for forming a circuit pattern on a semiconductor wafer and consists of processes of coating, exposing and developing photoresist. Such photolithography processes require high resolution and optimal depth of focus (DOF) as the integration density of semiconductor devices increases.
However, as the pattern becomes smaller and the size of the pattern becomes smaller and approaches the limit of the optical resolution, the deformation of the pattern may occur due to diffraction and interference of light caused by surrounding patterns.
As described above, the influence from adjacent peripheral patterns during exposure is called an optical proximity effect (OPE).
Therefore, in order to prevent such an optical proximity effect, an optical proximity correction (OPC) method of compensating for optical proximity by adjusting a width of a pattern or adding an auxiliary pattern is used.
1 illustrates a mask layout separation method for optical proximity correction according to the prior art.
Referring to FIG. 1, a step of separating a design pattern layout into a first mask layout and a second mask layout is performed (S110).
Next, an optical proximity effect correction process is performed on the first mask layout and the second mask layout, respectively (S120).
Next, a step of verifying the first mask layout and the second mask layout through which the optical proximity effect correction process has been performed is performed (S130).
The patterned image to be implemented on the wafer is simulated by combining the verified first mask layout and the second mask layout.
Next, the first mask layout and the second mask layout are verified through simulation to determine whether the intended pattern is properly implemented in the design pattern layout (S140).
2A and 2B are photographic views illustrating a problem of a mask layout separation method for optical proximity correction according to the related art.
When the DPT process is performed using the first mask and the second mask manufactured according to the flowchart of FIG. 1, the densities of the patterns included in the first mask and the patterns included in the second mask are different.
When patterning is performed using the first mask and the second mask having a difference in pattern density, an ID Dense pattern bias is generated, which causes degradation of the CD (Critical Dimension) uniformity of the pattern. Will result.
Referring to FIGS. 2A and 2B, there is shown a deterioration of the CD (Critical Dimension) uniformity (Uniformity) of the pattern, the cell region (Fig. 2A) and the ferry region (Fig. It can be seen that a relatively large number of pattern defects occurred in the ferry region having a low pattern density in 2b).
Thus, even though an additional pattern such as a dummy pattern is used to compensate for the pattern density difference in optical proximity effect correction, the pattern density difference is not reduced.
That is, in the mask layout separation method according to the related art and the optical proximity correction method using the same, the CD of the pattern is changed by the difference in the pattern density of the first mask and the second mask separated when the optical proximity effect is corrected by applying the DPT process. There is a problem in that uniformity deteriorates and pattern defects occur.
The present invention improves the method of dividing a design pattern layout into a first mask layout and a second mask layout to appropriately adjust the pattern density between the first mask layout and the second mask layout, thereby reducing the CD uniformity of the patterning proceeded to the subsequent process. To prevent deterioration.
According to an aspect of the present invention, a mask layout separation method includes coloring a design pattern layout to a plurality of mask layouts, analyzing a pattern density difference of each of the plurality of colored layouts, and setting the pattern density difference to a predetermined value. If less than a predetermined range, it comprises a step of stitching the plurality of mask layout (Stiching).
In this case, the pattern density represents the area of the patterns included in the mask layout with respect to the total area of the mask layout, and the predetermined range of the pattern density difference is 5 to 20%. At this time, when the pattern density difference exceeds the predetermined range, it is preferable to color the design pattern layout again.
In addition, the optical proximity correction method using the mask layout separation according to the present invention
Coloring a design pattern layout with a plurality of mask layouts, analyzing a pattern density difference of each of the plurality of colored layouts, and if the pattern density difference is less than or equal to a predetermined range, the plurality of masks Stitching a layout, performing optical proximity effect correction on each of the stitched plurality of mask layouts, and verifying the plurality of mask layouts to which the optical proximity effect correction is applied, respectively. And verifying by combining the verified plurality of mask layouts.
The verifying of each of the plurality of mask layouts may include simulating the plurality of mask layouts to which the optical proximity effect correction is applied, and the plurality of mask layouts before the optical proximity effect correction is applied to the simulated image. Comparing to a mask layout,
Verifying the combination of the plurality of mask layouts includes simulating all of the plurality of mask layouts and comparing the simulated image with the design pattern layout.
The optical proximity effect correction is characterized by using a rule-based correction process or a model-based correction process.
In the mask layout separation method and the optical proximity correction method using the same according to the present invention, in the step of dividing a design pattern layout into a first mask layout and a second mask layout, the mask layout separation method may be performed until the pattern density difference between the two mask layouts is less than or equal to a predetermined range. By repeatedly performing the separation step, by appropriately adjusting the pattern density between the first mask layout and the second mask layout, deterioration of CD uniformity of patterning proceeding to a subsequent process can be prevented.
Hereinafter, with reference to the accompanying drawings an embodiment of the present invention will be described in detail.
3 is a flowchart illustrating an optical proximity correction method according to the present invention.
Referring to FIG. 3, a coloring process of dividing a design pattern layout into a first mask layout and a second mask layout is performed (S310).
The design pattern layout is applied to various regions of the cell region, the core region, and the peri region.
The coloring process is performed by applying a predetermined rule base and coloring different patterns on the patterns included in the design pattern layout so as to know in advance the pattern to be separated into each mask layout. Here, the coloring process is performed by a specific algorithm, and colored based on the pitch of the patterns to be assigned to each mask layout. Since the coloring process itself is already commonly used, a detailed description thereof will be omitted.
Next, the pattern densities of the first patterns included in the first mask layout and the second patterns included in the second mask layout are analyzed. In this case, since the first patterns and the second patterns are colored in different colors, they can be easily distinguished.
At this time, the pattern density for each mask layout can be obtained by the following equation.
Pattern density = (area of patterns included in mask layout) / (total area of mask layout)
When the pattern density of each mask layout is obtained, a difference between the pattern density of the first mask layout and the pattern density of the second mask layout is compared (S320).
Here, the reason for comparing the pattern density difference is to prevent a dense pattern or a small pattern from being biased in one mask layout.
Next, when the pattern density difference exceeds 5 to 20%, the process returns to step S310 to perform the process of coloring the design pattern layout again.
At this time, when the difference in the pattern density continues to exceed 5-20%, the coloring step for the design pattern layout is repeatedly performed until the pattern density difference is 5-20% or less.
However, when the difference in pattern density becomes 5 to 20% or less, a stitching process of actually separating the first mask layout and the second mask layout is performed (S325). That is, in step S310, the layouts are divided by coloring on the same design pattern layout, but the stitching process actually separates the colored patterns into separate independent mask layouts.
Next, the optical proximity correction method is applied to the patterns separated by the stitching process (S330).
Such an optical proximity correction method includes a rule-based correction process or a model-based correction process.
The optical proximity correction method is briefly described as follows. First, a test mask is manufactured with the first mask layout and the second mask layout.
Next, a photoresist pattern is formed on the etched layer through an exposure and development process using a test mask, and ADI (After Development Inspection) is performed on the photoresist pattern.
After etching the layer to be etched using the photoresist pattern as an etching mask, modeling parameters are extracted by performing AEI (After Etch Inspection).
Next, an optical proximity correction method may be performed by assigning modeling variables.
In addition, the optical proximity correction method may include adding a scattering bar.
Here, the above-described optical proximity correction method has been described with some examples, and any conventional method other than the above-described method may be used.
Next, the first mask layout and the second mask layout to which the optical proximity effect correction is applied are verified, respectively (S340). In this case, the verifying of the first mask layout and the second mask layout to which the optical proximity effect correction is applied may be performed on a wafer by performing a simulation process using the first mask layout and the second mask layout to which the optical proximity effect correction is applied. The pattern is compared with the first mask layout and the second mask layout after the optical proximity effect correction is applied. As a result of the comparison, in the case of deviation from the designed tolerance, the optical proximity effect correction of step S330 is performed again.
Then, when the verification is finally completed, the first mask layout and the second mask layout are combined. In operation S350, the first mask layout and the second mask layout in the combined state are verified.
Here, the verifying of the first mask layout and the second mask layout in the combined state may be performed by performing a simulation process using both the first mask layout and the second mask layout to implement a pattern to be formed on the wafer. After that, the process is compared with the design pattern layout.
As described above, by adjusting the pattern density difference of the separated mask layout, it is possible to improve the CD uniformity of the pattern during the subsequent patterning process.
In addition, a preferred embodiment of the present invention is for the purpose of illustration, those skilled in the art will be able to various modifications, changes, substitutions and additions through the spirit and scope of the appended claims, such modifications and changes are the following claims It should be seen as belonging to a range.
1 is a flow chart illustrating a mask layout separation method for optical proximity correction according to the prior art.
Figure 2a to 2b is a photograph showing the problem according to the prior art.
3 is a flow chart illustrating a mask layout separation method for optical proximity correction in accordance with the present invention.
Claims (8)
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KR1020080084531A KR20100025822A (en) | 2008-08-28 | 2008-08-28 | Method for decomposing mask layout and optical proximity correction using the same |
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Cited By (4)
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US8614034B2 (en) | 2011-02-15 | 2013-12-24 | Samsung Electronics Co., Ltd. | Method of manufacturing photo-mask |
KR20150145684A (en) * | 2014-06-20 | 2015-12-30 | 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 | Method of fabricating an integrated circuit with a pattern density-outlier-treatment for optimized pattern density uniformity |
US10216082B2 (en) | 2015-04-14 | 2019-02-26 | Samsung Electronics Co., Ltd. | Layout design system, system and method for fabricating mask pattern using the same |
US11853660B2 (en) | 2020-09-23 | 2023-12-26 | Samsung Electronics Co., Ltd. | System and method for modeling a semiconductor fabrication process |
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2008
- 2008-08-28 KR KR1020080084531A patent/KR20100025822A/en not_active Application Discontinuation
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
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US8614034B2 (en) | 2011-02-15 | 2013-12-24 | Samsung Electronics Co., Ltd. | Method of manufacturing photo-mask |
KR20150145684A (en) * | 2014-06-20 | 2015-12-30 | 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 | Method of fabricating an integrated circuit with a pattern density-outlier-treatment for optimized pattern density uniformity |
CN105278257A (en) * | 2014-06-20 | 2016-01-27 | 台湾积体电路制造股份有限公司 | Method of fabricating an integrated circuit |
US9552964B2 (en) | 2014-06-20 | 2017-01-24 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of fabricating an integrated circuit with a pattern density-outlier-treatment for optimized pattern density uniformity |
US10170276B2 (en) | 2014-06-20 | 2019-01-01 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of fabricating an integrated circuit with a pattern density-outlier-treatment for optimized pattern density uniformity |
US10431423B2 (en) | 2014-06-20 | 2019-10-01 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of fabricating an integrated circuit with a pattern density-outlier-treatment for optimized pattern density uniformity |
US10811225B2 (en) | 2014-06-20 | 2020-10-20 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of fabricating an integrated circuit with a pattern density-outlier-treatment for optimized pattern density uniformity |
US10216082B2 (en) | 2015-04-14 | 2019-02-26 | Samsung Electronics Co., Ltd. | Layout design system, system and method for fabricating mask pattern using the same |
US11853660B2 (en) | 2020-09-23 | 2023-12-26 | Samsung Electronics Co., Ltd. | System and method for modeling a semiconductor fabrication process |
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