KR20090017746A - Apparatus and method for checking boot mode in bootting system - Google Patents

Abstract

An apparatus for checking boot mode in booting system capable of reducing size of booting system and a method thereof are provided to minimize a system on chip. A master block(100) includes a system on chip control part(102) and a boot control part(104). The system on chip control part controls a whole operation of a booting system, and processes a booting method by searching a memory storing a boot code. The boot control part checks an outer device in which the boot code is prepared. A slave block(120) reads and writes data, and includes a plurality of IP groups. A system bus(110) connects the master block to the slave block. An inner memory connected to the system bus stores a boot code provided from an outer processor.

Description

Apparatus and method for checking the boot mode on a boot system {APPARATUS AND METHOD FOR CHECKING BOOT MODE IN BOOTTING SYSTEM}

The present invention relates to an apparatus and a method for performing a boot process in a booting system, and more particularly, to an apparatus and a method for checking a booting mode in a booting system.

Portable terminals such as mobile terminals, PDAs, and portable multimedia players (PMPs), when powered on, initialize the internal components and transfer so-called application programs (e.g. OS programs) stored in nonvolatile storage to main memory. Have a process.

The booting process includes a preparation operation for operating the system of the portable terminal and a code and data of an operating system and an application program from the auxiliary memory device to the main memory device of the portable terminal. Collective work to prepare the operation.

The portable terminal uses a system on chip (SoC) in which a system for enabling full driving on one chip is embedded.

The system on chip includes all the necessary electronic components with the computer, and the system on chip used for communication may include a microprocessor, a DSP, a RAM and a ROM. The use of such a SoC generally has the advantage that the size of the system is smaller and the assembly process is simplified.

In the case of the system on chip, there are various methods for supporting booting.

First, a method commonly used in the system-on-chip is a method of placing a boot code in a nonvolatile memory such as NOR FLASH, ROM, and the like and placing the memory at address 0, which is a boot region on an address map. NOR Flash or ROM can be directly patched by the microcontroller through the memory controller. Therefore, no action is required for booting.

In addition to NOR Flash or ROM, there are booting methods using various devices such as using a serial flash memory having an SPI interface and using a serial EEPROM having an I2C as an interface. Typically, these devices are connected via a memory controller or IP, but unlike NOR Flash, the microcontroller cannot fetch instructions directly. Therefore, the contents of these devices must be copied to another location where the microcontroller can directly patch.

In another method, an external processor downloads the boot code to the internal memory through the memory slave interface of the chip and proceeds with the boot. In some cases, the internal processor has the code necessary for booting in the form of a ROM. In this case, the external processor notifies the opposing chip with a specific signal when the code download is completed. When this signal is generated, the reset of the chip's microcontroller is released and the booting proceeds with the downloaded code.

The system-on-chip supporting the booting process separately assigns an input pin for determining a boot mode, and selects one booting process among a plurality of booting modes by using an input value for the corresponding pin to perform the booting process. do.

For example, assuming that there are about six ways that the system on chip can boot, as shown in Table 1 below, there are three boot mode input pins, and a boot method is determined according to this input value. .

Boot Mode PIN 2 Boot Mode PIN 1 Boot Mode PIN 0 Boot method (mode) 0 0 0 16 bit NOR Flash 0 0 One 8 bit ROM 0 One 0 Use I2C Serial EEPROM 0 One One Enable SPI Serial Flash One 0 0 AP download method One 0 One Use Internal ROM

When a boot mode input value having a low value is input to three pins in the system on chip, a boot process is performed by using a 16-bit NOR flash.

If a boot mode input value having a value of 0 (Low), 1 (High), and 0 (Low) is input to three pins (2, 1, 0) in the system on chip, 16-bit NOR Flash is used. The boot method is used to perform the boot process.

The booting process of the booting system as described above requires a separate input pin for the purpose of determining a boot mode, and increases the package size of the entire chip according to the pin, thereby degrading the competitiveness of the chip.

The present invention is derived to solve the above problems, an object of the present invention to provide an apparatus and method for checking the boot mode to be performed in the boot system.

Another object of the present invention is to provide an apparatus and method for reducing the size of a booting system by checking a boot code by searching each memory group when the booting mode is checked in a booting system.

According to a first aspect of the present invention for achieving the above object, an apparatus for checking a boot mode in a booting system comprises: a plurality of IP (Intellectual Property) groups providing a boot code, and the plurality of IP groups And a boot control unit for accessing and retrieving a boot code, and a system on chip (SOC) control unit for booting by setting an address of a memory in which the boot code exists as a boot area address. .

According to a first aspect of the present invention for achieving the above objects, a method for checking a boot mode in a booting system includes accessing a plurality of IP groups to retrieve a boot code, and an IP in which the boot code exists. And setting a memory address of the group as a boot region address, and booting using the boot code of the boot region address.

As described above, the present invention boots normally without using a separate input pin for confirming a booting method in a conventional booting system as the boot code of an external device capable of performing a booting process in a booting system is searched. By doing this, all boot methods are supported, and the separate input pins can be used for other purposes, thereby miniaturizing the system on a chip.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. In describing the present invention, when it is determined that a detailed description of a related known function or configuration may unnecessarily obscure the subject matter of the present invention, the detailed description thereof will be omitted.

In the following description, an apparatus and method of a booting system for checking a boot mode to be performed will be described.

1 is a block diagram illustrating a configuration of a booting system according to an exemplary embodiment of the present invention.

Referring to FIG. 1, the booting system may include a master block 100, a slave block 120, and a system bus 110.

The master block 100 includes a system on chip controller 102 and a boot controller 104 and refers to a block that can be a subject that reads or writes data through the system bus 110.

First, a system on chip (SoC) control unit 102 controls the overall operation of the booting system. That is, a process of searching for a memory storing a boot code capable of performing the booting process and determining a booting method is performed.

That is, the system on chip controller 102 processes the boot controller 104 to check whether a bootable device exists.

The boot controller 104 accesses the device and checks an external device in which a boot code is prepared in order to determine from which device a bootable device can be booted.

That is, the boot controller 104 accesses each IP (Intellectual Property) group (first group, second group, and third group) through the system bus 110 to provide a boot code to an external device of each group. Make sure the memory or boot ROM it contains is present.

If the memory including the boot code is checked, the boot control unit 104 sets the address of the memory to a boot area of “0” so as to perform a boot process through the corresponding device, and then the system on chip control unit ( 102) to perform the boot process.

On the other hand, if it is not possible to check the memory including the boot code, the boot control unit 104 searches for another group to check the existence of the boot code.

The slave block 120 is a block to which data is read and written. The slave block 120 includes a plurality of IP groups and checks boot code information of a memory corresponding to each group at the request of the master block 100.

The system bus 110 is responsible for the connection between the blocks, that is, the connection between the master block 100 and the slave block 120.

The internal memory connected to the system bus 110 stores the boot code provided from an external processor.

2 is a flowchart illustrating a boot operation process of a booting system according to an exemplary embodiment of the present invention. When the reset is released, the system on chip (SoC) controller of the booting system performs a booting process using a boot code at address "0", and the memory map of the system bus uses various device addresses as "0". There is a function to set the address. In addition, the boot controller will be described on the assumption that it knows the first code of the boot code and can determine which value is the first part of the boot code.

Referring to FIG. 2, the boot system determines whether a boot process is performed in step 201. If the booting process is to be performed, the booting system proceeds to step 203 to access an IP group (first group, second group, and third group) in order to perform a bootable device discovery process.

In step 205, the booting system searches for the memory of the first group in step 205, and then proceeds to step 207 to determine whether a boot code is obtained from the first group.

Herein, the first group is a group of non-volatile memories, and is a group configured to perform a boot process that is commonly used, and the booting system accesses the memory controller of the first group to boot the NOR flash or ROM. You can search the code.

If a boot code is obtained from the first group, the boot system proceeds to step 209 to set a memory address where the boot code exists as a boot area " 0 ".

On the other hand, if the boot code is not obtained from the first group, the boot system proceeds to step 213 to search the memory of the second group 124 in order, and then proceeds to step 215 where a device having a boot code is prepared. Check it.

The second group is a memory group using a NAND Flash memory interface, a serial flash memory using an SPI interface, an I2C interface, and the like. The second group is internal when the boot code exists because the SOC control unit cannot directly execute a command. Copy to memory and save

If it is determined that the device ready for boot code exists, the boot system proceeds to step 219 to copy and store the boot code in internal memory, and then to step 209 to store a memory address where the boot code exists. Is set to "0".

On the other hand, if it is determined that the device prepared with the boot code does not exist, the booting system prepares a booting process using the third group of devices and proceeds to step 217 to check whether the boot code is provided from an external processor.

If the boot code is provided from the external processor, the boot system proceeds to step 219 to store the provided boot code in an internal memory, and then proceeds to step 209 to boot a memory address where the boot code exists. Set to "0" which is the area.

On the other hand, if the boot code is not provided from the external processor, the boot system proceeds to step 211 and sets the address of the embedded ROM to a boot area of "0".

In operation 211, the booting system performs a booting process using a boot code included in an address of the memory set to “0”, and then ends the present algorithm.

Meanwhile, in the detailed description of the present invention, specific embodiments have been described, but various modifications are possible without departing from the scope of the present invention. Therefore, the scope of the present invention should not be limited to the described embodiments, but should be determined not only by the scope of the following claims, but also by the equivalents of the claims.

1 is a block diagram showing the configuration of a boot system according to an embodiment of the present invention;

2 is a flowchart illustrating a boot operation process of a booting system according to an exemplary embodiment of the present invention.

Claims (12)

A device for checking a boot mode on a boot system, A plurality of IP (Intellectual Property) groups providing boot code, A boot controller for accessing the plurality of IP groups and searching for a boot code; And a system on chip (SOC) controller for booting by setting an address of a memory in which the boot code exists as a boot region address. The method of claim 1, The boot control unit, And if the group in which the boot code exists is not a group of inactive memory, controls a function for storing the boot code in an internal memory. The method of claim 1, The IP group is, And at least one of a static memory controller group, a memory interface group, and a static memory slave interface group. The method of claim 3, wherein The static memory controller group, And at least one of a NOR Flash memory interface and a ROM interface. The method of claim 3, wherein The memory interface group, And at least one of a NAND Flash memory interface, an I2C master interface, and an SPI master interface. The method of claim 3, wherein The static memory slave interface group is At least one of an asynchronous static memory slave interface, a synchronous static memory slave interface, an asynchronous multiplexed static memory slave interface, and a synchronous multiplexed static memory slave interface. In the method for checking the boot mode on the boot system, Searching for boot code by accessing a plurality of IP groups, Setting an address of a memory of an IP group in which the boot code exists as a boot region address; And booting by using a boot code of the boot area address. The method of claim 7, wherein If the IP group in which the boot code is present is not a group of inactive memory, storing the boot code in an internal memory. The method of claim 7, wherein The IP group, At least one of a static memory controller group, a memory interface group, and a static memory slave interface group. The method of claim 9, The static memory controller group, At least one of a NOR Flash memory interface and a ROM interface. The method of claim 9, The memory interface group, At least one of a NAND Flash memory interface, an I2C master interface, and an SPI master interface. The method of claim 9, The static memory slave interface group is At least one of an asynchronous static memory slave interface, a synchronous static memory slave interface, an asynchronous multiplexed static memory slave interface, and a synchronous multiplexed static memory slave interface.

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